CN103870209A - Working mode switching method, memory controller and memory storage device - Google Patents
Working mode switching method, memory controller and memory storage device Download PDFInfo
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- CN103870209A CN103870209A CN201210550006.7A CN201210550006A CN103870209A CN 103870209 A CN103870209 A CN 103870209A CN 201210550006 A CN201210550006 A CN 201210550006A CN 103870209 A CN103870209 A CN 103870209A
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Abstract
The invention discloses a working mode switching method, a memory controller and a memory storage device. The working mode switching method includes that: receiving at least one access instruction from a host system and judging whether the access instruction conforms to a predefined format; if the at least one access instruction conforms to the predefined format, switching the working mode of the memory storage device to a second mode from a first mode. The access instruction comprises a first write instruction which comprises write character strings, and the write character strings indicate the memory storage device to carry out an operation corresponding to the write character strings. The working mode switching method switches the working mode of the memory storage device through judging the format of the access instruction, the working mode switching manner is simplified, and the working mode switching error rate is lowered.
Description
Technical field
The invention relates to a kind of Working mode switching method for memorizer memory devices, Memory Controller and memorizer memory devices.
Background technology
Digital camera, mobile phone and MP3 are very rapid in growth over the years, and consumer is also increased rapidly to the demand of Storage Media.Light portative storage card also becomes one of Storage Media that these electronic products the most often use.The various function having with respect to this series products, each manufacturer also releases the storage card of corresponding its product specification, comprise compact flash (Compact Flash, CF) storage card, safe magnetic disc (Security Disk, SD) storage card, and the storage card of the various kind such as memory stick (MemoryStick) storage card.Generally speaking, storage card inside, except the data that user deposits in, also comprises the specific information that is relevant to storage card, only can carry out by special instruction and under the special pattern of storage card access.
In the mode of accessing memory card, what the most often use is the card reader by having access facility, makes host computer system can write or obtain the data in storage card.Along with scientific and technological progress, here the all-in-one card reader of the corresponding different size storage card of energy is also born in.But commercially available card reader only can be carried out simple access action mostly, and host computer system cannot be carried out special instruction by card reader, also just cannot obtain the specific information in storage card by card reader.Therefore, how to utilize mode of operation that general access instruction switches storage card to obtain the specific information of storage card inside, and prevent that storage card from, because of false judgment switching working mode, becoming the subject under discussion that those skilled in the art pay close attention to for this reason simultaneously.
Summary of the invention
The present invention proposes a kind of Working mode switching method, Memory Controller and memorizer memory devices, it carrys out the mode of operation of switchable memory storage device by judging the form of access instruction, to simplify the mode that mode of operation switches and to reduce the probability of wrong switching working mode.
One example of the present invention embodiment provides a kind of Working mode switching method for memorizer memory devices.The mode of operation of memorizer memory devices comprises first mode and the second pattern.This Working mode switching method comprises and from host computer system, receives at least one access instruction, and judges whether access instruction meets pre-defined form.If when at least one access instruction meets pre-defined form, the mode of operation of memorizer memory devices is switched to the second pattern from first mode.Access instruction comprises that first writes instruction and first and write instruction and comprise and write word string, writes word string instruction memory storage device and carries out writing the operation of word string.
In one example of the present invention embodiment, memorizer memory devices is storage card, and the step that receives access instruction from host computer system comprises and from host computer system, receives access instruction by card reader.
In one example of the present invention embodiment, access instruction comprises multiple the first reading command, and judges that the step whether access instruction meets pre-defined form comprises: judge whether the first reading command meets pre-defined reading format; If the first reading command while meeting pre-defined reading format, judge first write instruction indicated write one of them whether word string meets multiple pre-defined order formats; And if first write instruction indicated write word string and meet one of them of pre-defined order format time, identify at least one access instruction and meet pre-defined form.
In one example of the present invention embodiment, memorizer memory devices comprises duplicative non-volatile memory module, and multiple logical addresses are configured to shine upon multiple physical page of duplicative non-volatile memory module, wherein judge that the step whether the first reading command meets pre-defined reading format comprises: judge whether the first reading command indicates the first logical address reading continuously among multiple logical addresses; And if the first reading command indication is while reading continuously the first logical address among multiple logical addresses, identification the first reading command meets pre-defined reading format.
In one example of the present invention embodiment, memorizer memory devices comprises duplicative non-volatile memory module, and multiple logical addresses are configured to shine upon multiple physical page of duplicative non-volatile memory module, wherein judge that the step whether the first reading command meets pre-defined reading format comprises: judge whether the first reading command indicates according to pre-defined sequentially reads at least part of logical address among multiple logical addresses; And if the first reading command indication is while reading at least part of logical address among multiple logical addresses according to pre-defined order, identification the first reading command meets pre-defined reading format.
In one example of the present invention embodiment, if Working mode switching method also comprise first write instruction indicated write word string and do not meet pre-defined order format time, under first mode, write the indicated logical address of instruction according to first and will write word string and write in the correspondent entity page.
In one example of the present invention embodiment, Working mode switching method also comprises: during the second pattern, receive the second reading command from host computer system; Judge whether the indicated logical address of the second reading command is pre-defined logical address; And if the indicated logical address of the second reading command is, while pre-defining logical address, to send at least one system information to host computer system.
In one example of the present invention embodiment, Working mode switching method switches to first mode by the mode of operation of memorizer memory devices from the second pattern after being also included in and sending at least one system information to host computer system.
In one example of the present invention embodiment, Working mode switching method comprise according to first write instruction indicated write word string, from memorizer memory devices, obtain at least one system information, and at least one system information is deposited to the memory buffer of memorizer memory devices.
In one example of the present invention embodiment, Working mode switching method also comprises: during the second pattern, receive second and write instruction; Judge that second writes indicated the writing word string and whether meet the order format for closing the second pattern of instruction; And if second write the indicated word string that writes of instruction and meet in pre-defined order format when closing the order format of the second pattern, the mode of operation of memorizer memory devices is switched to first mode from the second pattern.
Another example of the present invention embodiment provides a kind of Memory Controller, in order to control store storage device.The mode of operation of memorizer memory devices comprises first mode and the second pattern, and Memory Controller comprises connecting interface, memory interface and memory management circuitry.Memory interface is in order to be coupled to duplicative non-volatile memory module, and memory management circuitry is coupled to connecting interface and memory interface and in order to receive at least one access instruction from host computer system.Memory management circuitry judges whether access instruction meets pre-defined form.If when at least one access instruction meets pre-defined form, memory management circuitry switches to the second pattern by the mode of operation of memorizer memory devices from first mode.Access instruction comprises that first writes instruction and first and write instruction and comprise and write word string, and memory management circuitry is carried out corresponding this and write the operation of word string according to writing word string.
Another exemplary embodiment of the present invention provides a kind of memorizer memory devices, comprises connector, duplicative non-volatile memory module, memory buffer and Memory Controller.Memory Controller is coupled to duplicative non-volatile memory module, connector and memory buffer, and in order to receive at least one access instruction from host computer system.Memory Controller judges whether access instruction meets pre-defined form, if when a few access instruction meets pre-defined form, Memory Controller switches to the second pattern by the mode of operation of memorizer memory devices from first mode.Access instruction comprises that first writes instruction and first and write instruction and comprise and write word string, and Memory Controller is carried out corresponding this and write the operation of word string according to writing word string.
Based on above-mentioned, Working mode switching method, Memory Controller and the memorizer memory devices of exemplary embodiment of the present invention be by judging whether access instruction meets pre-defined form and determine whether the mode of operation of switchable memory storage device, to simplify the mode that mode of operation switches the probability that reduces wrong switching working mode.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate appended graphic being described in detail below.
Accompanying drawing explanation
Figure 1A is according to the summary calcspar of the shown host computer system of an exemplary embodiment and memorizer memory devices;
Figure 1B is the schematic diagram of the shown computer of the first exemplary embodiment, input/output device and memorizer memory devices according to the present invention;
Fig. 1 C is the schematic diagram of the shown host computer system of another exemplary embodiment and memorizer memory devices according to the present invention;
Fig. 2 and Fig. 3 are according to the schematic diagram of the shown management entity block of an exemplary embodiment;
Fig. 4 is according to the summary calcspar of the shown Memory Controller of an exemplary embodiment;
Fig. 5 is according to the schematic diagram of the shown Working mode switching method of an exemplary embodiment;
Fig. 6 is the process flow diagram of the shown mode switching method of exemplary embodiment according to the present invention.
Description of reference numerals:
100: memorizer memory devices;
102: connector;
104: Memory Controller;
106: duplicative non-volatile memory module;
108: memory buffer;
1000: host computer system;
1102: microprocessor;
1104: storage device;
1106: random access memory;
1108: input/output device;
1110: operating system;
1120: mode of operation switch application program;
1140: card reader;
1100: computer;
1202: slide-mouse;
1204: keyboard;
1206: display;
1208: printer;
1212: Portable disk;
1214: storage card;
1310: digital camera;
1312:SD card;
1314:MMC card;
1316: memory stick;
1318:CF card;
1320: embedded storage device;
304 (0)-304 (R): physical blocks;
402: data field;
404: spare area;
406: replace district;
408: hidden area;
LBA (0)-LBA (H): logical address;
202: memory management circuitry;
204: connecting interface;
206: memory interface;
208: electric power management circuit;
210: bug check and correcting circuit;
S610-S670: the step of Working mode switching method.
Embodiment
Generally speaking, memorizer memory devices (also claiming memory storage system) comprises duplicative non-volatile memory module and controller (also claiming control circuit).Conventionally memorizer memory devices is to use together with host computer system, so that host computer system can write to data memorizer memory devices or reading out data from memorizer memory devices.
Figure 1A is according to the summary calcspar of the shown host computer system of an exemplary embodiment and memorizer memory devices.
Please refer to Figure 1A, host computer system 1000 comprises microprocessor 1102, storage device 1104, random access memory 1106 and input/output device 1108.In the time that host computer system 1000 is started shooting, microprocessor 1102 can be carried out the operating system 1110 being installed in storage device 1104, so that host computer system 1000 provides corresponding function according to user's operation.For example, in this example is implemented, host computer system 1000 is that computer system and operating system 1110 are Windows, and when after host computer system 1000 starts, user can be by input/output device 1108 operating host systems 1000 with functions such as execute file archives editor, video/audio archive editor, audio-visual broadcastings.
Although in this exemplary embodiment, host computer system 1000 is to explain with computer system, but host computer system 1000 can be the systems such as digital camera, video camera, communicator, reproducing apparatus for phonotape or video signal player in another exemplary embodiment of the present invention.For example, be digital camera (video camera) 1310 o'clock in host computer system, duplicative non-volatile memory storage device is its secure digital using (Secure Digital, SD) card 1312, Multi Media Card (MultiMedia Card, MMC) card 1314, memory stick (memory stick) 1316, compact flash (Compact Flash, CF) card 1318 or embedded storage device 1320 are (as shown in Figure 1 C, Fig. 1 C is the schematic diagram of the shown host computer system of another exemplary embodiment and memorizer memory devices according to the present invention.)。Embedded storage device 1320 comprises embedded multi-media card (EmbeddedMMC, eMMC).It is worth mentioning that, embedded multi-media card is to be directly coupled on the substrate of host computer system.
In this exemplary embodiment, memorizer memory devices 100 is storage card, and couples mutually by card reader 1140 and host computer system 1000, and host computer system 1000 can be passed through card reader 1140 access memory storage devices 100.Memorizer memory devices 100 comprises connector 102, Memory Controller 104, duplicative non-volatile memory module 106 and memory buffer 108.
Duplicative non-volatile memory module 106 is to be coupled to Memory Controller 104, and the data that write in order to store host computer system 1000.In this exemplary embodiment, duplicative non-volatile memory module 106 is multistage memory cell (Multi Level Cell, MLC) NAND type flash memory module.But, the invention is not restricted to this, also single-order memory cell (Single Level Cell of duplicative non-volatile memory module 106, SLC) NAND type flash memory module, Complex Order memory cell (Trinary Level Cell, TLC) NAND type flash memory module, other flash memory module or other have the memory module of identical characteristics.
Fig. 2 and Fig. 3 are according to the schematic diagram of the shown management entity block of an exemplary embodiment.
Please refer to Fig. 2, duplicative non-volatile memory module 106 comprises multiple physical blocks 304 (0)-304 (R).Each physical blocks 304 (0)-304 (R) has respectively a plurality of physical page, and the physical page that wherein belongs to same physical blocks 304 (0)-304 (R) can be write independently and side by side be erased.Specifically, the least unit of physical blocks 304 (0)-304 (R) for erasing.That is, the memory cell of being erased in the lump that each physical blocks 304 (0)-304 (R) contains minimal amount.Physical page is the minimum unit of sequencing.The minimum unit that, physical page is data writing.But, it must be appreciated, in another exemplary embodiment of the present invention, the least unit of data writing can be also sector (Sector) or other sizes.Generally speaking, Memory Controller 104 can logically be grouped into the physical blocks of duplicative non-volatile memory module 106 304 (0)-304 (R) data field 402, spare area 404, replace district 406 and hidden area 408, wherein be grouped into data field 402 can store with the physical blocks of spare area 404 data that host computer system 1000 writes with rotating, the physical blocks that replaces district 406 is the bad physical blocks replacing in data field and spare area, and hidden area 408 is the system datas that use in order to storing memory controller 104.Particularly, host computer system 1000 cannot access hidden area 408.In other words, the system information of memorizer memory devices 100 also can be stored in this, and host computer system 100 cannot access hidden area 408 under general situation, therefore also cannot obtain the system information of memorizer memory devices 100.Preservation position that it should be noted that system information is not limited in this.
Please refer to Fig. 3, in order to make the host computer system 1000 can be easily to carrying out access with the physical blocks of the mode storage data of rotating, Memory Controller 104 can configuration logic address LBA (0)-LBA (H) carrys out the multiple physical page in the physical blocks in mapping (enum) data district 402, and host computer system 1000 can directly be carried out writing and reading of data according to logical address LBA (0)-LBA (H) thus.For example, in the time that memorizer memory devices 100 is formatted, logical address LBA (0)-LBA (H) can be initially multiple physical page in the physical blocks 340 (0)-340 (D) in mapping (enum) data district 402.
Fig. 4 is according to the summary calcspar of the shown Memory Controller of an exemplary embodiment.
Please refer to Fig. 4, Memory Controller 104 comprises memory management circuitry 202, connecting interface 204, memory interface 206, electric power management circuit 208 and bug check and correcting circuit 210.
In this exemplary embodiment, the steering order of memory management circuitry 202 is to carry out implementation with firmware pattern.For example, memory management circuitry 202 has microprocessor unit (not shown) and read only memory (not shown), and these a little steering orders are to be burned onto in this read only memory.In the time that memorizer memory devices 100 is worked, these a little steering orders can be carried out by microprocessor unit.
In another exemplary embodiment of the present invention, the steering order of memory management circuitry 202 also can procedure code pattern for example be stored in, in the specific region (, being exclusively used in the system region of storage system data in memory module) of duplicative non-volatile memory module 106.In addition, memory management circuitry 202 has microprocessor unit (not shown), read only memory (not shown) and random access memory (not shown).Particularly, this read only memory has the code of driving section, and in the time that Memory Controller 104 is enabled, microprocessor unit can first be carried out this and drive code section that the steering order being stored in duplicative non-volatile memory module 106 is loaded in the random access memory of memory management circuitry 202.Afterwards, microprocessor unit this little steering orders that can turn round.
In addition,, in another exemplary embodiment of the present invention, the steering order of memory management circuitry 202 also can a hardware pattern be carried out implementation.For example, memory management circuitry 202 comprises microcontroller, memory cell management circuit, storer write circuit, memory reading circuitry, storer erase circuit and data processing circuit.Erase circuit and data processing circuit of memory cell management circuit, storer write circuit, memory reading circuitry, storer is to be coupled to microcontroller.Wherein, memory cell management circuit is in order to manage the entity of duplicative non-volatile memory module 106 unit of erasing; Storer write circuit writes instruction data are write in duplicative non-volatile memory module 106 in order to duplicative non-volatile memory module 106 is assigned; Memory reading circuitry is in order to assign reading command with reading out data from duplicative non-volatile memory module 106 to duplicative non-volatile memory module 106; Storer is erased circuit in order to duplicative non-volatile memory module 106 is assigned to the instruction of erasing so that data are erased from duplicative non-volatile memory module 106; And data processing circuit is wanted the data that write to the data of duplicative non-volatile memory module 106 and read from duplicative non-volatile memory module 106 in order to processing.
Connecting interface 204 is to be coupled to memory management circuitry 202 with card reader 1140 and in order to receive the instruction and the data that transmit with identification host computer system 1000.That is to say that the instruction that host computer system 1000 transmits and data via card reader 1140, then are sent to memory management circuitry 202 by connecting interface 204.In this exemplary embodiment, connecting interface 204 is for meeting the interface of SD standard.But, it must be appreciated and the invention is not restricted to this, connecting interface 204 can be also the interface that meets MS standard, MMC standard, CF standard, USB standard or other standards.
Electric power management circuit 208 is to be coupled to memory management circuitry 202 and the power supply in order to control store storage device 100.
Bug check and correcting circuit 210 be coupled to memory management circuitry 202 and in order to execution error inspection and correction program to guarantee the correctness of data.Specifically, when memory management circuitry 202 receives while writing instruction from host computer system 1000, bug check can produce corresponding bug check and correcting code (ErrorChecking and Correcting Code for the corresponding data that this writes instruction with correcting circuit 210, ECC Code), and memory management circuitry 202 can write to corresponding these data that write instruction in duplicative non-volatile memory module 106 with corresponding bug check and correcting code.Afterwards, when memory management circuitry 202 can read bug check corresponding to these data and correcting code when reading out data from duplicative non-volatile memory module 106 simultaneously, and bug check and correcting circuit 210 can be according to this bug check and correcting code to read data execution error inspection and correction programs.
Specifically, memorizer memory devices 100, except providing storage area, also stores specific information, for example the system information of memorizer memory devices 100.The system information of memorizer memory devices 100 is under general work pattern, host computer system 1000 normally cannot be carried out access, only can be by input special instruction, the special pattern (for example, manufacturer's pattern (Vendor Mode)) that starts memorizer memory devices 100 carries out access to the system information of memorizer memory devices 100.In addition, memorizer memory devices 100 also has the specific function that only can trigger under special pattern.For example, but access instruction (, writing instruction and reading command) can only be identified and carry out to card reader 1140, and cannot carry out special instruction.For the foregoing reasons, exemplary embodiment of the present invention provides a kind of changing method of mode of operation, can pass through the mode of operation of card reader 1140 switchable memory storage devices 100.
Fig. 5 is according to the schematic diagram of the shown Working mode switching method of an exemplary embodiment.
With reference to Fig. 5, when Memory Controller 104 (or memory management circuitry 202) receives at least one access instruction from host computer system 1000, Memory Controller 104 (or memory management circuitry 202) can judge whether the access instruction receiving meets pre-defined form.If these a little access instructions meet pre-defined form, Memory Controller 104 (or memory management circuitry 202) can switch to the second pattern (being manufacturer's pattern) from first mode (being general work pattern) by the mode of operation of memorizer memory devices 100.Particularly, under the second pattern, Memory Controller 104 (or memory management circuitry 202) can be according to these a little access instructions, and instruction memory storage device 100 is carried out corresponding operation.In detail, access instruction comprises that first writes instruction and first and write instruction and comprise and write word string, and Memory Controller 104 (or memory management circuitry 202) can be carried out the corresponding operation that writes word string according to writing word string instruction memory storage device 100.For example, Memory Controller 104 (or memory management circuitry 202) can according to come from main frame these a little access instructions in one write instruction indicated write word string, from memorizer memory devices 100, obtain at least one system information, and system information is deposited to the memory buffer 108 of memorizer memory devices 100.Again for example, Memory Controller 104 (or memory management circuitry 202) can according to come from these a little access instructions of main frame one write instruction indicated write word string, and constantly duplicative non-volatile memory module 106 is carried out to virtual read-write, to take the bandwidth of connecting interface 204, thus so that memorizer memory devices 100 has enough time to carry out background operation.Must be noted that the performed operation of memorizer memory devices 100 is not limited to this.
The object of identifying received access instruction according to pre-defined form is the probability that is strayed into the second pattern in order to reduce host computer system 1000.Due to the Working mode switching method in this exemplary embodiment, only utilize general access instruction to carry out the program that trigger mode is switched, thereby need the pre-defined form of design to improve the difficulty that trigger mode is switched.
For example, in the present invention's one exemplary embodiment, these a little access instructions comprise multiple the first reading command.Memory Controller 104 (or memory management circuitry 202), in the time judging whether access instruction meets pre-defined form, noly can first judge this little first reading command time meets pre-defined reading format.If these a little first reading command meet pre-defined reading format, Memory Controller 104 (or memory management circuitry 202) can then judge first write instruction indicated write one of them whether word string meets multiple pre-defined order formats.When Memory Controller 104 (or memory management circuitry 202) confirms that first while writing the writing word string and meet one of them of multiple pre-defined order formats of instruction, Memory Controller 104 (or memory management circuitry 202) can meet pre-defined form by these a little access instructions of identification, and the mode of operation of memorizer memory devices 100 is switched to the second pattern from first mode.
Specifically, pre-defined reading format can have multiple different form, and the present invention is not limited.For example, memorizer memory devices 100 conventionally as Fig. 3, disposes multiple logical address LBA (0)-LBA (H) and maps to the physical page of duplicative non-volatile memory module 106.For example, if multiple reading command that Memory Controller 104 (or memory management circuitry 202) receives continuously from host computer system 1000 to a logical address among logical address LBA (0)-LBA (H) (are all indicated, the first logical address) while reading, Memory Controller 104 (or memory management circuitry 202) can these a little first reading command of identification meet pre-defined reading format.For example, in the time receiving the first reading command that 10 indications read the first logical address, memory management circuitry 202 can these a little first reading command of identification meet pre-defined reading format.
Identifying the judgment rule that reading command meets pre-defined reading format when receiving continuously indication multiple reading command that same logical address is read, is only an example.In another example of the present invention is implemented, Memory Controller 104 (or memory management circuitry 202) can be also indications while reading the partial logic address among logical address LBA (0)-LBA (H) according to pre-defined order in the received multiple instructions of identification, and judges that identifying thus received reading command meets pre-defined reading format.For example, if when multiple reading command indications read to logical address LBA (H-10) from logical address LBA (H) continuously according to inverted order, Memory Controller 104 (or memory management circuitry 202) can the received reading command of identification be to meet pre-defined reading format.Setting that it should be noted that pre-defined order is not limited with above-mentioned.
Meet after pre-defined reading format when Memory Controller 104 (or memory management circuitry 202) judges the first received reading command, then can judge that first writes writing word string and whether meeting pre-defined order format of instruction.At this, the special instruction form that pre-defined order format is used in the second pattern for memorizer memory devices 100.That is to say, Memory Controller 104 (or memory management circuitry 202) first writes instruction by what judge that host computer system 1000 transmits, confirms that the whether intentional mode of operation by memorizer memory devices 100 of host computer system 1000 switches to the second pattern.If memory management circuitry 202 judge first write instruction indicated write word string and do not meet pre-defined order format time, represent that received reading command may be only by chance to meet pre-defined reading format, but not host computer system 1000 mode of operation of switchable memory storage device 100 intentionally.Therefore, Memory Controller 104 (or memory management circuitry 202) can, under first mode, write the indicated logical address of instruction according to first and write in corresponding physical page writing word string.Otherwise, if memory management circuitry 202 judges that first writes the indicated word string that writes of instruction and meet pre-defined order format, Memory Controller 104 (or memory management circuitry 202) can, by the mode of operation of memorizer memory devices, switch to the second pattern from first mode.
Referring again to Fig. 5, under the second pattern, Memory Controller 104 (or memory management circuitry 202) meeting foundation aforementioned first writes the word string that writes of instruction, and instruction memory storage device 100 is carried out corresponding operation.Detailed narration as after.In one embodiment of this invention, Memory Controller 104 (or memory management circuitry 202) can according to first write instruction indicated write word string, from memorizer memory devices 100, obtain the system information of memorizer memory devices 100, and the system information of memorizer memory devices 100 is put to the memory buffer 108 of memorizer memory devices 100.In addition, Memory Controller 104 (or memory management circuitry 202) can be identified as the system information that corresponds to memorizer memory devices 100 by logical address LBA (the 0)-LBA (K) of part.In other words, logical address LBA (the 0)-LBA (K) of part is the pre-defined logical address in the second pattern.Host computer system 1000 can be for example, by assigning the reading command that reads pre-defined logical address (, LBA (K)), with the system information of read memory storage device 100 in the second pattern.
For example, in the second pattern, Memory Controller 104 (or memory management circuitry 202) can receive the second reading command from host computer system 1000, and judges whether the indicated logical address of the second reading command is pre-defined logical address.If when the second reading command is pre-defined logical address, Memory Controller 104 (or memory management circuitry 202) can, by corresponding system information, take out and be sent to host computer system 1000 by memory buffer 108.Otherwise, if when indicated logical address LBA (the K+1)-LBA (H) of the second reading command is not pre-defined logical address, Memory Controller 104 (or memory management circuitry 202) can switch back first mode from the second pattern by the mode of operation of memorizer memory devices 100, and in first mode, carry out the second reading command, to send the data in duplicative non-volatile memory module 106 to host computer system 1000.System information that it should be noted that memorizer memory devices 100 not must be put in the memory buffer 108 of memorizer memory devices 100.When Memory Controller 104 (or memory management circuitry 202) can receive the reading command of being assigned by host computer system 1000 by the time, ability is by the system information of Memory Controller 104 (or memory management circuitry 202) read memory storage device 100.
In addition, host computer system 1000 also can be utilized and write instruction, modifies, or further utilize access instruction to carry out the built-in specific function of flip-flop storage storage device 100 for the system information of memorizer memory devices 100.In other words, assign access instruction by host computer system 1000, and Memory Controller 104 (or memory management circuitry 202) can be according to the word string that writes that writes instruction as first in aforementioned access instruction, instruction memory storage device 100 is carried out the corresponding operation that writes word string, and make memorizer memory devices 100 under the second pattern, carry out work according to different access instruction forms.
In this exemplary embodiment, when after the access of host computer system 1000 completion system information, Memory Controller 104 (or memory management circuitry 202) can switch the mode of operation of memorizer memory devices 100 to be back to first mode from the second pattern.
Although in this exemplary embodiment, memory management circuitry 202 can switch to first mode by the mode of operation of memorizer memory devices 100 from the second pattern after sending system information to host computer system 1000.But, the invention is not restricted to this.In another exemplary embodiment, Memory Controller 104 (or memory management circuitry 202) also can be during the second pattern, receive and judge second write instruction indicated write the order format whether word string meets to close the second pattern.If what the second instruction was indicated writes word string while meeting the order format of closing the second pattern, Memory Controller 104 (or memory management circuitry 202) can switch to first mode by the second pattern by the mode of operation of memorizer memory devices 100.
Fig. 6 is the process flow diagram of the shown mode switching method of exemplary embodiment according to the present invention.
With reference to Fig. 6, in step S610, receive multiple access instructions from host computer system 1000.Then,, in step S620, whether multiple access instructions that judgement receives meet pre-defined form.If the multiple access instructions that receive meet pre-defined form,, in step S630, the mode of operation of memorizer memory devices 100 is switched to the second pattern from first mode.Aforementioned access instruction comprises that first writes instruction and first and write instruction and comprise and write word string, writes the operation that word string instruction memory storage device 100 is carried out writing word string.
For example, in step S630, Memory Controller 104 (or memory management circuitry 202) can according to first write instruction indicated write word string, from memorizer memory devices 100, obtain at least one system information, and system information is deposited to the memory buffer 108 of memorizer memory devices 100.After step S630, memorizer memory devices 100 has been in the second pattern.
If the multiple access instructions that receive do not meet pre-defined form, return to step S610 and again receive access instruction, judge whether follow-up access instruction meets pre-defined form to continue.
Then,, during the second pattern, in step S640, receive the second reading command from host computer system.Then,, in step S650, judge whether the indicated logical address of the second reading command is pre-defined logical address.If the indicated logical address of the second reading command is pre-defined logical address,, in step S660, send at least one system information to host computer system 1000.Then,, at least one system information is sent to after host computer system 1000, at step S670, memorizer memory devices 100 mode of operations are switched back to first mode from the second pattern.
It should be noted that, if if during the second pattern, receive second write instruction and second write instruction indicated write word string and meet the order format for closing the second pattern time, the mode of operation of memorizer memory devices 100 is switched back first mode by the second pattern.
In sum, according to embodiments of the invention, Memory Controller and the memorizer memory devices of mode switching method and use the method, by judging whether access instruction meets pre-defined form, determine whether the mode of operation of memorizer memory devices is switched to the second pattern from first mode, make thus the memorizer memory devices that is connected to host computer system by card reader to carry out mode of operation switching according to the indication of host computer system.In addition,, by the mechanism described in this exemplary embodiment, the probability that by mistake switches to the second pattern also can be lowered greatly.
Finally it should be noted that: above each embodiment, only in order to technical scheme of the present invention to be described, is not intended to limit; Although the present invention is had been described in detail with reference to aforementioned each embodiment, those of ordinary skill in the art is to be understood that: its technical scheme that still can record aforementioned each embodiment is modified, or some or all of technical characterictic is wherein equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (26)
1. a Working mode switching method, for a memorizer memory devices, is characterized in that, a mode of operation of this memorizer memory devices comprises a first mode and one second pattern, and this Working mode switching method comprises:
From a host computer system, receive at least one access instruction;
Judge whether this at least one access instruction meets a pre-defined form; And
If when this at least one access instruction meets this pre-defined form, the mode of operation of this memorizer memory devices is switched to this second pattern from this first mode, wherein this at least one access instruction comprises that one first writes instruction and this first and writes instruction and comprise that one writes word string
Wherein this writes word string and indicates this memorizer memory devices to carry out writing the operation of word string.
2. Working mode switching method according to claim 1, is characterized in that, this memorizer memory devices is a storage card,
The wherein said step that receives this at least one access instruction from this host computer system comprises and from this host computer system, receives this at least one access instruction by a card reader.
3. Working mode switching method according to claim 1, is characterized in that, this at least one access instruction also comprises multiple the first reading command,
The wherein said step that judges whether this at least one access instruction meets this pre-defined form comprises:
Judge whether those first reading command meet a pre-defined reading format;
If when those first reading command meet this pre-defined reading format, judge that this first writes indicated this of instruction and write one of them whether word string meets multiple pre-defined order formats; And
If this first when writing indicated this of instruction and writing word string and meet one of them of those pre-defined order formats, is identified this at least one access instruction and meets this pre-defined form.
4. Working mode switching method according to claim 3, it is characterized in that, this memorizer memory devices comprises a duplicative non-volatile memory module, and multiple logical address is configured to shine upon multiple physical page of this duplicative non-volatile memory module
The wherein said step that judges whether those first reading command meet this pre-defined reading format comprises:
Judge whether those first reading command indicate one first logical address reading continuously among those logical addresses; And
If when this first logical address among those logical addresses is read in those the first reading command indications continuously, identify those first reading command and meet this pre-defined reading format.
5. Working mode switching method according to claim 3, it is characterized in that, this memorizer memory devices comprises a duplicative non-volatile memory module, and multiple logical address is configured to shine upon multiple physical page of this duplicative non-volatile memory module
The wherein said step that judges whether those first reading command meet this pre-defined reading format comprises:
Judging whether those first reading command indicate according to a pre-defined order reads at least part of logical address among those logical addresses; And
If when those the first reading command indications are read this at least part of logical address among those logical addresses according to this pre-defined order, identify those first reading command and meet this pre-defined reading format.
6. Working mode switching method according to claim 3, is characterized in that, also comprises:
If this is first when writing indicated this of instruction and writing word string and do not meet this pre-defined order format, under this first mode, first writes the indicated logical address of instruction this is write to word string and writes in a corresponding physical page according to this.
7. Working mode switching method according to claim 3, is characterized in that, comprising:
During this second pattern, from this host computer system, receive one second reading command;
Judge whether the indicated logical address of this second reading command is a pre-defined logical address; And
If when this indicated logical address of this second reading command is this pre-defined logical address, send at least one system information to this host computer system.
8. Working mode switching method according to claim 7, is characterized in that, also comprises:
After sending this at least one system information to this host computer system, the mode of operation of this memorizer memory devices is switched to this first mode from this second pattern.
9. Working mode switching method according to claim 3, is characterized in that, comprising:
First write indicated this of instruction and write word string and from this memorizer memory devices, obtain at least one system information and this at least one system information is deposited to a memory buffer of this memorizer memory devices according to this.
10. Working mode switching method according to claim 3, is characterized in that, comprising:
During this second pattern, receive one second and write instruction;
Judge that this second writes indicated one the writing word string and whether meet in those pre-defined order formats for closing the order format of this second pattern of instruction; And
If this second when writing indicated this of instruction and writing word string and meet the order format for closing this second pattern, switches to this first mode by the mode of operation of this memorizer memory devices from this second pattern.
11. 1 kinds of Memory Controllers, in order to control a memorizer memory devices, is characterized in that, a mode of operation of this memorizer memory devices comprises a first mode and one second pattern, and this Memory Controller comprises:
One connecting interface;
One memory interface, in order to be coupled to a duplicative non-volatile memory module; And
One memory management circuitry, is coupled to this connecting interface and this memory interface and in order to receive at least one access instruction from a host computer system,
Wherein this memory management circuitry judges whether this at least one access instruction meets a pre-defined form,
If when wherein this at least one access instruction meets this pre-defined form, this memory management circuitry switches to this second pattern by the mode of operation of this memorizer memory devices from this first mode, this at least one access instruction comprises that one first writes instruction and this first and writes instruction and comprise that one writes word string, and this memory management circuitry writes word string and carries out writing the operation of word string according to this.
12. Memory Controllers according to claim 11, is characterized in that, this memorizer memory devices is that a storage card and this memory management circuitry receive this at least one access instruction from this host computer system by a card reader.
13. Memory Controllers according to claim 11, is characterized in that, this at least one access instruction also comprises multiple the first reading command,
Wherein judge described whether this at least one access instruction meets in the work of this pre-defined form, this memory management circuitry can judge whether those first reading command meet a pre-defined reading format;
If when wherein those first reading command meet this pre-defined reading format, this memory management circuitry can judge that this first writes indicated this of instruction and write one of them whether word string meets multiple pre-defined order formats,
If this is first when writing indicated this of instruction and writing word string and meet one of them of those pre-defined order formats, this memory management circuitry can be identified this at least one access instruction and meet this pre-defined form.
14. Memory Controllers according to claim 13, it is characterized in that, this memorizer memory devices comprises a duplicative non-volatile memory module, and multiple logical address is configured to shine upon multiple physical page of this duplicative non-volatile memory module
Wherein judge described whether those first reading command meet in the work of this pre-defined reading format, this memory management circuitry can judge whether those first reading command indicate one first logical address reading continuously among those logical addresses,
If when this first logical address among those logical addresses is read in those the first reading command indications continuously, this memory management circuitry can be identified those first reading command and meet this pre-defined reading format.
15. Memory Controllers according to claim 13, it is characterized in that, this memorizer memory devices comprises a duplicative non-volatile memory module, and multiple logical address is configured to shine upon multiple physical page of this duplicative non-volatile memory module
Wherein judge described whether those first reading command meet in the work of this pre-defined reading format, this memory management circuitry can judge whether those first reading command indicate according to a pre-defined order and read at least part of logical address among those logical addresses
If when those the first reading command indications are read this at least part of logical address among those logical addresses according to this pre-defined order, this memory management circuitry can be identified those first reading command and meet this pre-defined reading format.
16. Memory Controllers according to claim 13, it is characterized in that, if this is first when writing indicated this of instruction and writing word string and do not meet this pre-defined order format, this memory management circuitry more in order to first to write the indicated logical address of instruction this write to word string and writes in a corresponding physical page according to this under this first mode.
17. Memory Controllers according to claim 13, it is characterized in that, this memory management circuitry is more in order to during this second pattern, from this host computer system, receive one second reading command and judge whether the indicated logical address of this second reading command is a pre-defined logical address
If when this indicated logical address of this second reading command is this pre-defined logical address, this memory management circuitry can send at least one system information to this host computer system.
18. Memory Controllers according to claim 17, it is characterized in that, after sending this at least one system information to this host computer system, this memory management circuitry can switch to this first mode from this second pattern by the mode of operation of this memorizer memory devices.
19. Memory Controllers according to claim 13, it is characterized in that, this memory management circuitry first writes indicated this of instruction and writes word string and from this memorizer memory devices, obtain at least one system information and this at least one system information is deposited to a memory buffer of this memorizer memory devices according to this.
20. Memory Controllers according to claim 13, it is characterized in that, this memory management circuitry receives one second and writes instruction and judge that this second writes indicated one the writing word string and whether meet in those pre-defined order formats for closing the order format of this second pattern of instruction during this second pattern
If this is second when writing indicated this of instruction and writing word string and meet the order format for closing this second pattern, this memory management circuitry can switch to this first mode from this second pattern by the mode of operation of this memorizer memory devices.
21. 1 kinds of memorizer memory devices, is characterized in that, comprising:
A connector;
One duplicative non-volatile memory module;
One memory buffer; And
One Memory Controller, is coupled to this duplicative non-volatile memory module, this connector and this memory buffer and in order to receive at least one access instruction from a host computer system,
Wherein this Memory Controller judges whether this at least one access instruction meets a pre-defined form,
If when wherein this at least one access instruction meets this pre-defined form, this Memory Controller switches to one second pattern by the mode of operation of this memorizer memory devices from a first mode, this at least one access instruction comprises that one first writes instruction and this first and writes instruction and comprise that one writes word string, and this Memory Controller writes word string and carries out writing the operation of word string according to this.
22. memorizer memory devices according to claim 21, is characterized in that, this connector is coupled to the card reader and this Memory Controller that are connected to this host computer system and from this host computer system, receives this at least one access instruction by this card reader.
23. memorizer memory devices according to claim 21, is characterized in that, this at least one access instruction also comprises multiple the first reading command,
Wherein judge described whether this at least one access instruction meets in the work of this pre-defined form, this Memory Controller can judge whether those first reading command meet a pre-defined reading format;
If when wherein those first reading command meet this pre-defined reading format, this Memory Controller can judge that this first writes indicated this of instruction and write one of them whether word string meets multiple pre-defined order formats,
If this is first when writing indicated this of instruction and writing word string and meet one of them of those pre-defined order formats, this Memory Controller can be identified this at least one access instruction and meet this pre-defined form.
24. memorizer memory devices according to claim 23, is characterized in that, this Memory Controller configures multiple logical addresses to shine upon multiple physical page of this duplicative non-volatile memory module,
Wherein judge described whether those first reading command meet in the work of this pre-defined reading format, this Memory Controller can judge whether those first reading command indicate one first logical address reading continuously among those logical addresses,
If when this first logical address among those logical addresses is read in those the first reading command indications continuously, this Memory Controller can be identified those first reading command and meet this pre-defined reading format.
25. memorizer memory devices according to claim 23, it is characterized in that, this Memory Controller is more in order to during this second pattern, from this host computer system, receive one second reading command and judge whether the indicated logical address of this second reading command is a pre-defined logical address
If when this indicated logical address of this second reading command is this pre-defined logical address, this Memory Controller can send at least one system information to this host computer system.
26. memorizer memory devices according to claim 23, it is characterized in that, this Memory Controller can first write indicated this of instruction and writes word string and from this memorizer memory devices, obtain at least one system information and this at least one system information is deposited to this memory buffer of this memorizer memory devices according to this.
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| CN201210550006.7A CN103870209B (en) | 2012-12-18 | 2012-12-18 | Working mode switching method, Memory Controller and memorizer memory devices |
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| CN201210550006.7A CN103870209B (en) | 2012-12-18 | 2012-12-18 | Working mode switching method, Memory Controller and memorizer memory devices |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017016522A1 (en) * | 2015-07-30 | 2017-02-02 | 华为技术有限公司 | Hybrid storage device, computer, control equipment, and method for reducing power consumption |
| CN110045917A (en) * | 2017-12-18 | 2019-07-23 | 爱思开海力士有限公司 | Storage system and its operating method |
| CN110265075A (en) * | 2018-03-12 | 2019-09-20 | 龙芯中科技术有限公司 | A kind of control method and system of memory interface |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102200946B (en) * | 2010-03-22 | 2014-11-19 | 群联电子股份有限公司 | Data access method, memory controller and storage system |
| CN102707969A (en) * | 2012-04-25 | 2012-10-03 | 中颖电子股份有限公司 | Storage card capable of updating firmware at any time in communication and firmware updating method thereof |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017016522A1 (en) * | 2015-07-30 | 2017-02-02 | 华为技术有限公司 | Hybrid storage device, computer, control equipment, and method for reducing power consumption |
| US10430096B2 (en) | 2015-07-30 | 2019-10-01 | Huawei Technologies Co., Ltd. | Hybrid storage device, computer, control device, and power consumption reduction method |
| CN110045917A (en) * | 2017-12-18 | 2019-07-23 | 爱思开海力士有限公司 | Storage system and its operating method |
| CN110045917B (en) * | 2017-12-18 | 2022-06-10 | 爱思开海力士有限公司 | Memory system and operating method thereof |
| CN110265075A (en) * | 2018-03-12 | 2019-09-20 | 龙芯中科技术有限公司 | A kind of control method and system of memory interface |
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| CN103870209B (en) | 2016-12-28 |
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