CN103856411A - Switching system connected with UART interface of router - Google Patents
Switching system connected with UART interface of router Download PDFInfo
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- CN103856411A CN103856411A CN201210510109.0A CN201210510109A CN103856411A CN 103856411 A CN103856411 A CN 103856411A CN 201210510109 A CN201210510109 A CN 201210510109A CN 103856411 A CN103856411 A CN 103856411A
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Abstract
The invention discloses a switching system connected with a UART interface of a router. The router comprises a pin header with five pins. The switching system comprises a switch control circuit and a female header. The UART interface is connected with the switch control circuit. The switch control circuit comprises a first access and a second access, and is connected with the pin header through the first access. The switch control circuit is used for detecting whether the pin header is in inserted connection with the female header or not, if yes, the switch control circuit is switched to the first access, and the UART interface transmits a start message of the router through the first access by serving as an adjusting port, and if not, the switch control circuit is switched to the second access. The UART interface can be switched between the adjusting port and a data transmission communication port, it is unnecessary to change the design scheme of a main chip of the router, development cost is lowered, development period is shortened, and development risks are reduced.
Description
Technical field
The present invention relates to a kind of switched system of UART interface connection of router, particularly relate to a kind of switched system of UART interface connection of the router that can UART interface be switched between debug port and transfer of data port by ON-OFF control circuit.
Background technology
Universal asynchronous reception/the dispensing device of UART() be a kind of widely used short distance serial transmission interface, conventionally in Design of Home Gateway, can be designed to debug port, home gateway is arranged on the terminal in subscriber household, the equipment that connects communication network and subscriber household network, realize the exchange of household internal information and family's external information, beyond doubt the purpose of family's networking.The feature of home gateway is at present:
Existing market main flow router is only supported routing function mostly, and the UART interface of its master chip is designed to the debug port of function singleness conventionally, and form is single, function is simple, gradually can not meet the demand in market.And along with the fast-developing of network technology with merge, router also needs to be endowed more function at leisure, except traditional Network Access Point routing function, need IPTV(IPTV), the voice call function etc. of band SIM card (client identification module claims again subscriber identification card) registration.Now just need to switch the function of UART interface, UART interface need to be switched to transfer of data port from traditional debug port goes to access SIM card and realizes voice registrations, and cannot share in the prior art same UART interface this time, can there is the problem of the competing use of serial ports, if use same UART interface can make device program collapse as transfer of data port again as debug port, because an interface is to process two kinds of different communication patterns simultaneously.
Carry out the master chip to router again and design and all need to reselect high-end chip in prior art, this can bring huge software development and hardware development work and R&D risk, and certainly, cost also can be very huge.
Summary of the invention
The technical problem to be solved in the present invention is the switching that realizes UART interface function in prior art in order to overcome, need to carry out the master chip to router again and design by reselecting high-end chip, cause bringing huge work and the defect of R&D risk, the switched system that provides a kind of UART interface of the router that can UART interface be switched between debug port and transfer of data port by ON-OFF control circuit to connect.
The present invention solves above-mentioned technical problem by following technical proposals:
The invention provides a kind of switched system of UART interface connection of router, this router comprises that one has row's pin of five pins, its feature is, this switched system also comprises an ON-OFF control circuit and one and mother row that matches of this row's pin, this UART interface is connected with this ON-OFF control circuit, this ON-OFF control circuit comprises one first path and an alternate path, and be connected with the data transmit-receive pin of this row's pin by this first path, whether this ON-OFF control circuit plugs for detection of this row's pin and this mother row, if, this ON-OFF control circuit switches to this first path, and this UART interface transmits the log-on message of this router by this first path as debug port, if not, this ON-OFF control circuit switches to this alternate path.
Existing router all comprises row's pin with five pins, data transmit-receive pin by row's pin is connected and fetches using UART Interface realization as debug port with UART interface, first the log-on message of this router is recorded, after router product has started, user can utilize software instruction to recall this log-on message by UART interface at any time and check in needs, and user also can debug router product by UART interface, these all belong to technology well known in the art, just repeat no more at this.
And this switched system also comprises this ON-OFF control circuit and this mother row, this ON-OFF control circuit can detect this row's pin and whether this mother row plugs, if, this ON-OFF control circuit switches to this first path, this UART interface just can transmit as debug port the log-on message of this router by this first path, if not, this ON-OFF control circuit just switches to this alternate path, connect a communication module by this alternate path again, as display screen, printer and other function that can be operated in UART serial communication mode are applied, this UART interface just can be used as transfer of data port and carries out data interaction by this ON-OFF control circuit and this communication module.
Therefore, by this switched system, just can realize UART interface is switched between debug port and transfer of data port, and needn't change the design of router master chip, reduce development cost and construction cycle, reduce the risk of exploitation.
Preferably, this router also comprises a FLASH(flash memory), when this ON-OFF control circuit detects when no, also this log-on message is stored in this FLASH.
When this ON-OFF control circuit detects when no, this ON-OFF control circuit switches to this alternate path, this UART interface comes to communicate or initialize communications module with communication module by this ON-OFF control circuit as transfer of data port, and now UART interface just cannot be re-used as debug port and record this log-on message.At this moment in this FLASH, marking off a LOG(daily record) subregion deposits all log-on messages, and in the time that this row is female and this row's pin is not pegged graft, this ON-OFF control circuit can switch back to this first path, this UART interface also can be again as debug port, if now research staff need to check log-on message, just can recall this log-on message by this debug port and check.
Preferably, this router also comprises a GPIO(universal input/output) interface, this GPIO interface is high level, and this GPIO interface is connected with a power supply by one first resistance, and is connected with this ON-OFF control circuit by one first port;
This mother's row vacant pin is connected by one second resistance with grounding pin, and in the time of this row's pin and the grafting of this row's parent phase, this vacant pin is also connected with this ON-OFF control circuit by this first port;
Whether this ON-OFF control circuit is low level for detection of this first port, and if so, this row's pin and this row's parent phase are pegged graft, and if not, this row's pin and this mother row do not peg graft.
Five female pins of existing row are all not connect, have mutually function separately, and in the present invention the female vacant pin of row is connected by this second resistance with grounding pin, and in the time of this row's pin and the grafting of this row's parent phase, this vacant pin is also connected with this ON-OFF control circuit by this first port, and the level of this first port just becomes low level like this.
Therefore, in the time of this row's pin and the grafting of this row's parent phase, this first port is low level, and in the time that this row's pin and this mother row do not peg graft, the level of this first port is identical with this GPIO interface, be high level, thereby this ON-OFF control circuit just can judge this row's pin by the height of the level of this first port and whether this mother row plugs.
Preferably, in the time that this ON-OFF control circuit switches to this alternate path, this UART interface carries out data interaction as transfer of data port and a communication module.
Positive progressive effect of the present invention is: the present invention can realize switches UART interface between debug port and transfer of data port, and needn't change the design of router master chip, reduce development cost and construction cycle, reduced the risk of exploitation.
Accompanying drawing explanation
Fig. 1 is the structural representation of the switched system of the UART interface connection of the router of a preferred embodiment of the present invention.
Fig. 2 is mother's row of a preferred embodiment of the present invention structural representation.
Fig. 3 is the UART interface of the router of a preferred embodiment of the present invention flow chart in switched system when work of connecting.
Embodiment
Provide preferred embodiment of the present invention below in conjunction with accompanying drawing, to describe technical scheme of the present invention in detail.
Be illustrated in figure 1 the switched system that the UART interface 11 of router one of the present invention connects, this router one comprises that one has row's pin 12, a FLASH13 and a GPIO interface 14 of five pins, and this switched system also comprises an ON-OFF control circuit 2 and one and mother row 3 that matches of this row's pin.
This UART interface 11 is connected with this ON-OFF control circuit 2, and this ON-OFF control circuit 2 comprises one first path 21 and an alternate path 22, and is connected with the data transmit-receive pin of this row's pin 12 by this first path 21.
This GPIO interface 14 is high level, and this GPIO interface 14 is by first resistance R of a 10K ohm
1be connected with the power supply of a 3.3V, and be connected with this ON-OFF control circuit 2 by one first port.
This mother's row 3 vacant pin and grounding pin are by second resistance R of a 1K ohm
2be connected, in the time that this row's pin 12 plugs with this mother row 3, this vacant pin is also connected with this ON-OFF control circuit 2 by this first port.
Five pins of existing row female 3 are all not connect, have mutually function separately, and as shown in Figure 2, in the present invention, vacant pin of the row female 3 and grounding pin are passed through to this second resistance R
2be connected, and in the time that this row's pin 12 plugs with this mother row 3, this vacant pin is also connected with this ON-OFF control circuit 2 by this first port, like this due to ground connection, the level of this first port just becomes low level.
Therefore, in the time that this row's pin 12 plugs with this mother row 3, this first port is low level, and in the time that this row's pin 12 is not pegged graft with this mother row 3, the level of this first port is identical with this GPIO interface 14, be high level, thereby this ON-OFF control circuit 2 just can judge this row's pin 12 by the height of the level of this first port and whether this mother row 3 plugs.
Whether this ON-OFF control circuit 2 is low level by detecting this first port, if, this row's pin 12 plugs with this mother row 3, now this ON-OFF control circuit 2 just switches to this first path 21, this UART interface 11 just can be served as debug port by the log-on message of these the first path 21 these router ones of transmission, if not, this row's pin 12 is not just pegged graft with this row female 3, now this ON-OFF control circuit 2 switches to this alternate path 22, connect a communication module by this alternate path 22 again, as display screen, printer and other function that can be operated in UART serial communication mode are applied, this UART interface 11 just can be used as transfer of data port and carries out data interaction by this ON-OFF control circuit 2 with this communication module.
And detect when no when this ON-OFF control circuit 2, this ON-OFF control circuit 2 switches to this alternate path 22, this UART interface 11 communicates with communication module or initialize communications module by this ON-OFF control circuit 2 as transfer of data port, and now UATR interface 11 just cannot be re-used as debug port and record this log-on message.At this moment in this FLASH13, mark off a LOG subregion and deposit all log-on messages, and in the time that this row female 12 does not peg graft with this row's pin 3, this ON-OFF control circuit 2 can switch back to this first path 21, this UART interface 11 also can be again as debug port, if now research staff need to check log-on message, just can recall this log-on message by this debug port and check.
And utilizing software instruction to recall this log-on message by UART interface 11 at any time in needs, user checks, and user also can debug router one product by UART interface 11, these all belong to technology well known in the art, just repeat no more at this.
As shown in Figure 3, in the time that the connection of the UART interface 11 that utilizes this switched system to router one is switched, specific works flow process is as follows:
Step 100, this router one product power on, and this ON-OFF control circuit 2 detects whether this first port is low level, if so, performs step 101, if not, performs step 102.
Step 101, this ON-OFF control circuit 2 switch to this first path 21, and this UART interface 11 transmits the log-on message of these router ones, then process ends by this first path 21 as debug port.
Step 102, this ON-OFF control circuit 2 switch to this alternate path 22, connect a communication module by this alternate path 22 again, this UART interface 11 carries out data interaction, then process ends by this ON-OFF control circuit 2 with this communication module as transfer of data port.
Although more than described the specific embodiment of the present invention, it will be understood by those of skill in the art that these only illustrate, protection scope of the present invention is limited by appended claims.Those skilled in the art is not deviating under the prerequisite of principle of the present invention and essence, can make various changes or modifications to these execution modes, but these changes and modification all fall into protection scope of the present invention.
Claims (4)
1. the switched system that the UART interface of a router connects, this router comprises that one has row's pin of five pins, it is characterized in that, this switched system also comprises an ON-OFF control circuit and one and mother row that matches of this row's pin, this UART interface is connected with this ON-OFF control circuit, this ON-OFF control circuit comprises one first path and an alternate path, and be connected with the data transmit-receive pin of this row's pin by this first path, whether this ON-OFF control circuit plugs for detection of this row's pin and this mother row, if, this ON-OFF control circuit switches to this first path, and this UART interface transmits the log-on message of this router by this first path as debug port, if not, this ON-OFF control circuit switches to this alternate path.
2. switched system as claimed in claim 1, is characterized in that, this router also comprises a FLASH, when this ON-OFF control circuit detects when no, also this log-on message is stored in this FLASH.
3. switched system as claimed in claim 2, it is characterized in that, this router also comprises a GPIO interface, and this GPIO interface is high level, and this GPIO interface is connected with a power supply by one first resistance, and be connected with this ON-OFF control circuit by one first port;
This mother's row vacant pin is connected by one second resistance with grounding pin, and in the time of this row's pin and the grafting of this row's parent phase, this vacant pin is also connected with this ON-OFF control circuit by this first port;
Whether this ON-OFF control circuit is low level for detection of this first port, and if so, this row's pin and this row's parent phase are pegged graft, and if not, this row's pin and this mother row do not peg graft.
4. switched system as claimed in claim 3, is characterized in that, in the time that this ON-OFF control circuit switches to this alternate path, this UART interface carries out data interaction as transfer of data port and a communication module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210510109.0A CN103856411B (en) | 2012-12-03 | 2012-12-03 | Switching system connected with UART interface of router |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210510109.0A CN103856411B (en) | 2012-12-03 | 2012-12-03 | Switching system connected with UART interface of router |
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| CN103856411A true CN103856411A (en) | 2014-06-11 |
| CN103856411B CN103856411B (en) | 2017-05-24 |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105868140A (en) * | 2016-03-25 | 2016-08-17 | 乐视控股（北京）有限公司 | A mobile apparatus |
| CN105893301A (en) * | 2015-04-17 | 2016-08-24 | 乐视致新电子科技（天津）有限公司 | Control circuit of external functional module, external functional module and terminal device |
| CN106161146A (en) * | 2016-08-24 | 2016-11-23 | 上海斐讯数据通信技术有限公司 | A kind of route system antitheft startup method and device, router |
| CN106708731A (en) * | 2016-11-29 | 2017-05-24 | 郑州云海信息技术有限公司 | Equipment debugging switching method and CPLD (Complex Programmable Logic Device) |
| CN108429693A (en) * | 2018-02-09 | 2018-08-21 | 上海康斐信息技术有限公司 | A kind of router and its control method of debugging mouth and network interface multiplexing |
| CN109862583A (en) * | 2019-01-04 | 2019-06-07 | 新华三技术有限公司 | A kind of method and device reporting exception information |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105893301A (en) * | 2015-04-17 | 2016-08-24 | 乐视致新电子科技（天津）有限公司 | Control circuit of external functional module, external functional module and terminal device |
| CN105868140A (en) * | 2016-03-25 | 2016-08-17 | 乐视控股（北京）有限公司 | A mobile apparatus |
| WO2017161750A1 (en) * | 2016-03-25 | 2017-09-28 | 乐视控股（北京）有限公司 | Mobile apparatus |
| CN106161146A (en) * | 2016-08-24 | 2016-11-23 | 上海斐讯数据通信技术有限公司 | A kind of route system antitheft startup method and device, router |
| CN106708731A (en) * | 2016-11-29 | 2017-05-24 | 郑州云海信息技术有限公司 | Equipment debugging switching method and CPLD (Complex Programmable Logic Device) |
| CN108429693A (en) * | 2018-02-09 | 2018-08-21 | 上海康斐信息技术有限公司 | A kind of router and its control method of debugging mouth and network interface multiplexing |
| CN109862583A (en) * | 2019-01-04 | 2019-06-07 | 新华三技术有限公司 | A kind of method and device reporting exception information |
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| CN103856411B (en) | 2017-05-24 |
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