CN103811422B - A kind of processing unit of cmos silicon chip sliver and processing method thereof - Google Patents
A kind of processing unit of cmos silicon chip sliver and processing method thereof Download PDFInfo
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- CN103811422B CN103811422B CN201410064069.0A CN201410064069A CN103811422B CN 103811422 B CN103811422 B CN 103811422B CN 201410064069 A CN201410064069 A CN 201410064069A CN 103811422 B CN103811422 B CN 103811422B
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- silicon chip
- paper layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
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Abstract
The invention provides a kind of processing unit and processing method thereof of cmos silicon chip sliver, described processing unit comprises pressure-bearing portion, press section and copper rod, described pressure-bearing portion is connected with press section by connector, described pressure-bearing portion is disposed with elastomeric pad, the first PVC transparent sheet and the first rice paper layer from top to bottom, and described press section is provided with the second rice paper layer and the second PVC transparent sheet from top to bottom successively; Method is as follows: drip refrigerant toward the first rice paper layer and the second rice paper layer; The face down of full wafer silicon chip is positioned on the first rice paper layer, then the lower press section of lid; Copper rod is put in the top of press section, and respectively pushes once along horizontal, longitudinal Cutting Road direction of full wafer silicon chip, form silicon chip sliver; Overturn by whole processing unit, then the front of silicon chip sliver all upward, then select qualified silicon chip sliver.The present invention can improve the fractionation efficiency of silicon chip sliver greatly, does not simultaneously scratch silicon chip surface, and can not produce and collapse limit and frictional static phenomenon.
Description
[technical field]
The present invention relates to a kind of processing unit and processing method thereof of cmos silicon chip sliver.
[background technology]
CMOS is ComplementaryMetalOxideSemiconductor(complementary metal oxide semiconductors (CMOS)) abbreviation.It refers to a kind of technology of manufacturing large scale integrated chip or with the produced chip of this technology.It is the read-write RAM chip of on computer main board one piece.Because read-write characteristic, so be used for preserving BIOS to set up the data after computer hardware parameter on computer main board, this chip is only used to store data, and it has adopted silicon chip structure.
The fractionation of existing silicon chip sliver is generally the whole piece silicon chip with Cutting Road anyhow that will make, manually undertaken sliding by the Cutting Road on full wafer silicon chip and then disassemble lower silicon slice sliver, efficiency very low, cost of labor is high, and easily scratches silicon chip and chip surrounding when operating and there will be and collapse limit.The silicon chip sliver simultaneously dismantled is stacked irregular, chooses sheet length consuming time.
[summary of the invention]
One of the technical problem to be solved in the present invention, is the processing unit providing a kind of cmos silicon chip sliver, greatly can improves the fractionation efficiency of silicon chip sliver, does not scratch silicon chip surface simultaneously.
The present invention realizes one of above-mentioned technical problem like this:
A kind of processing unit of cmos silicon chip sliver, described processing unit comprises a pressure-bearing portion, a press section and a copper rod, described pressure-bearing portion is connected with press section by a connection piece, described pressure-bearing portion is disposed with an elastomeric pad, one first PVC transparent sheet and one first rice paper layer from top to bottom, and described press section is provided with one second rice paper layer and one second PVC transparent sheet from top to bottom successively.
Further, described elastomeric pad, the first PVC transparent sheet, the first rice paper layer, the second rice paper layer and the second PVC transparent sheet are circle.
The technical problem to be solved in the present invention two, is the processing method providing a kind of cmos silicon chip sliver, greatly can improves the fractionation efficiency of silicon chip sliver, does not simultaneously scratch silicon chip surface, and can not produce and collapse limit and frictional static phenomenon.
The present invention realizes above-mentioned technical problem two like this:
A kind of processing method of cmos silicon chip sliver, the processing unit that described processing method uses comprises a pressure-bearing portion, a press section and a copper rod, described pressure-bearing portion is connected with press section by a connection piece, described pressure-bearing portion is disposed with an elastomeric pad, one first PVC transparent sheet and one first rice paper layer from top to bottom, and described press section is provided with one second rice paper layer and one second PVC transparent sheet from top to bottom successively;
Described process method step is as follows:
Step 10, the pressure-bearing portion of processing unit and press section to be opened, namely pressure-bearing portion under, press section, upper, drips refrigerant toward the first rice paper layer and the second rice paper layer;
Step 20, the face down of full wafer silicon chip is positioned on the first rice paper layer, then the lower press section of lid;
Step 30, copper rod is put in the top of press section, and along full wafer silicon chip the pushing of direction, transverse cuts road once, more longitudinally Cutting Road direction pushing is once, evenly firmly, finally forms silicon chip sliver simultaneously;
Step 40, whole processing unit to be overturn, makes pressure-bearing portion upper, press section under, then pressure-bearing portion is opened in the front of silicon chip sliver all upward, then selects qualified silicon chip sliver.
Further, described elastomeric pad, the first PVC transparent sheet, the first rice paper layer, the second rice paper layer and the second PVC transparent sheet are circle.
Tool of the present invention has the following advantages:
The bottommost of processing unit of the present invention is an elastomeric pad, pushing dynamics during fractionation can be made to be cushioned, greatly reduce the damage of silicon chip; Moistening at the upper and lower two-layer rice paper layer refrigerant of contact silicon chip, can either silicon chip surface be protected, the silicon chip sliver after splitting can be made again to fix, facilitate last selecting, and can not produce and collapse limit and frictional static phenomenon.
[accompanying drawing explanation]
The present invention is further illustrated in conjunction with the embodiments with reference to the accompanying drawings.
Fig. 1 is the structural representation of processing unit of the present invention.
[embodiment]
Refer to shown in Fig. 1, embodiments of the invention are described in detail.
The present invention relates to a kind of processing unit of cmos silicon chip sliver, described processing unit comprises pressure-bearing portion 1, press section 2 and a copper rod (not shown), described pressure-bearing portion 1 is connected with press section 2 by a connection piece 3, described pressure-bearing portion 1 is disposed with elastomeric pad 11,1 first PVC transparent sheet 12 and an one first rice paper layer 13 from top to bottom, and described press section 2 is provided with one second rice paper layer 21 and one second PVC transparent sheet 22 from top to bottom successively.
Described elastomeric pad 11, first PVC transparent sheet 12, first rice paper layer 13, second rice paper layer 21 and the second PVC transparent sheet 22 are circle.
The invention still further relates to a kind of processing method of cmos silicon chip sliver, described processing method utilizes above-mentioned processing unit to carry out process silicon chip sliver;
Described process method step is as follows:
Step 10, the pressure-bearing portion 1 of processing unit and press section 2 to be opened, namely pressure-bearing portion 1 under, press section 2 upper, toward the first rice paper layer 13 and the second rice paper layer 21 refrigerant;
Step 20, the face down of full wafer silicon chip is positioned on the first rice paper layer 13, then the lower press section 2 of lid;
Step 30, copper rod is put in the top of press section 2, and along full wafer silicon chip the pushing of direction, transverse cuts road once, more longitudinally Cutting Road direction pushing is once, evenly firmly, finally forms silicon chip sliver simultaneously;
Step 40, whole processing unit to be overturn, makes pressure-bearing portion 1 upper, press section 2 under, then pressure-bearing portion is opened in the front of silicon chip sliver all upward, then selects qualified silicon chip sliver.
The bottommost of processing unit of the present invention is an elastomeric pad 11, pushing dynamics during fractionation can be made to be cushioned, greatly reduce the damage of silicon chip; Moistening at the upper and lower two-layer rice paper layer refrigerant of contact silicon chip, can either silicon chip surface be protected, the silicon chip sliver after splitting can be made again to fix, facilitate last selecting, and can not produce and collapse limit and frictional static phenomenon.
Although the foregoing describe the specific embodiment of the present invention; but be familiar with those skilled in the art to be to be understood that; specific embodiment described by us is illustrative; instead of for the restriction to scope of the present invention; those of ordinary skill in the art, in the modification of the equivalence done according to spirit of the present invention and change, should be encompassed in scope that claim of the present invention protects.
Claims (4)
1. the processing unit of a cmos silicon chip sliver, it is characterized in that: described processing unit comprises a pressure-bearing portion, a press section and a copper rod, described pressure-bearing portion is connected with press section by a connection piece, described pressure-bearing portion is disposed with an elastomeric pad, one first PVC transparent sheet and one first rice paper layer from top to bottom, and described press section is provided with one second rice paper layer and one second PVC transparent sheet from top to bottom successively.
2. the processing unit of a kind of cmos silicon chip sliver according to claim 1, is characterized in that: described elastomeric pad, the first PVC transparent sheet, the first rice paper layer, the second rice paper layer and the second PVC transparent sheet are circle.
3. the processing method of a cmos silicon chip sliver, it is characterized in that: the processing unit that described processing method uses comprises a pressure-bearing portion, a press section and a copper rod, described pressure-bearing portion is connected with press section by a connection piece, described pressure-bearing portion is disposed with an elastomeric pad, one first PVC transparent sheet and one first rice paper layer from top to bottom, and described press section is provided with one second rice paper layer and one second PVC transparent sheet from top to bottom successively;
Described process method step is as follows:
Step 10, the pressure-bearing portion of processing unit and press section to be opened, namely pressure-bearing portion under, press section, upper, drips refrigerant toward the first rice paper layer and the second rice paper layer;
Step 20, the face down of full wafer silicon chip is positioned on the first rice paper layer, then the lower press section of lid;
Step 30, copper rod is put in the top of press section, and along full wafer silicon chip the pushing of direction, transverse cuts road once, more longitudinally Cutting Road direction pushing is once, evenly firmly, finally forms silicon chip sliver simultaneously;
Step 40, whole processing unit to be overturn, makes pressure-bearing portion upper, press section under, then the front of silicon chip sliver is all upward, opens pressure-bearing portion, then selects qualified silicon chip sliver.
4. the processing method of a kind of cmos silicon chip sliver according to claim 3, is characterized in that: described elastomeric pad, the first PVC transparent sheet, the first rice paper layer, the second rice paper layer and the second PVC transparent sheet are circle.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410064069.0A CN103811422B (en) | 2014-02-25 | 2014-02-25 | A kind of processing unit of cmos silicon chip sliver and processing method thereof |
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| CN201410064069.0A CN103811422B (en) | 2014-02-25 | 2014-02-25 | A kind of processing unit of cmos silicon chip sliver and processing method thereof |
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| CN103811422B true CN103811422B (en) | 2016-04-13 |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104044058A (en) * | 2014-06-19 | 2014-09-17 | 丹阳市鑫烨光学仪器有限公司 | Method for grinding silicon wafers by means of yellow cover paper |
| CN105590884B (en) * | 2015-12-30 | 2018-06-01 | 天津天物金佰微电子有限公司 | Semi-automatic chip breaking machine and splinter method |
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| CN1719586A (en) * | 2004-07-05 | 2006-01-11 | 温大同 | Method for cutting wafer |
| CN201816147U (en) * | 2010-09-19 | 2011-05-04 | 扬州杰利半导体有限公司 | Semiconductor chip splitting tool |
| CN102244039A (en) * | 2010-05-11 | 2011-11-16 | 扬州杰利半导体有限公司 | Splitting method of semiconductor wafer |
| CN203357704U (en) * | 2013-07-12 | 2013-12-25 | 史振华 | Directional slivering tool for wafer |
| CN203746819U (en) * | 2014-02-25 | 2014-07-30 | 福建安特微电子有限公司 | Cmos silicon chip fragment processing device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52156551A (en) * | 1976-06-23 | 1977-12-27 | Toshiba Corp | Semiconductor wafer breaking method |
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Patent Citations (5)
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| CN1719586A (en) * | 2004-07-05 | 2006-01-11 | 温大同 | Method for cutting wafer |
| CN102244039A (en) * | 2010-05-11 | 2011-11-16 | 扬州杰利半导体有限公司 | Splitting method of semiconductor wafer |
| CN201816147U (en) * | 2010-09-19 | 2011-05-04 | 扬州杰利半导体有限公司 | Semiconductor chip splitting tool |
| CN203357704U (en) * | 2013-07-12 | 2013-12-25 | 史振华 | Directional slivering tool for wafer |
| CN203746819U (en) * | 2014-02-25 | 2014-07-30 | 福建安特微电子有限公司 | Cmos silicon chip fragment processing device |
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| 基于MEMS技术的硅微神经电极阵列的设计与制造;韩雪;《中国优秀硕士学位论文全文数据库 信息科技辑》;20091127;第2009年卷(第11期);全文 * |
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