CN103809645B - Starting circuit for wide power band gap reference source - Google Patents
Starting circuit for wide power band gap reference source Download PDFInfo
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- CN103809645B CN103809645B CN201410078344.4A CN201410078344A CN103809645B CN 103809645 B CN103809645 B CN 103809645B CN 201410078344 A CN201410078344 A CN 201410078344A CN 103809645 B CN103809645 B CN 103809645B
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Abstract
The invention relates to the technical field of an integrated circuit, and in particular to a non-overshoot starting circuit for a wide power band gap reference source. The starting process is divided into two stages, the first stage is an enabling control start process, the initial stage of the second stage is combined with a two-stage load pipe in an operational amplifier to form a feedback loop, and output current is adjusted to be within a non-overshoot controllable range, so that non-ideal overshoot phenomenon in the start process is effectively avoided; meanwhile, a current path is kept in the circuit, so that the circuit enters a later stage to rapidly build reference voltage. Due to existence of soft start of the feedback loop, the starting circuit is free of overshoot when being started at high voltage, and can ensure enough start current when being started at low voltage, so that the reference normally works. Thus, application of non-overshoot and wide power supply range is achieved. The starting circuit disclosed by the invention is particularly applied to the starting circuit for the wide power band gap reference source.
Description
Technical field
The present invention relates to technical field of integrated circuits, be specifically related to a kind of for wide power band gap reference without overshoot start-up circuit.
Background technology
Reference voltage source is component units module important in Analogous Integrated Electronic Circuits chip, for generation of the voltage reference not with supply voltage and temperature variation, for other circuit modules provide a reference voltage.Because reference voltage source is usually with two steady state (SS)s, in order to ensure the nonideality can breaking away from zero current after reference circuit powers on smoothly, reduce the harmful effect brought by offset voltage and offset current in power up, need design start-up circuit, after ensureing occurring a disturbance in reference circuit, circuit still can normally work, and after reference source normally works, start-up circuit cuts out and quits work.
The start-up circuit working method of current routine is carried out the on off state of gauge tap pipe, drives the grid of PMOS power tube thus start-up circuit.But such starting current is uncontrolled, especially under high voltage applications, there will be starting current excessive, export the undesirable situation of overshoot.And start without overshoot under taking into account high voltage, under may causing low-voltage again, starting current is too small, the phenomenon that benchmark cannot normally start, and cannot adapt to the application of wide power scope.Equally, also there are the problems referred to above in the conventional large resistance of utilization or the Starting mode of bulky capacitor.
Summary of the invention
To be solved by this invention, be exactly for above-mentioned start-up circuit Problems existing, propose a kind of be applicable to wide power range basis source without overshoot start-up circuit.
The present invention solves the problems of the technologies described above adopted technical scheme: a kind of start-up circuit for wide power band gap reference, it is characterized in that, comprise PMOS MPB1, MPB2, MPB3, MPB4, MPB5, MPB6, MPB7, MPB8, MPB9, MPB10, MPB11, MPB12, MPB13, MPB14; NMOS tube MNB1, MNB2, MNB3, MNB4, MNB5, MNB6; Diode D1, D2, D3, D4; Triode QN1, QN2, QN3, QN4, QN5; Resistance RB1, RB2, RB3, RB4, RB5; Electric capacity CB1 and operational amplifier; Wherein,
The source of MPB1, MPB4, MPB5, MPB6, MPB7, MPB8, MPB9, MPB12, MPB13 and MPB14 connects supply voltage;
The grid of MPB1 is connected enable signal with the grid of MNB1;
The drain terminal of MPB1 connects the source of MPB2, the grid end of MPB2 is connected the source of MPB3 with drain terminal, the collector of the grid end of MPB3 and drain terminal and QN1 and the tie point of base stage connect the collector of QN2 and the tie point of base stage, and the emitter of QN1 connects collector and the base stage of QN3;
The collector of the emitter of the drain terminal of MNB1, the forward end of CB1, QN2, the drain terminal of MPB4, QN5 all connects the base stage of QN4, and the emitter of QN4 is all connected the base stage of QN5 with the other end of RB1;
The grid end of the grid end of MPB4, the collector of QN4 and MPB6 connects grid end and the drain terminal of MPB5, and the drain terminal of MPB6 connects grid end and the drain terminal of MNB4, and the source of MNB4 connects the grid end of MNB5 and the grid end of drain terminal and MNB6;
The drain terminal of MNB6, the drain terminal of MPB7 are all connected the grid end of MPB9 with the grid end of grid end, MPB8, and the grid end of MPB8 drain terminal, MPB10 all connects the positive pole of D1;
The source of MPB10, the source of MPB11 all connect the drain terminal of MPB9, and the drain terminal of MPB11 and the drain terminal of MNB2 are connected the grid end of MNB3 with grid end;
The drain terminal of MNB3, the grid end of MPB12, the output terminal of operational amplifier and the grid end of MPB13 all connect the grid end of MPB14, and the drain terminal of MPB12 connects one end of RB2, and the other end of RB2, the inverting input of operational amplifier all connect the positive pole of D2;
The drain terminal of MPB13 connects one end of RB3, and the other end of RB3, the in-phase input end of operational amplifier all connect one end of RB4, and the other end of RB4 connects the positive pole of D3;
One end of the drain terminal of MPB14, the grid end of MPB11 and RB5 is all connected to output port VOUT, and the other end of RB5 connects the positive pole of D4;
The drain terminal of the source of one end of the negative end of the source of MNB1, the emitter of QN3, CB1, the emitter of QN5, RB1, the source of MNB5, MNB6, the negative pole of D1, MPB10, the source of MNB2, the source of MNB3, the negative pole of D2, the negative pole of D3, the equal earthing potential of negative pole of D4.
Beneficial effect of the present invention is, compared with existing start-up circuit, start-up course can be divided into two stages, first stage is enable control start-up course, the subordinate phase initial stage forms feedback control loop in conjunction with secondary loads pipe in amplifier, and adjustment output current, without in overshoot controlled range, effectively prevent overshoot phenomenon undesirable in start-up course, maintain current path in circuit, so that circuit enters later stage, reference voltage is set up rapidly simultaneously; Due to the existence of feedback control loop soft start, start without overshoot under high pressure, start under low pressure and can ensure that enough starting currents make benchmark normally work, thus reach without overshoot and wide power range applications.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of the start-up circuit for wide power band gap reference;
The equivalent circuit diagram at Fig. 2 circuit start process subordinate phase initial stage;
The equivalent circuit diagram in Fig. 3 circuit start process subordinate phase later stage.
Embodiment
Below in conjunction with accompanying drawing, describe technical scheme of the present invention in detail:
As shown in Figure 1, a kind of start-up circuit for wide power band gap reference of the present invention, it is characterized in that, comprise PMOS MPB1, MPB2, MPB3, MPB4, MPB5, MPB6, MPB7, MPB8, MPB9, MPB10, MPB11, MPB12, MPB13, MPB14; NMOS tube MNB1, MNB2, MNB3, MNB4, MNB5, MNB6; Diode D1, D2, D3, D4; Triode QN1, QN2, QN3, QN4, QN5; Resistance RB1, RB2, RB3, RB4, RB5; Electric capacity CB1 and operational amplifier; Wherein,
The source of MPB1, MPB4, MPB5, MPB6, MPB7, MPB8, MPB9, MPB12, MPB13 and MPB14 connects supply voltage;
The grid of MPB1 is connected enable signal with the grid of MNB1;
The drain terminal of MPB1 connects the source of MPB2, the grid end of MPB2 is connected the source of MPB3 with drain terminal, the collector of the grid end of MPB3 and drain terminal and QN1 and the tie point of base stage connect the collector of QN2 and the tie point of base stage, and the emitter of QN1 connects collector and the base stage of QN3;
The collector of the emitter of the drain terminal of MNB1, the forward end of CB1, QN2, the drain terminal of MPB4, QN5 all connects the base stage of QN4, and the emitter of QN4 is all connected the base stage of QN5 with the other end of RB1;
The grid end of the grid end of MPB4, the collector of QN4 and MPB6 connects grid end and the drain terminal of MPB5, and the drain terminal of MPB6 connects grid end and the drain terminal of MNB4, and the source of MNB4 connects the grid end of MNB5 and the grid end of drain terminal and MNB6;
The drain terminal of MNB6, the drain terminal of MPB7 are all connected the grid end of MPB9 with the grid end of grid end, MPB8, and the grid end of MPB8 drain terminal, MPB10 all connects the positive pole of D1;
The source of MPB10, the source of MPB11 all connect the drain terminal of MPB9, and the drain terminal of MPB11 and the drain terminal of MNB2 are connected the grid end of MNB3 with grid end;
The drain terminal of MNB3, the grid end of MPB12, the output terminal of operational amplifier and the grid end of MPB13 all connect the grid end of MPB14, and the drain terminal of MPB12 connects one end of RB2, and the other end of RB2, the inverting input of operational amplifier all connect the positive pole of D2;
The drain terminal of MPB13 connects one end of RB3, and the other end of RB3, the in-phase input end of operational amplifier all connect one end of RB4, and the other end of RB4 connects the positive pole of D3;
One end of the drain terminal of MPB14, the grid end of MPB11 and RB5 is all connected to output port VOUT, and the other end of RB5 connects the positive pole of D4;
The drain terminal of the source of one end of the negative end of the source of MNB1, the emitter of QN3, CB1, the emitter of QN5, RB1, the source of MNB5, MNB6, the negative pole of D1, MPB10, the source of MNB2, the source of MNB3, the negative pole of D2, the negative pole of D3, the equal earthing potential of negative pole of D4.
Principle of work of the present invention is:
Circuit start process was made up of two stages, and wherein enable signal EN controls the open and close duty of start-up circuit.When EN is high level, circuit does not work, and after EN saltus step is low level, start-up circuit is started working, and the start-up course first stage as shown in Figure 1.
Wherein, enable signal EN saltus step is after low level, and MPB1 pipe is opened, and MNB1 pipe turns off, enable signal control circuit starts, supply voltage charges to electric capacity CB1, and electric capacity both end voltage raises, and NPN pipe QN4 base voltage raises, QN4 conducting, MPB5 branch road has electric current to flow through and obtains the image current of MPB8 branch road and MPB9 branch road through mirror image, and in completing circuit, the demand of all operational amplifier tail currents, provides the precondition of operational amplifier work.When collector voltage more than QN3 pipe of the base voltage of QN4 pipe, QN2 pipe is closed, and starts and terminates.Circuit start process enters next stage subsequently.
The start-up course subordinate phase initial stage is as shown in Figure 2: the source of MPB7 pipe, the source of MPB8 pipe, the source of MPB9 pipe, the source of MPB12 pipe, the source of amplifier OPAMP inner second level load pipe AMP1 pipe, the source of MPB13 pipe and the source of MPB14 pipe all connect supply voltage SBVIN, the negative pole of the negative terminal D1 of bias current sources IB, the drain terminal of MPB10 pipe, the source of MNB2 pipe, the source of MNB3 pipe, the negative pole of D2, the negative end of amplifier OPAMP internal Ll load capacitance CB2, the negative pole of D3 and the negative pole of D4 all connect earth potential, amplifier A1, AMP1 manages, the amplifier OPAMP that AMN1 pipe and electric capacity CB2 constitute, the grid end of MPB7 pipe and drain terminal, the grid end of MPB8 pipe and the grid end of MPB9 pipe all connect the anode of bias current sources IB, the positive pole of diode D1 and the grid end of MPB10 pipe all connect the drain terminal of MPB8 pipe, the source of MPB10 pipe and the source of MPB11 pipe all connect the drain terminal of MPB9 pipe, the grid end of the grid end of MNB2 and drain terminal and MNB3 pipe is all connected the drain terminal of MPB11 pipe, the grid end of MPB12 pipe, the grid end of AMP1 pipe, the grid end of MPB13 pipe, in the grid end of MPB14 pipe and the amplifier second level, the drain terminal of AMN1 pipe all connects the drain terminal of MNB3 pipe, one end of MPB12 pipe drain terminal contact resistance RB2, the other end of the positive pole contact resistance RB2 of D2, one end of the drain terminal contact resistance RB3 of MPB13 pipe, the other end of RB3 is connected with one end of resistance RB4, the other end of RB4 is connected with the positive pole of D3, the grid end of MPB11 pipe, the drain terminal of MPB14 pipe and one end of resistance RB5 all connect output port VOUT, and the other end of resistance RB5 connects the positive pole of diode D4.
Wherein, after enable control circuit starts, conduction voltage drop output voltage and MPB8 branch road being preset equivalent diode D1 compares by differential pair tube MPB10 and MPB11, because reference circuit does not now work, the electric current flow through on RB5 is 0, and D4 does not open, therefore V
oUTvoltage is less than the pressure drop at D1 two ends, and the electric current therefore on tail current source MPB9 all flows through MPB11 pipe, thus has larger electric current to flow into benchmark core, start-up circuit.Along with output voltage V
oUTrising gradually, the starting current flowing into benchmark core reduces gradually.Before core circuit starts normal work, MNB2, MNB3, MPB14 in Fig. 2 and amplifier internal secondary load pipe AMP1 form negative feedback loop, make output voltage V
oUTbe clamped in the pressure drop of D1.After benchmark core circuit is normally set up, the amplifier of core can produce extra current and flow into AMP1, provides bias voltage, produce image current in three branch roads by the grid for MPB12 pipe, MPB13 pipe and MPB14.Now amplifier normally works, start-up course enters the subordinate phase later stage, as shown in Figure 3, the electric current of amplifier inside is regulated by the feedback control loop of normal phase input end and inverting input, make that it reaches balance, output current is zero, therefore MNB3 manages also no current and flows through, electric current all flows through MPB11 and MNB2 branch road, now the electric current of MP8 and MP9 branch road reaches stable, make output voltage higher than the pressure drop on D1 by arranging resistance R6, thus MPB11 turns off, start-up circuit exits, reference circuit is set up to normal working point, and reference voltage source has started.The output of amplifier A1 is set up very slow, and starting the initial stage of subordinate phase, AMN1 pipe turns off.Along with the generation of process of establishing, AMN1 pipe is opened gradually, and MNB3 pipe turns off gradually, thus completes the switching starting loop.
In whole start-up course, first stage is the start-up course of enable control circuit, and the subordinate phase initial stage is the soft start-up process that current feedback loop controls output voltage, and the later stage works gradually with the major loop of amplifier, benchmark is normally set up, the process that start-up circuit exits.The electric current being supplied to benchmark core circuit due to start-up circuit part is loop adjustment gained completely, also can ensure to provide the starting current that benchmark is normally worked under lower pressure; Because the feedback control loop in start-up course regulates under condition of high voltage, make output current controlled, effectively evade the excessive problem causing exporting pulse of electric current.Therefore reach wide power scope and start-up course without the goal of the invention of overshoot.
Claims (1)
1. for a start-up circuit for wide power band gap reference, it is characterized in that, comprise PMOS MPB1, MPB2, MPB3, MPB4, MPB5, MPB6, MPB7, MPB8, MPB9, MPB10, MPB11, MPB12, MPB13, MPB14; NMOS tube MNB1, MNB2, MNB3, MNB4, MNB5, MNB6; Diode D1, D2, D3, D4; Triode QN1, QN2, QN3, QN4, QN5; Resistance RB1, RB2, RB3, RB4, RB5; Electric capacity CB1 and operational amplifier; Wherein,
The source of MPB1, MPB4, MPB5, MPB6, MPB7, MPB8, MPB9, MPB12, MPB13 and MPB14 connects supply voltage;
The grid of MPB1 is connected enable signal with the grid of MNB1;
The drain terminal of MPB1 connects the source of MPB2, the grid end of MPB2 is connected the source of MPB3 with drain terminal, the collector of the grid end of MPB3 and drain terminal and QN1 and the tie point of base stage connect the collector of QN2 and the tie point of base stage, and the emitter of QN1 connects collector and the base stage of QN3;
The collector of the emitter of the drain terminal of MNB1, the forward end of CB1, QN2, the drain terminal of MPB4, QN5 all connects the base stage of QN4, and the emitter of QN4 is all connected the base stage of QN5 with the other end of RB1;
The grid end of the grid end of MPB4, the collector of QN4 and MPB6 connects grid end and the drain terminal of MPB5, and the drain terminal of MPB6 connects grid end and the drain terminal of MNB4, and the source of MNB4 connects the grid end of MNB5 and the grid end of drain terminal and MNB6;
The drain terminal of MNB6, the drain terminal of MPB7 are all connected the grid end of MPB9 with the grid end of grid end, MPB8, and the grid end of MPB8 drain terminal, MPB10 all connects the positive pole of D1;
The source of MPB10, the source of MPB11 all connect the drain terminal of MPB9, and the drain terminal of MPB11 and the drain terminal of MNB2 are connected the grid end of MNB3 with grid end;
The drain terminal of MNB3, the grid end of MPB12, the output terminal of operational amplifier and the grid end of MPB13 all connect the grid end of MPB14, and the drain terminal of MPB12 connects one end of RB2, and the other end of RB2, the inverting input of operational amplifier all connect the positive pole of D2;
The drain terminal of MPB13 connects one end of RB3, and the other end of RB3, the in-phase input end of operational amplifier all connect one end of RB4, and the other end of RB4 connects the positive pole of D3;
One end of the drain terminal of MPB14, the grid end of MPB11 and RB5 is all connected to output port VOUT, and the other end of RB5 connects the positive pole of D4;
The drain terminal of the source of one end of the negative end of the source of MNB1, the emitter of QN3, CB1, the emitter of QN5, RB1, the source of MNB5, MNB6, the negative pole of D1, MPB10, the source of MNB2, the source of MNB3, the negative pole of D2, the negative pole of D3, the equal earthing potential of negative pole of D4.
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| CN201410078344.4A CN103809645B (en) | 2014-03-05 | 2014-03-05 | Starting circuit for wide power band gap reference source |
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| CN201410078344.4A CN103809645B (en) | 2014-03-05 | 2014-03-05 | Starting circuit for wide power band gap reference source |
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Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104750152A (en) * | 2015-03-11 | 2015-07-01 | 上海华虹宏力半导体制造有限公司 | Voltage regulator |
| CN104682191B (en) * | 2015-03-25 | 2018-05-04 | 江苏奥雷光电有限公司 | The driving method and laser drive circuit of laser in a kind of optical module |
| CN106155151A (en) * | 2015-03-31 | 2016-11-23 | 成都锐成芯微科技有限责任公司 | A kind of start-up circuit |
| CN108646842B (en) * | 2018-07-10 | 2023-04-28 | 成都信息工程大学 | Soft start circuit without overshooting suitable for band gap reference source |
| CN112491405B (en) * | 2020-10-27 | 2022-02-01 | 北京智芯微电子科技有限公司 | Reference source based accelerated start circuit for chip |
| CN113985957B (en) * | 2021-12-27 | 2022-04-05 | 唯捷创芯(天津)电子技术股份有限公司 | Overshoot-free quick-start band gap reference circuit, chip and electronic equipment |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050231270A1 (en) * | 2004-04-16 | 2005-10-20 | Clyde Washburn | Low-voltage bandgap voltage reference circuit |
| CN1901344A (en) * | 2006-07-17 | 2007-01-24 | 南京大学 | Voltage reference circuit of pulse width modulation |
| US20070194770A1 (en) * | 2006-02-17 | 2007-08-23 | Vignesh Kalyanaraman | Low voltage bandgap reference circuit and method |
| US20090167281A1 (en) * | 2007-12-26 | 2009-07-02 | Eun-Sang Jo | Bandgap refernce voltage generating circuit |
| CN101881982A (en) * | 2009-05-05 | 2010-11-10 | 瑞萨电子(中国)有限公司 | Voltage stabilizing circuit for preventing overshoot and reference circuit |
| CN102385407A (en) * | 2011-09-21 | 2012-03-21 | 电子科技大学 | Bandgap reference voltage source |
-
2014
- 2014-03-05 CN CN201410078344.4A patent/CN103809645B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050231270A1 (en) * | 2004-04-16 | 2005-10-20 | Clyde Washburn | Low-voltage bandgap voltage reference circuit |
| US20070194770A1 (en) * | 2006-02-17 | 2007-08-23 | Vignesh Kalyanaraman | Low voltage bandgap reference circuit and method |
| CN1901344A (en) * | 2006-07-17 | 2007-01-24 | 南京大学 | Voltage reference circuit of pulse width modulation |
| US20090167281A1 (en) * | 2007-12-26 | 2009-07-02 | Eun-Sang Jo | Bandgap refernce voltage generating circuit |
| CN101881982A (en) * | 2009-05-05 | 2010-11-10 | 瑞萨电子(中国)有限公司 | Voltage stabilizing circuit for preventing overshoot and reference circuit |
| CN102385407A (en) * | 2011-09-21 | 2012-03-21 | 电子科技大学 | Bandgap reference voltage source |
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