CN103794691A - Light emitting diode and method of fabricating the same - Google Patents

Light emitting diode and method of fabricating the same Download PDF

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Publication number
CN103794691A
CN103794691A CN201310527055.3A CN201310527055A CN103794691A CN 103794691 A CN103794691 A CN 103794691A CN 201310527055 A CN201310527055 A CN 201310527055A CN 103794691 A CN103794691 A CN 103794691A
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China
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unit chip
doped region
light
substrate
semiconductor layer
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CN103794691B (en
Inventor
金京完
金泰均
尹余镇
金艺瑟
吴尚炫
李珍雄
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Seoul Viosys Co Ltd
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Seoul Viosys Co Ltd
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Priority claimed from KR1020120121535A external-priority patent/KR20140057425A/en
Priority claimed from KR1020120122554A external-priority patent/KR20140055534A/en
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Publication of CN103794691A publication Critical patent/CN103794691A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/385—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
    • H—ELECTRICITY
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    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0016—Processes relating to electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0058—Processes relating to semiconductor body packages relating to optical field-shaping elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/025—Physical imperfections, e.g. particular concentration or distribution of impurities

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Abstract

Provided are a light emitting diode (LED) and a method of fabricating the same. The LED includes a unit chip. The unit chip includes a substrate, and a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer which are sequentially stacked on the substrate. A concavo-convex structure having the shape of irregular vertical lines is disposed in a side surface of the unit chip.

Description

Light-emitting diode and manufacture method thereof
Technical field
The present invention relates to semiconductor element, more specifically, relate to light-emitting diode.
Background technology
Light-emitting diode is as the element with N-shaped semiconductor layer, p-type semiconductor layer and the active layer between described N-shaped and p-type semiconductor layer, in the time applying positive field to described N-shaped and p-type semiconductor layer, electronics and hole are injected in described active layer, inject electronics and hole in described active layer luminous in compound.
The efficiency of this light-emitting diode depends on the known external quantum efficiency as light extraction efficiency and internal quantum.For improving described light extraction efficiency, there is a kind of so method: on the substrate such as PSS (Patterned Sapphire Substrate, patterning sapphire substrate), form relief pattern, then grown semiconductor layer on described relief pattern.But light extraction efficiency still can be very low.
As the another kind of method for improving light extraction efficiency, KR publication discloses on the upper surface of light-emitting diode for No. 2012-0083740 and has formed relief pattern.
Summary of the invention
On the upper surface of LED, form relief pattern and can be used for improving light extraction efficiency.But, in the side surface of light-emitting diode, form relief pattern not for knowing.The side surface of light-emitting diode, the side surface of unit chip is to form in the scribing step that uses laser, the dry laser using now forms the side surface of unit chip the shiny surface of no concave-convex.
The problem that the present invention will solve is to provide a kind of light-emitting diode and manufacture method thereof that also forms relief pattern and further improve light extraction efficiency in the side of light-emitting diode unit chip.
For realizing described problem, one aspect of the present invention provides light-emitting diode.Described light-emitting diode comprises unit chip.The 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer that described unit chip has substrate and stacks gradually on described substrate.In the side surface of described unit chip, be provided with the irregular vertical nemaline concaveconvex structure vertically forming.
For realizing described problem, one aspect of the present invention provides another example of light-emitting diode.Described light-emitting diode comprises unit chip.The 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer that described unit chip has substrate and stacks gradually on described substrate.A side surface of described unit chip comprises perpendicular to the 1st of the upper surface of described substrate with respect to the 2nd of described the 1st face tilt.The angle (θ 1) that the normal of described the 1st and described the 2nd 's normal forms is less than 90 degree.
For realizing described problem, another aspect of the present invention provides the manufacture method of light-emitting diode.Described manufacture method is included in the step that stacks gradually the 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer on substrate.Afterwards, when described substrate is separated into unit chip, in the side surface of described unit chip, form the irregular vertical nemaline concaveconvex structure vertically forming.The step that described substrate is separated into unit chip can be used jet guide laser (fluid-jet-guided laser) to carry out scribing and carry out.
For realizing described problem, another aspect of the present invention provides another example of the manufacture method of light-emitting diode.Described manufacture method is included in the step that stacks gradually the 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer on substrate.Afterwards, when described substrate is separated into unit chip, the side surface of described unit chip is had perpendicular to the 1st of the upper surface of substrate with respect to the 2nd of described the 1st face tilt.The angle (θ 1) that the normal of described the 1st and described the 2nd 's normal forms is less than 90 degree.The step that described substrate is separated into unit chip can be carried out scribing with jet guide laser and be carried out.
For realizing described problem, another aspect of the present invention provides another example of light-emitting diode.Described light-emitting diode comprises the unit chip of the 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer that have substrate and stack gradually on described substrate.In at least a portion region in the side surface of described unit chip, there is doped region.
For realizing described problem, another aspect of the present invention provides another example of the manufacture method of light-emitting diode.Described manufacture method is included in the step that stacks gradually the 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer on substrate.Described substrate is separated into unit chip; In side surface at least a portion of the unit chip being exposed, form doped region in separation process.
According to the present invention, in the side surface of unit chip, form concaveconvex structure, can reduce the total reflection of the light carrying out along described side surface, can improve luminous efficiency.In addition, the side surface of described unit chip at an upper portion thereof region or lower area has inclined plane, because of this inclined plane, can reduce the total reflection of light, can further improve luminous efficiency.
Accompanying drawing explanation
Fig. 1 a to Fig. 1 d is the profile that shows the method for manufacturing light-emitting of one embodiment of the invention.
Fig. 2 is the perspective view that shows the unit chip forming according to the manufacture method of Fig. 1 a to Fig. 1 d.
Fig. 3 a to Fig. 3 c shows to use jet guide laser to carry out the profile of the step of scribing successively.
Fig. 4 is the amplification profile that shows the A part of Fig. 1 d.
Fig. 5 is the profile that shows the method for manufacturing light-emitting of another embodiment of the present invention.
Fig. 6 a and Fig. 6 b are the profiles that shows the method for manufacturing light-emitting of another embodiment of the present invention.
Fig. 6 c is the perspective view that shows the unit chip forming according to the manufacture method of Fig. 6 a to Fig. 6 b.
Fig. 7 a and Fig. 7 b are the profiles that shows the manufacture method of the light-emitting diode of another embodiment of the present invention.
Fig. 7 c is the perspective view that shows the unit chip forming according to the manufacture method of Fig. 7 a to Fig. 7 b.
Fig. 8 a and Fig. 8 b are the profiles that shows the method for manufacturing light-emitting of another embodiment of the present invention.
Fig. 9 a to Fig. 9 c shows to use jet guide laser to carry out the profile of the step of scribing successively.
Figure 10 is the amplification profile that shows the A part of Fig. 8 a.
Figure 11 is the profile that shows the method for manufacturing light-emitting of another embodiment of the present invention.
Figure 12 a and Figure 12 b are the profiles that shows the method for manufacturing light-emitting of another embodiment of the present invention.
Figure 13 a and Figure 13 b are the profiles that shows the manufacture method of the light-emitting diode of another embodiment of the present invention.
Figure 14 a to Figure 14 c is the profile that shows respectively the method for manufacturing light-emitting of another embodiment of the present invention.
Figure 15 a and Figure 15 b are the photos that shows respectively the side surface of the unit chip of Production Example and comparative example.
Symbol description
Embodiment
Below, in order to be described more specifically the present invention, preferred embodiments of the present invention will be described more in detail hereinafter in conjunction with the accompanying drawings.But the present invention is not defined in the embodiment of explanation herein, can also specialize with other form.
In this manual, when mention layer other layer or substrate " on " time, this layer can be other layer or substrate on directly formation, maybe can have the 3rd layer between between them.In addition, in this manual, upside, upper (portion), directivity statement above etc., also can be understood as downside, under (portion), meaning below etc.That is, the statement of spatiality direction is interpreted as relative direction, must not limit and be interpreted as the absoluteness direction.And in this manual, " the 1st " or " the 2nd " do not really wanted that in addition certain limits to inscape, is interpreted as just for distinguishing the term of inscape.
In addition, in the accompanying drawing of this specification, the thickness in layer and region is exaggerated in order to increase definition.In specification in the whole text, identical reference marks represents identical inscape.
Fig. 1 a to Fig. 1 d is the profile that shows the method for manufacturing light-emitting of one embodiment of the invention.Fig. 2 is the perspective view that shows the unit chip forming according to the manufacture method of Fig. 1 a to Fig. 1 d.
As shown in Figure 1a, provide substrate 10.Described substrate 10 can be sapphire (Al 2o 3), carborundum (SiC), gallium nitride (GaN), InGaN (InGaN), aluminium gallium nitride alloy (AlGaN), aluminium nitride (AlN), gallium oxide (Ga 2o 3) or silicon substrate.As an example, described substrate (10), as an example of nitride semiconductor base plate, can be GaN substrate.
Can on substrate 10, form the 1st conductive-type semiconductor layer 21, active layer 22 and the 2nd conductive-type semiconductor layer 23.Described the 1st conductive-type semiconductor layer 21, active layer 22 and the 2nd conductive-type semiconductor layer 23 can form semiconductor structure bodies 20.
Described the 1st conductive-type semiconductor layer 21 can be nitride based semiconductor layer and can be doped with N-shaped alloy.As an example, described the 1st conductive-type semiconductor layer 21 can be at In xal yga 1-x-ythe layer of Si as N-shaped alloy adulterated in N (0≤x≤1,0≤y≤1, x+y≤1) layer.Described active layer 22 can be In xal yga 1-x-yn (0≤x≤1,0≤y≤1,0≤x+y≤1) layer, can have single quantum or multi-quantum pit structure (multi-quantum well, MQW).Described the 2nd conductive-type semiconductor layer 23 can be also nitride based semiconductor layer and can be doped with p-type alloy.As an example, described the 2nd conductive-type semiconductor layer 23 can be at In xal yga 1-x-ymg or the Zn layer as p-type alloy has adulterated in N (0≤x≤1,0≤y≤1,0≤x+y≤1) layer.Described semiconductor structure bodies 20 can use metal-organic chemical vapor deposition (MOCVD) method or molecular beam epitaxy (MBE) method to form.
As shown in Figure 1 b, can in the upper surface of semiconductor structure bodies 20 (described the 2nd conductive-type semiconductor layer 23 specifically), form coarse patterns 23a.In addition, can in the lower surface of substrate 10, form coarse patterns 10a.Be arranged on coarse patterns 23a in the upper surface of the 2nd conductive-type semiconductor layer 23 and can use plasma etching or Optical Electro-Chemistry etching method to form with the coarse patterns 10a being arranged in the lower surface of described substrate 10, and and relation between the two irrelevant.But, be not defined in this, for forming coarse patterns 23a and form coarse patterns 10a in the upper surface of described the 2nd conductive-type semiconductor layer 23 in the lower surface of described substrate 10, can omit wherein any one, or both all omit.
Afterwards, can be at the upper current spread conducting film 30 that forms of the upper surface of semiconductor structure bodies 20 (the 2nd conductive-type semiconductor layer 23 specifically).Described current spread conducting film 30 can be nesa coating, for example, and ITO (Indium Tin Oxide, indium tin oxide) film.
As shown in Fig. 1 c, current spread conducting film 30, the 2nd conductive-type semiconductor layer 23 and active layer 22 are carried out to platform etching, so that the 1st conductive-type semiconductor layer 21 is exposed in platform etching area M.Can on the 1st exposed conductive-type semiconductor layer 21 and current spread conducting film 30, form respectively the 1st electrode 41 and the 2nd electrode 43.In this accompanying drawing, illustrate inwall or the sidewall of described platform etching area M, flat surface is vertical with respect to the upper surface of described substrate 10, but is not defined in this, and described flat surface has the shape with respect to the upper surface inclination predetermined inclination of described substrate 10.As an example, described platform etching area M can have the shape that narrows gradually or broaden from its width of Yue Xiang bottom, top.
As shown in Fig. 1 d and Fig. 2, described semiconductor structure bodies 20 and described substrate 10 are carried out to scribing, form separated region SL, thereby be separated into unit chip UC.Meanwhile, in the side surface of described unit chip UC, form concaveconvex structure CC.
For this reason, described scribing can be used jet guide laser (fluid-jet-guided laser, WGL) to carry out.Particularly, can make described jet guide laser WGL be positioned to be exposed to the semiconductor structure bodies 20 of platform etching area M (particularly, the 1st conductive-type semiconductor layer 21) upper, then make its direction along the lower surface towards substrate 10 advance, thereby carry out scribing.Fluid can be water.
Fig. 3 a to Fig. 3 c shows to use jet guide laser to carry out the profile of the step of scribing successively.
As shown in Fig. 2, Fig. 3 a to Fig. 3 c, laser beam L at jet W(at fluid column) in advance, wherein, described laser beam L is by means of the total reflection in the interface between described jet W and its outside air, it is advanced and is defined in described jet W.Now, the multiple laser beam L that advance in described jet W disperse to distribute in described jet W, arrive at the surface of etched material with mutually different incidence angle.Result, be different from the situation that uses dry laser or physics to block (physical breaking), in the side of described unit chip UC, form the vertical nemaline concaveconvex structure CC of the irregular vertical direction irrelevant with the crystal plane of semiconductor structure bodies 20 (particularly, described the 1st conductive-type semiconductor layer (21)) or described substrate 10.Particularly, the width and/or the length that are arranged on the depressed part in described concaveconvex structure CC can be different, and its layout also can be irregular.Due to this concaveconvex structure CC, the total reflection meeting of the light of advancing to the side of described unit chip UC from described active layer 22 in described unit chip UC is reduced, thereby can improves light extraction efficiency.In Fig. 2, the bottom surface that illustrates each depressed part has sharp shape, but is not defined in this, and the bottom surface of each depressed part can be curved surface or smooth face.
In the time of the Surface Contact of jet W and semiconductor structure bodies 20 (particularly, described the 1st conductive-type semiconductor layer 21), the width of jet W can increase due to the surface tension of fluid that (Fig. 3 a).Now, the upper width of separated region SL can be larger than the original width of jet W.Afterwards, carry out along with etched, the width of jet W can revert to original width, thus the width of separated region SL also can be corresponding with the original width of jet W (Fig. 3 b).Finally, proceed along with etched, jet W can connect the lower surface of substrate 10, now, due to surface tension, makes the width of described jet W can again increase that (Fig. 3 c).Therefore, the lower width of separated region SL also can strengthen than the original width of described jet W.
Now, etch-rate (etch rate) by jet guide laser WGL to described semiconductor structure bodies 20 (particularly, described the 1st conductive-type semiconductor layer 21) and can being same to each other or different to each other to the etch-rate of described substrate 10.As an example, when described substrate 10 is sapphire (Al 2o 3) substrate and described the 1st conductive-type semiconductor layer 21 are while being GaN layer, the etch-rate that can compare substrate 10 to the etch-rate of described the 1st conductive-type semiconductor layer 21 by described jet guide laser WGL is large.As another example, when described substrate 10 is that GaN substrate and described the 1st conductive-type semiconductor layer 21 are during also for GaN layer,, in the time that substrate 10 and the 1st conductive-type semiconductor layer 21 are identical material layer, can be with almost identical to the etch-rate of described substrate 10 to the etch-rate of described the 1st conductive-type semiconductor layer 21 by described jet guide laser WGL.
Fig. 4 is the amplification profile that shows the A part of Fig. 1 d.
As shown in Fig. 1 d, Fig. 2 and Fig. 4, the each side surface that is exposed to the unit chip UC in separated region SL comprises three face S1, S2, the S3 that normal is not parallel to each other, perpendicular to the 1st S2 of upper surface of base plate, as the 2nd S1 and the 3rd S3 on the inclined plane adjacent with the two ends of first surface S2.The inclination angle that described the 2nd S1 tilts with respect to described the 1st S2, that is, the angle θ 1 that the normal of the normal of the 1st S2 and the 2nd S1 forms can be less than 90 degree.In addition, the 3rd inclination angle that S3 tilts with respect to the 1st S2, that is, the angle θ 2 that the normal of the normal of the 1st S2 and the 3rd S3 forms can be less than 90 degree.
Because the 2nd S1 and the 3rd S3 as inclined plane can reduce the total reflection of light, so can improve light extraction efficiency.In addition, in the time regulating tiltangleθ 1, the θ 2 of this inclined plane S1, S3, also can regulate light to point to angle.Tiltangleθ 1, the θ 2 of described inclined plane S1, S3 can be different because of pressure and the width of jet (W of Fig. 3 a to Fig. 3 c).As an example, the pressure of jet (W of Fig. 3 a to Fig. 3 c) can be set to 60～300bar, and width can be set to 30 μ m～120 μ m.In addition, swashing light frequency (frequency) can be 6kHz to 30kHz, laser power can be 30W to 80W, scribing speed can be 20mm/s to 120mm/s, to with scribing number of times (scribing passes) can be different because of scribing speed, can be particularly 1 to 50.
In addition, the tiltangleθ 1 of inclined plane S1, S3, θ 2 also can be different to the etch-rate of equivalent layer because of jet guide laser WGL.As an example, institute is description above, when passing through described jet guide laser WGL to described semiconductor structure bodies 20 (particularly, described the 1st conductive-type semiconductor layer 21) etch-rate compare the etch-rate of described substrate 10 when large, make the tiltangleθ 1 of the 2nd S1 that described the 1st conductive-type semiconductor layer 21 exposes can be larger than the tiltangleθ 2 of the 3rd S3 that described substrate 10 is exposed.As another example, when passing through described jet guide laser WGL to described semiconductor structure bodies 20 (particularly, described the 1st conductive-type semiconductor layer 21) etch-rate when almost identical to the etch-rate of described substrate 10, make the tiltangleθ 1 of the 2nd S1 that described the 1st conductive-type semiconductor layer 21 exposes can be almost identical with the tiltangleθ 2 of the 3rd S3 that described substrate 10 is exposed.
Fig. 5 is the profile that shows the method for manufacturing light-emitting of another embodiment of the present invention.The present embodiment, in fact can be with identical with reference to the embodiment of Fig. 1 a to Fig. 1 d explanation except content described later.
As shown in Figure 5, semiconductor structure bodies 20 and substrate 10 are carried out to scribing, form separated region SL, thereby make to be separated into unit chip UC.Meanwhile, in the side surface of described unit chip UC, form concaveconvex structure (CC of Fig. 2).
For this reason, described scribing can be used jet guide laser WGL to carry out.Particularly, can make described jet guide laser WGL be positioned on the lower surface of described substrate (10), then make its direction along the upper surface of semiconductor structure bodies 20 advance, carry out scribing.Fluid can be water.
Fig. 6 a and Fig. 6 b are the profiles that shows the method for manufacturing light-emitting of another embodiment of the present invention.Fig. 6 c is the perspective view that shows the unit chip forming according to the manufacture method of Fig. 6 a and Fig. 6 b.The present embodiment, in fact can be with identical with reference to the embodiment of Fig. 1 a to Fig. 1 d and Fig. 2 explanation except content described later.
As shown in Fig. 6 a, Fig. 6 b and Fig. 6 c, scribing is carried out in a part of region of semiconductor structure bodies 20 and substrate 10, form separated region SL, thereby be separated into unit chip UC.
The upper end of separated region SL can be used jet guide laser WGL to form that (Fig. 6 a), the lower end of separated region SL can form by dry laser or physics intercept method that (Fig. 6 b).
Particularly, by the semiconductor structure bodies 20 that jet guide laser WGL is located at expose in platform etching area M (particularly, described the 1st conductive-type semiconductor layer 21) on, then make jet guide laser WGL along the part of advancing towards the direction of the lower surface of substrate 10, carry out a part of scribing, then remove jet guide laser WGL.Then, can block the remainder of not carrying out scribing by means of described jet guide laser WGL by dry laser or physics mode.Now, the side of the unit chip UC exposing in the upper end of the described separated region SL that uses described jet guide laser WGL to form has irregular vertical nemaline concaveconvex structure (CC).Particularly, being arranged at least one in width and the length of the multiple depressed parts in described concaveconvex structure can be different, and its layout also can be irregular.This irregular vertical nemaline concaveconvex structure CC is different from the situation that uses dry laser or physics to block, and can independently form with the crystal plane of described semiconductor structure bodies 20 or substrate 10.
On the contrary, the side surface of the unit chip UC exposing in the bottom of the separated region SL that uses dry laser or physics intercept method to form can have the regular coarse patterns (not shown) forming along the crystal plane of substrate 10.The surface roughness of the coarse patterns that the surface roughness of the concaveconvex structure CC that the side surface of the unit chip UC exposing in the upper end of separated region SL forms can form than the side surface of the unit chip UC exposing in the bottom of separated region SL is large.In addition, each side surface of the unit chip UC exposing in the bottom of the separated region SL that uses dry laser or physics intercept method to form can not possess the inclined plane, lower end (S3 of Fig. 4) with reference to Fig. 1 d and Fig. 4 explanation.Therefore, each side surface of the unit chip UC exposing in separated region SL has two face S1, the S2 that normal is not parallel to each other, and, has the 1st S2, conduct the 2nd S1 on the inclined plane of adjacency with it perpendicular to the upper surface of substrate that is.The inclination angle that described the 2nd S1 tilts with respect to described the 1st S2, that is, the angle θ 1 that the normal of the normal of the 1st S2 and the 2nd S1 forms can be less than 90 degree.
Fig. 7 a and Fig. 7 b are the profiles that shows the manufacture method of the light-emitting diode of another embodiment of the present invention.Fig. 7 c is the perspective view that shows the unit chip forming according to the manufacture method of Fig. 7 a and Fig. 7 b.The present embodiment, in fact can be with identical with reference to the embodiment of Fig. 1 a to Fig. 1 d and Fig. 2 explanation except content described later.
As shown in Fig. 7 a, Fig. 7 b and Fig. 7 c, scribing is carried out in a part of region of semiconductor structure bodies 20 and substrate 10, form separated region SL, thereby be separated into unit chip UC.
The lower end of separated region SL can be used jet guide laser WGL formation, and (a), (Fig. 7 b) in the method formation that the upper end of separated region SL can be blocked by dry laser or physics for Fig. 7.Particularly, make after described jet guide laser WGL is positioned on the lower surface of described substrate (10), make its direction along the upper surface of described substrate 10 part of advancing, carry out a part of scribing, then, remove described jet guide laser WGL.Then, can block the remainder of not carrying out scribing by means of described jet guide laser WGL with dry laser or physics mode.
Now, the side surface of the unit chip UC exposing in the bottom of the separated region SL that uses described jet guide laser WGL to form has irregular vertical nemaline concaveconvex structure CC.Particularly, at least one in width and the length of the multiple depressed parts that possess in described concaveconvex structure can be different, and its layout also can be irregular.This irregular vertical nemaline concaveconvex structure CC is different from the situation that uses dry laser or physics to block (physical breaking), can independently form with the crystal plane of described semiconductor structure bodies 20 or described substrate 10.
On the contrary, the side surface of the unit chip UC exposing in the upper end of the separated region SL that uses dry laser or physics intercept method to form can have the irregular coarse patterns (not shown) forming along the crystal plane of substrate 10 or semiconductor structure bodies 20.The surface roughness of the coarse patterns that the surface roughness of the concaveconvex structure CC that the side surface of the unit chip UC exposing in the bottom of separated region SL forms can form than the side surface of the unit chip UC exposing in the upper end of separated region SL is large.In addition, each side surface of the unit chip UC exposing in the upper end of the separated region SL that uses dry laser or physics intercept method to form can not possess the inclined plane, upper end (S1 of Fig. 4) with reference to Fig. 1 d and Fig. 4 explanation.Therefore, each side of the unit chip UC exposing in separated region SL has two face S2, the S3 that normal is not parallel to each other, and, has the 1st S2, conduct the 2nd S3 on the inclined plane of adjacency with it perpendicular to substrate upper side that is.The 2nd inclination angle that S3 tilts with respect to the 1st S2, that is, the angle θ 2 that the normal of the normal of the 1st S2 and the 2nd S3 forms can be less than 90 degree.
Fig. 8 a and Fig. 8 b are the profiles that shows the method for manufacturing light-emitting of another embodiment of the present invention.The present embodiment, in fact can be with identical with reference to the embodiment of Fig. 1 a to Fig. 1 d and Fig. 2 explanation except content described later.
As shown in Figure 8 a, scribing is carried out in a part of region of semiconductor structure bodies 20 and substrate 10, form separated region SL, thereby make to be separated into unit chip UC.In the side surface that can expose in the separation by means of unit chip UC, form doped region DR.The refractive index of this doped region DR is different from the not refractive index of doped region.Now, the characteristics of luminescence can improve.As an example, in substrate 10, while value between the refractive index of the refractive index of the not doped region in the refractive index of doped region DR has substrate 10 and air or encapsulating material (not shown), refractive index reduces gradually along light direct of travel, thereby the characteristics of luminescence can improve.In addition, according to the kind of dopant material, this doped region (DR) is compared with plain region, and conductivity can improve.
Scribing can be used the jet guide laser WGL that comprises dopant to carry out.Now, in scribing step, can in the unit chip UC that forms separation by forming separated region SL, form described doped region DR.What now, the perspective view of described unit chip UC can be with shown in Fig. 2 is similar.But, not shown described doped region DR in Fig. 2.Therefore, now can in the side surface of unit chip UC, be formed with concaveconvex structure (CC of Fig. 2).
As an example, make jet guide laser WGL be located at the interior semiconductor structure bodies 20 exposing of platform etching area M (particularly, the 1st conductive-type semiconductor layer 21) upper after, can make its direction along the lower surface towards substrate 10 advance, carry out scribing.Fluid can be water.Jet (W of Fig. 9 a) can comprise dopant.This dopant can be for example benzene, ethanol, acetone, phosphoric acid or boric acid.In the time that described dopant is phosphoric acid, doped region DR can be N-shaped doped region, and in the time that described dopant is boric acid, doped region DR can be p-type doped region.Detailed description related to this describes with reference to following Fig. 9 a to Fig. 9 c.
As shown in Figure 8 b, can form and extend electrode 41e on the top of described the 1st electrode 41 and on the doped region (DR) of the side surface of described unit chip (UC).Described prolongation electrode 41e can be formed on all four side surfaces of unit chip UC.Can use vapour deposition process to form and extend electrode 41e.In addition, the conductive material with mobility is coated behind the top of the 1st conductive-type semiconductor layer 21 exposing in described platform etching area, this material is flowed into along the side surface of described unit chip UC, also can form described prolongation electrode 41e.Described prolongation electrode 41e can be electrically connected in described the 1st electrode 41, described the 1st conductive-type semiconductor layer 21 and described doped region DR.
Described prolongation electrode 41e can play a part as connecting the be connected distribution of described the 1st electrode 41 with electrode (not shown) on base plate for packaging.Therefore,, in the situation that forming described prolongation electrode 41e, can not carry out metal wire welding at described the 1st electrode 41.
Fig. 9 a to Fig. 9 c shows to use jet guide laser to carry out the profile of the step of scribing successively.
As shown in Fig. 9 a to Fig. 9 c, laser beam L at jet W(, at fluid column) in advance, described laser beam L is by means of the total reflection in the interface between described jet W and its extraneous air, it is advanced and is defined in described jet W.Described jet W can comprise dopant.This dopant can be for example benzene, ethanol, acetone, phosphoric acid or boric acid.Now, the laser beam L advancing in described jet W can activate described dopant, and the dopant of activation forms doped region DR in the side surface diffusion inside of the described unit chip (UC) to described jet W contact.In the time that described dopant is phosphoric acid, doped region DR can be N-shaped doped region, and in the time that described dopant is boric acid, doped region DR can be p-type doped region.
In addition, the multiple laser beam L that advance in described jet W disperse to distribute in described jet W, arrive at the surface of etched thing with mutually different incidence angle.Result, be different from the situation that uses dry laser or physics to block, in the side surface of described unit chip UC, form the vertical nemaline concaveconvex structure (CC of Fig. 2) of the irregular vertical direction irrelevant with the crystal plane of described semiconductor structure bodies 20 (particularly, the 1st conductive-type semiconductor layer 21) or described substrate 10.Particularly, being arranged at least one in width and the length of the depressed part in described concaveconvex structure (CC of Fig. 2) can be different, and its layout also can be irregular.Due to this concaveconvex structure (CC of Fig. 2), the total reflection meeting of the light that the side surface from described active layer 22 to described unit chip UC in described unit chip UC carries out is reduced, light extraction efficiency thereby can improve.
In the time of the surface of jet W and semiconductor structure bodies 20 (particularly, the 1st conductive-type semiconductor layer 21), (Fig. 9 a) because the surface tension of liquid can increase for the width of fluid W.Now, the upper width of separated region SL can be larger than the original width of jet W.Afterwards, carry out along with etched, the width of described jet W can revert to original width, and therefore, the width of separated region SL also can form with the original width of described jet W that (Fig. 9 b) accordingly.Finally, proceed along with etched, described jet W can connect the lower surface of described substrate 10, now, due to surface tension, the width of described jet W can increase that (Fig. 9 c) again, therefore, the lower width of separated region SL also can strengthen than the original width of described jet W.
Now, the etch-rate to semiconductor structure bodies 20 (particularly, described the 1st conductive-type semiconductor layer 21) and can be identical or different to the etch-rate of described substrate 10 by jet guide laser WGL.As an example, when described substrate 10 is sapphire (Al 2o 3) substrate, when described the 1st conductive-type semiconductor layer 21 is GaN layer, the etch-rate that can compare described substrate 10 to the etch-rate of described the 1st conductive-type semiconductor layer 21 by described jet guide laser WGL is large.As another example, when substrate 10 is GaN substrate, when the 1st conductive-type semiconductor layer 21 is also GaN layer,, when substrate 10 and the 1st conductive-type semiconductor layer 21 are identical material layer, can be with almost identical to the etch-rate of substrate 10 to the etch-rate of the 1st conductive-type semiconductor layer 21 by jet guide laser WGL.
Figure 10 is the amplification profile that shows the A part of Fig. 8 a.
As shown in Fig. 8 a and Figure 10, each side surface of the unit chip UC exposing in separated region SL has three face S1, S2, the S3 that normal is not parallel to each other,, have perpendicular to the 1st S2 of the upper surface of substrate 10, as the 2nd S1 and the 3rd S3 on the inclined plane in abutting connection with its two ends.The 2nd S1 is with respect to the inclination angle of the 1st S2, that is, the angle θ 1 that the normal of the normal of the 1st S2 and the 2nd S1 forms can be less than 90 degree.In addition, the 3rd inclination angle that S3 tilts with respect to the 1st S2, that is, the angle θ 2 that the normal of the normal of the 1st S2 and the 3rd S3 forms can be less than 90 degree.
The total reflection of light can be reduced as the 2nd S1 on inclined plane and the 3rd S3, luminous efficiency can be improved.In addition, in the time regulating tiltangleθ 1, the θ 2 of this inclined plane S1, S3, also can regulate light to point to angle.Tiltangleθ 1, the θ 2 of inclined plane S1, S3 can be different because of pressure and the width of jet (W of Fig. 9 a to Fig. 9 c).As an example, the pressure of described jet (W of Fig. 9 a to Fig. 9 c) can be set to 60～300bar, and width can be set to 30 μ m～120 μ m.In addition, sharp light frequency can be 6kHz to 30kHz, and laser power can be 30W to 80W, and scribing speed can be 20mm/s to 120mm/s, can be different because of scribing speed to the scribing number of times of same line, be specifically as follows 1 to 50.
In addition, the tiltangleθ 1 of inclined plane S1, S3, θ 2 also can be different to the etch-rate of equivalent layer because of jet guide laser WGL.As an example, when passing through jet guide laser WGL to semiconductor structure bodies 20 (particularly, described the 1st conductive-type semiconductor layer 21) the etch-rate of etch-rate comparison substrate 10 when large, make the tiltangleθ 1 of the 2nd S1 that the 1st conductive-type semiconductor layer 21 exposes can be larger than the tiltangleθ 2 of the 3rd S3 that substrate 10 is exposed.As another example, when passing through described jet guide laser WGL to semiconductor structure bodies 20 (particularly, described the 1st conductive-type semiconductor layer 21) etch-rate when almost identical to the etch-rate of substrate 10, make the tiltangleθ 1 of the 2nd S1 that the 1st conductive-type semiconductor layer 21 exposes can be almost identical with the tiltangleθ 2 of the 3rd S3 that substrate 10 is exposed.
Figure 11 is the profile that shows the method for manufacturing light-emitting of another embodiment of the present invention.The present embodiment, in fact can be with identical with reference to the embodiment of Fig. 8 a explanation except content described later.
As shown in figure 11, semiconductor structure bodies 20 and substrate 10 are carried out to scribing, form separated region SL, thereby make to be separated into unit chip UC.Meanwhile, can in the side surface exposing by means of the separation of described unit chip UC, form doped region DR.Now, the perspective view of described unit chip UC can be similar with that shown in Figure 2.But, not shown described doped region DR in Fig. 2.Now, can in the side surface of described unit chip UC, be formed with concaveconvex structure (CC of Fig. 2).
For this reason, described scribing can be used jet guide laser WGL to carry out.Particularly, can make after jet guide laser WGL is positioned on the lower surface of substrate 10, its upper surface direction along semiconductor structure bodies 20 to be advanced, carry out scribing.Fluid can be water.Jet W can comprise dopant.This dopant can be for example benzene, ethanol, acetone, phosphoric acid or boric acid.In the time that described dopant is phosphoric acid, doped region DR can be N-shaped doped region, and in the time that described dopant is boric acid, doped region DR can be p-type doped region.
Figure 12 a and Figure 12 b are the profiles that shows the method for manufacturing light-emitting of another embodiment of the present invention.The present embodiment, in fact can be with identical with reference to the embodiment of Fig. 8 a explanation except content described later.
As shown in Figure 12 a and Figure 12 b, scribing is carried out in a part of region of semiconductor structure bodies 20 and substrate 10, form separated region SL, thereby be separated into unit chip UC.The upper end of described separated region SL can be used the jet guide laser WGL that comprises dopant to form that (Figure 12 a), the lower end of described separated region SL can form by dry laser or physics intercept method that (Figure 12 b).Described dopant can be for example benzene, ethanol, acetone, phosphoric acid or boric acid.In the time that described dopant is phosphoric acid, doped region DR can be N-shaped doped region, and in the time that described dopant is boric acid, doped region DR can be p-type doped region.
Particularly, can make jet guide laser WGL be located at the interior semiconductor structure bodies 20 exposing of platform etching area M (particularly, the 1st conductive-type semiconductor layer 21) upper after, make it along the part of advancing towards direction of the lower surface of substrate 10, carry out a part of scribing, then remove jet guide laser WGL.Then, can block the remainder of not carrying out scribing by means of described jet guide laser WGL with dry laser or physics mode.
Now, the perspective view of described unit chip UC can be similar with Fig. 6 c those shown.But, not shown described doped region DR in Fig. 6 c.The side surface of the unit chip UC exposing in the upper end of the described separated region SL that the jet guide laser WGL that comprises described dopant in use forms can be in having doped region DR, has irregular vertical nemaline concaveconvex structure (CC of Fig. 6 c).At least one in width and the length of the depressed part possessing in described concaveconvex structure can be different, and its configuration also can be irregular.This irregular vertical nemaline concaveconvex structure CC is different from the situation that uses dry laser or physics to block, and can independently form with the crystal plane of semiconductor structure bodies 20 or described substrate 10.
On the contrary, the side surface of the unit chip UC exposing in the bottom of the described separated region SL that uses dry laser or physics intercept method to form can not have doped region, and has the regular coarse patterns (not shown) forming along the crystal plane of described substrate 10.The concaveconvex structure (CC of Fig. 6 c) that the side surface of the unit chip UC exposing in the upper end of separated region SL forms can have the large surface roughness of surface roughness of the coarse patterns forming than the side surface of the unit chip UC exposing in the bottom of described separated region SL.
In addition, each side of the unit chip UC exposing in the bottom of the described separated region SL that uses dry laser or physics intercept method to form can not possess the inclined plane, lower end (S3 of Figure 10) with reference to Fig. 8 a and Figure 10 explanation.Therefore, each side of the unit chip UC exposing in described separated region SL has two face S1, the S2 that normal is not parallel to each other, and, has the 1st S2, conduct the 2nd S1 on the inclined plane of adjacency with it perpendicular to the upper side of substrate that is.The 2nd inclination angle that S1 tilts with respect to the 1st S2, that is, the angle θ 1 that the normal of the normal of the 1st S2 and the 2nd S1 forms can less than 90 spend.
Figure 13 a and Figure 13 b are the profiles that shows the manufacture method of the light-emitting diode of another embodiment of the present invention.The present embodiment, in fact can be with identical with reference to the embodiment of Fig. 8 a explanation except content described later.
As shown in Figure 13 a and Figure 13 b, scribing is carried out in a part of region of semiconductor structure bodies 20 and substrate 10, form separated region SL, thereby be separated into unit chip UC.The lower end of separated region SL can be used the jet guide laser WGL formation that comprises dopant, and (a), the upper end of separated region SL will to form by dry laser or physics intercept method, (Figure 13 b) for Figure 13.Particularly, after making described jet guide laser WGL be positioned on the lower surface of substrate 10, make its direction along the upper surface towards substrate 10 part of advancing, carry out a part of scribing, then remove described jet guide laser WGL.Then, can block the remainder of not carrying out scribing by means of jet guide laser WGL with dry laser or physics mode.
Now, the perspective view of described unit chip UC can be similar with Fig. 7 c those shown.But, not shown described doped region DR in Fig. 7 c.The side of the unit chip UC exposing in the bottom of the described separated region SL that the jet guide laser WGL that comprises described dopant in use forms can be in having doped region DR, has irregular vertical nemaline concaveconvex structure (CC of Fig. 7 c).Particularly, certain one in width and the length of the described depressed part possessing in concavo-convex can be different, and its configuration also can be irregular.This irregular vertical nemaline concaveconvex structure CC is different from the situation that uses dry laser or physics to block, and can independently form with the crystal plane of described semiconductor structure bodies 20 or described substrate 10.
On the contrary, the side surface of the unit chip UC exposing in the upper end of the described separated region SL that uses dry laser or physics intercept method to form can have the regular coarse patterns (not shown) forming along the crystal plane of substrate 10 or semiconductor structure bodies 20.The concaveconvex structure (CC of Fig. 7 c) that the side surface of the unit chip UC exposing in the bottom of separated region SL forms can have the large surface roughness of surface roughness of the coarse patterns forming than the side surface of the unit chip UC exposing in the upper end of separated region SL.
In addition, each side surface of the unit chip UC exposing in the upper end of the separated region SL that uses dry laser or physics intercept method to form can not possess the inclined plane, upper end (S1 of Figure 10) with reference to Fig. 8 a and Figure 10 explanation.Therefore, each side surface of the unit chip UC exposing in separated region SL has two face S2, the S3 that normal is not parallel to each other, and, has the 1st S2, conduct the 2nd S3 on the inclined plane of adjacency with it perpendicular to the upper surface of substrate that is.The 2nd inclination angle that S3 tilts with respect to the 1st S2, that is, the angle θ 1 that the normal of the normal of the 1st S2 and the 2nd S3 forms can less than 90 spend.
In Figure 13 a and Figure 13 b, illustrate described jet guide laser WGL and only a part for substrate 10 is carried out to scribing, in a part for a side surface at described substrate 10, form doped region DR, but be not defined in this.Jet guide laser WGL can carry out scribing to substrate 10, until expose the lower surface of described semiconductor structure bodies 20 in described separated region SL time, then, remaining semiconductor structure bodies 20 can use dry laser or physics method for cutting to block.Therefore,, in described separated region SL, can in the whole side surface of substrate 10, form doped region DR.Then, can on the 1st electrode 41 and doped region DR, form and extend electrode (41e of Fig. 8 B), described prolongation electrode (41e of Fig. 8 B) can play as connecting the effect that be connected distribution of the 1st electrode (41) with the electrode (not shown) on base plate for packaging.
Figure 14 a to Figure 14 c is the profile that shows respectively the method for manufacturing light-emitting of another embodiment of the present invention.
Particularly, in the embodiment with reference to Fig. 8 a, Figure 11, Figure 12 a and Figure 13 a explanation, be illustrated with doped region DR be formed with concaveconvex structure (CC of Fig. 2, Fig. 6 c or Fig. 7 c) simultaneously.But as shown in Figure 14 a to Figure 14 c, using in the scribing processes of jet guide laser WGL, by adding or removing dopant, can limit selectively doped region DR in jet) position.Particularly, in the situation that jet contains described dopant, concaveconvex structure (CC of Fig. 2, Fig. 6 c or Fig. 7 c) can form with doped region DR simultaneously, different with it, not to add dopant in described jet in the situation that, can there is no doped region DR, only form concaveconvex structure (CC of Fig. 2, Fig. 6 c or Fig. 7 c) yet.
For example, (Figure 14 a) can only to form doped region DR in the upper end, side of unit chip UC (particularly, the side surface of the 1st conductive-type semiconductor layer 21).As another example, can be only in the side surface upper end of unit chip UC (particularly, the side surface of the 1st conductive-type semiconductor layer 21) and central portion (particularly, upper end and the central portion of substrate 10 side surfaces) forms doped region DR, and (Figure 14 is b).As another example, can be only at the side surface central portion (particularly, the central portion of substrate (10) side surface) of unit chip UC and central portion formation doped region DR, (Figure 14 c).As another example, doped region DR can be formed in the whole side of substrate (10).
In order to help understanding of the present invention, optimization experiment example is proposed below.But, following experimental example is only for helping understanding of the present invention, and the present invention is not defined in following experimental example.
< Production Example >
In the time that scribing is carried out in a part of region of semiconductor structure bodies and substrate, use with the laser of water guiding and carry out, after a part of scribing, blocking remainder with physics mode.
< comparative example >
In the time that scribing is carried out in a part of region of semiconductor structure bodies and substrate, use dry laser to carry out, after a part of scribing, blocking remainder with physics mode.
Figure 15 a and Figure 15 b are the photos that the side surface of the unit chip of Production Example and comparative example is shown respectively.
As shown in Figure 15 a, in the side surface of unit chip, be formed with the vertical nemaline concaveconvex structure of irregular vertical direction.In addition we know, at least one in width and the length of the depressed part possessing in described concaveconvex structure can be different, and its layout is also irregular.Meanwhile can confirm, be formed with inclined plane in the upper end of the side surface of unit chip.
On the contrary, as shown in Figure 15 b, can confirm, the part that uses dry laser to carry out scribing, that is, the upper end of the side surface of unit chip, its surface is very smooth.In addition we know, the part of blocking with physics mode, in the bottom of the side surface of unit chip, is formed with the regular ordinate corresponding to the crystal plane of substrate that is.
More than enumerate preferred embodiment the present invention is had been described in detail, but the present invention is not defined in described embodiment, in technological thought of the present invention and scope, those skilled in the art can carry out various deformation and change.

Claims (46)

1. a light-emitting diode, comprise the unit chip of the 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer that there is substrate and stack gradually on described substrate, it is characterized in that, in the side surface of described unit chip, be formed with the irregular vertical nemaline concaveconvex structure vertically forming.
2. light-emitting diode according to claim 1, is characterized in that, the width and/or the length that are arranged on the depressed part in described concaveconvex structure are different.
3. light-emitting diode according to claim 1, is characterized in that, described light-emitting diode is also included in the doped region forming in the side surface of described unit chip.
4. light-emitting diode according to claim 3, is characterized in that, the refractive index of described doped region is different from the not refractive index of doped region.
5. light-emitting diode according to claim 3, is characterized in that, the conductivity of described doped region higher than with the conductivity of doped region not.
6. light-emitting diode according to claim 5, is characterized in that, described light-emitting diode also comprises: extend electrode, be arranged on the side surface of unit chip, and be electrically connected to described the 1st conductive-type semiconductor layer.
7. light-emitting diode according to claim 3, is characterized in that, a region of the side surface of unit chip has doped region and concaveconvex structure, and another region of the side surface of described unit chip has concaveconvex structure and do not have doped region.
8. a light-emitting diode, comprise the unit chip of the 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer that there is substrate and stack gradually on described substrate, it is characterized in that, a side surface of described unit chip comprises perpendicular to the 1st of the upper surface of substrate with respect to the 2nd of described the 1st face tilt, and the angle θ 1 that the normal of described the 1st and described the 2nd 's normal forms is less than 90 degree.
9. light-emitting diode according to claim 8, is characterized in that,
The described side surface of described unit chip also comprises the 3rd with respect to described the 1st face tilt.
10. light-emitting diode according to claim 9, is characterized in that, the angle θ 2 that the normal of described the 1st and described the 3rd 's normal forms is less than 90 degree.
11. light-emitting diodes according to claim 10, is characterized in that, θ 1 and θ 2 have mutually different value.
12. light-emitting diodes according to claim 11, is characterized in that, the 1st conductive-type semiconductor layer is exposed in described the 2nd,
Exposure of substrates is in described the 3rd,
θ 1 is larger than θ 2.
13. light-emitting diodes according to claim 8, is characterized in that, have the irregular vertical nemaline concaveconvex structure vertically forming in the side surface of described unit chip.
14. light-emitting diodes according to claim 13, is characterized in that, the width and/or the length that are arranged on the depressed part in described concaveconvex structure are different.
15. light-emitting diodes according to claim 8, is characterized in that, described light-emitting diode is also included in the doped region forming in the side surface of described unit chip.
16. light-emitting diodes according to claim 15, is characterized in that, the refractive index of doped region is different from plain refractive index.
17. light-emitting diodes according to claim 15, is characterized in that, the conductivity of doped region higher than with the conductivity of doped region not.
18. light-emitting diodes according to claim 17, is characterized in that, described light-emitting diode also comprises: extend electrode, be arranged on the side surface of described unit chip, and be electrically connected to described the 1st conductive-type semiconductor layer.
19. light-emitting diodes according to claim 15, is characterized in that, a region of the side surface of described unit chip has doped region and concaveconvex structure,
Another region of the side surface of described unit chip has concaveconvex structure and does not have doped region.
Manufacture the method for light-emitting diode for 20. 1 kinds, it is characterized in that, described method comprises:
On substrate, stack gradually the 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer; And
When described substrate is separated into unit chip, in the side surface of unit chip, form the irregular vertical nemaline concaveconvex structure vertically forming.
21. methods according to claim 20, is characterized in that, the width and/or the length that are arranged on the depressed part in described concaveconvex structure are different.
22. methods according to claim 20, is characterized in that, the step that described substrate is separated into unit chip comprises that use jet guide laser carries out scribing.
23. methods according to claim 20, is characterized in that, the step that described substrate is separated into unit chip is included at least a portion region of side surface of unit chip and forms doped region.
24. methods according to claim 23, is characterized in that, the step that forms doped region form concaveconvex structure in the side surface of unit chip in is to use the jet guide laser that comprises dopant to carry out.
25. methods according to claim 23, is characterized in that, the step that forms concaveconvex structure in the not doped region of the side surface of unit chip is to utilize the jet guide laser that does not comprise dopant to carry out.
26. methods according to claim 23, is characterized in that, the refractive index of doped region is different from and the refractive index of doped region not.
27. methods according to claim 23, is characterized in that, the conductivity of doped region is higher than the conductivity of doped region not.
28. methods according to claim 27, is characterized in that, described method is also included in the step that forms the prolongation electrode that is electrically connected to described the 1st conductive-type semiconductor layer on the side surface of unit chip.
Manufacture the method for light-emitting diode for 29. 1 kinds, it is characterized in that, described method comprises:
On substrate, stack gradually the 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer; And
When described substrate is separated into unit chip, the side surface of unit chip is had perpendicular to the 1st of the upper surface of substrate with respect to the 2nd of described the 1st face tilt,
Wherein, the angle θ 1 that the normal of the 1st and the 2nd 's normal forms is less than 90 degree.
30. methods according to claim 29, is characterized in that, the step that described substrate is separated into unit chip comprises that use jet guide laser carries out scribing.
31. methods according to claim 30, is characterized in that, the step that described substrate is separated into unit chip comprises:
Use described jet guide laser to carry out a part of scribing to described substrate;
The remainder of substrate is carried out to physics to be blocked.
32. methods according to claim 29, is characterized in that, the described side surface of unit chip also comprises the 3rd with respect to described the 1st face tilt,
The angle θ 2 that the normal of the 1st and the 3rd 's normal forms is less than 90 degree.
33. methods according to claim 32, is characterized in that, the step that described substrate is separated into unit chip comprises the step that uses jet guide laser described substrate to be carried out to complete scribing.
34. methods according to claim 32, is characterized in that, the 1st conductive-type semiconductor layer is exposed in described the 2nd,
Exposure of substrates in described the 3rd,
θ 1 is larger than θ 2.
35. methods according to claim 29, is characterized in that, the step that described substrate is separated into unit chip is included at least a portion region of described side surface of unit chip and forms doped region.
36. methods according to claim 35, is characterized in that, the step that forms doped region is to use the jet guide laser that comprises dopant to carry out.
37. methods according to claim 35, is characterized in that, the refractive index of doped region is different from the not refractive index of doped region.
38. methods according to claim 35, is characterized in that, the conductivity of doped region is different from the not conductivity of doped region.
39. according to the method described in claim 38, it is characterized in that, described method is also included in the step that forms the prolongation electrode that is electrically connected to the 1st conductive-type semiconductor layer on the side surface of unit chip.
40. 1 kinds of light-emitting diodes, comprise the unit chip of the 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer that there is substrate and stack gradually on described substrate, it is characterized in that at least a portion region, thering is doped region in the side surface of described unit chip.
41. according to the light-emitting diode described in claim 40, it is characterized in that, described doped region is N-shaped doped region.
42. according to the light-emitting diode described in claim 40, it is characterized in that, described light-emitting diode also comprises: extend electrode, be arranged on the side surface of unit chip, and be electrically connected to described the 1st conductive-type semiconductor layer.
Manufacture the method for light-emitting diode for 43. 1 kinds, it is characterized in that, described method comprises:
On substrate, stack gradually the 1st conductive-type semiconductor layer, active layer and the 2nd conductive-type semiconductor layer;
Described substrate is separated into unit chip;
In at least a portion of the side surface of the unit chip being exposed, form doped region in separation process.
44. according to the method described in claim 43, it is characterized in that, the step that forms doped region comprises that the jet guide laser that use comprises dopant carries out scribing.
45. according to the method described in claim 43, it is characterized in that, described doped region is N-shaped doped region.
46. according to the method described in claim 43, it is characterized in that, described method is also included in and on the described side surface of unit chip, forms the prolongation electrode that is electrically connected to described the 1st conductive-type semiconductor layer.
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