CN103794472A - Method for filtering dislocation through semiconductor materials - Google Patents

Method for filtering dislocation through semiconductor materials Download PDF

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Publication number
CN103794472A
CN103794472A CN201410023924.3A CN201410023924A CN103794472A CN 103794472 A CN103794472 A CN 103794472A CN 201410023924 A CN201410023924 A CN 201410023924A CN 103794472 A CN103794472 A CN 103794472A
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China
Prior art keywords
dislocation
semi
conducting material
crystal layer
filters
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CN201410023924.3A
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Chinese (zh)
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宋禹忻
王庶民
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Shanghai Institute of Microsystem and Information Technology of CAS
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Shanghai Institute of Microsystem and Information Technology of CAS
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Priority to CN201410023924.3A priority Critical patent/CN103794472A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02463—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02513—Microstructure

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)

Abstract

The invention relates to a method for filtering dislocation through semiconductor materials. According to the method, a first crystal layer is provided, a filtering layer where metal particles are embedded and a component layer sequentially grow on the first crystal layer in an epitaxy mode, and the dislocation is filtered by means of the metal particles embedded in the semiconductor materials. The method is simple in operation process, easy to control and capable of effectively filtering penetrated dislocation, and has good application prospects.

Description

A kind of semi-conducting material filters the method for dislocation
Technical field
The invention belongs to semiconductor electronic and photoelectron material field, particularly a kind of semi-conducting material filters the method for dislocation.
Background technology
Lattice mismatch and coefficient of thermal expansion mismatch are the key factors of restriction semiconductor heterostructure design always.The commercial substrate kind of high-quality, large scale, low price only has limited several, or backing material chosen (for example III-V and silica-based integrated) under particular case, on these substrates, build in electronics or opto-electronic device to the selection of material can only be limited in mate with substrate or the material system of minimum tolerable mismatch in, otherwise by causing stress relaxation and causing very high threading dislocation density, significantly reduce device performance.This has limited the degree of freedom to device design greatly.In order to break this restriction, the resilient coating of growing changes lattice constant becomes one way widely.But, although design and the optimization of various resilient coatings are attempted in scientific research circle through the effort of many decades, the substrate template that these class methods are produced still has too high threading dislocation density, the device producing on this, especially opto-electronic device, the device there is no on method and general commercial substrate is at war with, and says nothing of and surmounts its performance.Therefore, stop in other words it is study hotspot for the filtration of threading dislocation always.The method of having tested at present comprises filters dislocation etc. with strain compensation superlattice, quantum dot, rare nitrogen material.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of method of semi-conducting material filtration dislocation, and the method operating procedure is simple, easy to control, and filter threading dislocation effectively, has a good application prospect.
A kind of semi-conducting material of the present invention filters the method for dislocation, and first crystal layer is provided, and on described first crystal layer, epitaxial growth is embedded with filter course and the device layer of metallic particles successively, utilizes the metallic particles that is embedded in semi-conducting material inside to filter dislocation.Threading dislocation in described first crystal layer enters after filter course slippage in the time running into semiconductor/metal granular boundary to be stopped, and ends in described filter course.On it, continue epitaxially grown device layer and there is the threading dislocation density low than first crystal layer.
Described semiconductive material substrate is commercial Semiconductor substrate.
Described first crystal layer, filter course and device layer are one or more in C, Si, Ge, Sn binary and polynary semiconductor, oxide.
Described first crystal layer, filter course and device layer are single or multiple lift structure.
Described metallic particles is the alloy of single metallic element or various metals.
Described metallic particles is liquid or solid-state in the time of growth.
Adopt molecular beam epitaxy, metal organic chemical vapor deposition technology, liquid phase epitaxy or hot wall extension to form described first crystal layer, filter course and device layer.
beneficial effect
Operating procedure of the present invention is simple, easy to control, and filter threading dislocation effectively, has a good application prospect.
Accompanying drawing explanation
Fig. 1 is the section of structure of the semi-conducting material for preparing of the present invention;
Fig. 2 is the section of structure of the semi-conducting material for preparing of embodiment 1;
Fig. 3 is In in embodiment 1 0.25ga 0.75the 1.5nm Ga that grows on As layer forms the atomic force microscopy of molten drop.
Fig. 4 is the section of structure of the semi-conducting material for preparing of embodiment 2.
Embodiment
Below in conjunction with specific embodiment, further set forth the present invention.Should be understood that these embodiment are only not used in and limit the scope of the invention for the present invention is described.In addition should be understood that those skilled in the art can make various changes or modifications the present invention after having read the content of the present invention's instruction, these equivalent form of values fall within the application's appended claims limited range equally.
It should be noted that, the diagram providing in the present embodiment only illustrates basic conception of the present invention in a schematic way, satisfy and only show with assembly relevant in the present invention in graphic but not component count, shape and size drafting while implementing according to reality, when its actual enforcement, kenel, quantity and the ratio of each assembly can be a kind of random change, and its assembly layout kenel also may be more complicated.
Embodiment 1
As embedding metallic particles in semi-conducting material inside, example explanation utilization filters method and the step of dislocation to realize 1.3 μ m telecommunication lasers on GaAs substrate.These methods and preparation process can directly be generalized to the material system of other types.The growing method of below mentioning is including but not limited to molecular beam epitaxy (MBE) and metallo-organic compound chemical gaseous phase deposition (MOCVD), and concrete structure and preparation process are as follows, as shown in Figure 2:
(1) on GaAs (100) substrate, at 500 ℃, growth 1000nm In 0.25ga 0.75as, strain full relaxation, the threading dislocation (>1x10 of relaxation process meeting generating high density 8cm -2); Above-mentioned GaAs substrate and In 0.25ga 0.75as layer has formed first crystal layer jointly;
(2) in the situation that closing As at In 0.25ga 0.75the 1.5nm Ga that grows on As layer, described Ga can form molten drop on surface, as shown in Figure 3.
(3) press and (can maintain In at low arsenic 0.25ga 0.75as normal growth and guarantee that the critical arsenic of correct atom ratio presses) situation under Fast Growth 50nm In 0.25ga 0.75as, thus Ga drop is imbedded to In 0.25ga 0.75in As, in this process, Ga drop part can crystallize into GaAs.
(4) step (2) repeats 10 times with (3), completes the growth of filter course.
(5) along with the growth of filter course, the threading dislocation generating in first crystal layer can end at Ga metal and In in running into Ga molten drop 0.25ga 0.75the semi-conductive interface of As, stops slippage and upwards penetrates, thereby being filtered; The threading dislocation density on filter course top will be less than 5x10 6cm -2.
(6) continued growth and In on filter course 0.25ga 0.75the laser structure of As lattice constant match, the threading dislocation density in this laser can not increase.
Embodiment 2
Be integrated into example explanation and utilize in inner method and the step that embeds metallic particles and filter dislocation of semi-conducting material to realize GaAs base III-V material and Si on Si substrate.These methods and preparation process can directly be generalized to the material system of other types.The growing method of below mentioning is including but not limited to molecular beam epitaxy (MBE) and metallo-organic compound chemical gaseous phase deposition (MOCVD), and concrete structure and preparation process are as follows, as shown in Figure 4:
(1) at Si (100) substrate (comprise accurate (100) and there is the Si(100 at several years inclination angle) substrate) on, at 450-700 ℃, growth 1000nm Ge, strain full relaxation, the threading dislocation (>1x10 of relaxation process meeting generating high density 8cm -2).
(2) the 50nm GaAs that grows on above-mentioned Ge layer.Above-mentioned GaAs layer, Ge layer and substrate have formed first crystal layer jointly;
(3) grow on GaAs layer in the situation that closing As 1.5nm Ga or Al, described Ga or Al can form molten drop on surface.
(4) press Fast Growth 50nm GaAs (can maintain GaAs normal growth and guarantee that the critical arsenic of correct atom ratio presses) at low arsenic, thereby Ga or Al drop are imbedded in GaAs, and in this process, Ga or Al drop part can crystallize into GaAs or AlAs.
(5) step (3) repeats 10 times with (4), completes the growth of filter course.
(6) along with the growth of filter course, the threading dislocation generating in first crystal layer can end at Ga or Al metal and the semi-conductive interface of GaAs in running into Ga or Al molten drop, stops slippage and upwards penetrates, thereby being filtered; The threading dislocation density on filter course top will be less than 5x10 6cm -2.
(7) electronics or the optoelectronic device structure of continued growth and GaAs lattice constant match on filter course, the threading dislocation density in this device architecture can not increase.

Claims (6)

1. semi-conducting material filters a method for dislocation, it is characterized in that:
First crystal layer is provided, and on described first crystal layer, epitaxial growth is embedded with filter course and the device layer of metallic particles successively, utilizes the metallic particles that is embedded in semi-conducting material inside to filter dislocation.
2. a kind of semi-conducting material according to claim 1 filters the method for dislocation, it is characterized in that: described first crystal layer, filter course and device layer are one or more in C, Si, Ge, Sn binary and polynary semiconductor, oxide.
3. a kind of semi-conducting material according to claim 1 filters the method for dislocation, it is characterized in that: described first crystal layer, filter course and device layer are single or multiple lift structure.
4. a kind of semi-conducting material according to claim 1 filters the method for dislocation, it is characterized in that: described metallic particles is the alloy of single metallic element or various metals.
5. a kind of semi-conducting material according to claim 1 filters the method for dislocation, it is characterized in that: described metallic particles is liquid state or solid-state in the time of growth.
6. a kind of semi-conducting material according to claim 1 filters the method for dislocation, it is characterized in that: adopt molecular beam epitaxy, metal organic chemical vapor deposition technology, liquid phase epitaxy or hot wall extension to form described first crystal layer, filter course and device layer.
CN201410023924.3A 2014-01-20 2014-01-20 Method for filtering dislocation through semiconductor materials Pending CN103794472A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108682739A (en) * 2018-05-03 2018-10-19 五邑大学 A kind of metal quantum point enhancing ZnO resistive memories and preparation method thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020136932A1 (en) * 2001-03-21 2002-09-26 Seikoh Yoshida GaN-based light emitting device
CN1894799A (en) * 2003-09-05 2007-01-10 点度量技术有限公司 Quantum dot optoelectronic devices with nanoscale epitaxial lateral overgrowth and methods of manufacture
US20080121623A1 (en) * 2006-11-29 2008-05-29 General Electric Company Method of selectively stripping an engine-run ceramic coating
CN101685774A (en) * 2008-09-24 2010-03-31 北京邮电大学 Heteroepitaxial growth process based on interface nano-structure
US20100187499A1 (en) * 2009-01-29 2010-07-29 Oh Jae-Eung Method for epitaxial growth and epitaxial layer structure using the method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020136932A1 (en) * 2001-03-21 2002-09-26 Seikoh Yoshida GaN-based light emitting device
CN1894799A (en) * 2003-09-05 2007-01-10 点度量技术有限公司 Quantum dot optoelectronic devices with nanoscale epitaxial lateral overgrowth and methods of manufacture
US20080121623A1 (en) * 2006-11-29 2008-05-29 General Electric Company Method of selectively stripping an engine-run ceramic coating
CN101685774A (en) * 2008-09-24 2010-03-31 北京邮电大学 Heteroepitaxial growth process based on interface nano-structure
US20100187499A1 (en) * 2009-01-29 2010-07-29 Oh Jae-Eung Method for epitaxial growth and epitaxial layer structure using the method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108682739A (en) * 2018-05-03 2018-10-19 五邑大学 A kind of metal quantum point enhancing ZnO resistive memories and preparation method thereof

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Application publication date: 20140514