CN103762595B - A kind of frequency locking control method and system suppressing mains by harmonics and amplitude disturbance - Google Patents

Abstract

This application discloses a kind of the frequency locking control method and the system that suppress mains by harmonics and amplitude disturbance, it extracts according to the fundamental signal of three-phase power grid voltage signal and corresponding orthogonal signalling the positive sequence component obtaining line voltage; Trap process is carried out to the difference signal of described three-phase power grid voltage signal and its orthogonal signalling, filtering low-order harmonic; Calculate the frequency error variable of system according to the difference signal after described orthogonal signalling and trap, and then described positive sequence component and frequency error variable are normalized, obtain incoming frequency value; After integration is carried out to this incoming frequency value, superpose with electrical network rated frequency, obtain frequency locking value, feed back to filtering link; The application is by carrying out to difference signal the ability that trap process improves grid-connected system harmonic inhabitation, improve the ability of system suppression grid voltage amplitude disturbance by normalized, namely the application ensure that the harmonic inhabitation of grid-connected system and the ability of amplitude disturbance simultaneously.

Description

A kind of frequency locking control method and system suppressing mains by harmonics and amplitude disturbance

Technical field

The application relates to power grid control technical field, particularly relates to a kind of the frequency locking control method and the system that suppress mains by harmonics and amplitude disturbance.

Background technology

In grid-connected system, need real-time detection of grid phase place or frequency information, the input variable being current reference with this phase place or frequency information, makes grid-connected current synchronous with line voltage; Meanwhile, because grid-connected interface may exist resonance, Voltage Harmonic content is increased, therefore also need to suppress Voltage Harmonic.

The existing synchronized common method that realizes comprises phase-locked loop and FLL; Due under electric network fault, Voltage unbalance condition, mains frequency is more stable compared to line voltage, therefore preferably FLL to realize line voltage synchronous.Existing one is based on the frequency locking technology of Second Order Generalized Integrator (SOGI), skew is intersected by carrying out 90 ° to input voltage signal, obtain its orthogonal signalling, thus the positive-negative sequence component of rapid extraction line voltage, and then according to this positive-negative sequence component locking mains frequency; But when improve suppress grid voltage amplitude disturbance ability time, the above-mentioned frequency locking technology based on SOGI extracts orthogonal signalling, error signal will containing a large amount of harmonic wave, reduce the ability of suppression mains by harmonics.

Therefore, prior art cannot be taken into account and suppress mains by harmonics and amplitude disturbance two aspect performance, can only be applied to specific occasion, and under current complicated grid conditions, it may lose efficacy, or accuracy of detection reduces, thus reduced grid-connected system overall performance.

Summary of the invention

In view of this, the application's object is to provide a kind of the frequency locking control method and the system that suppress mains by harmonics and amplitude disturbance, cannot take into account to solve prior art the problem suppressing mains by harmonics and amplitude disturbance two aspect performance.

For achieving the above object, the application provides following technical scheme:

Suppress a frequency locking control method for mains by harmonics and amplitude disturbance, comprising:

Obtain the digital signal u of three-phase power grid voltage _a, u _band u _c, and coordinate transform is carried out to it, obtain the voltage signal u under two-phase rest frame _αand u _β;

According to frequency locking value ω _orespectively to described u _αand u _βcarry out filtering process, obtain fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}, and difference signal u _{α ε}and u _{β ε}; Wherein, u _{α d}for u _αfundamental signal, u _{α q}for u _{α d}orthogonal signalling, u _{α ε}for u _αwith u _{α d}difference signal; u _{β d}for u _βfundamental signal, u _{β q}for u _{β d}orthogonal signalling, u _{β ε}for u _βwith u _{β d}difference signal;

According to described fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}calculate the positive sequence component of line voltage under two-phase rest frame with

To described difference signal u _{α ε}and u _{β ε}carry out trap process, obtain u' _{α ε}and u' _{β ε};

According to described u _{α q}and u' _{α ε}calculate the frequency error variable ε of mains frequency at α axle _f( _α), according to u _{β q}and u' _{β ε}mains frequency is at the frequency error variable ε of β axle _{f (β)};

To described ε _{f (α)}and ε _{f (β)}be normalized and obtain incoming frequency value ω _in;

To described incoming frequency value ω _incarry out integration, and by integral result and electrical network rated frequency ω _fsuperposition, obtains described frequency locking value ω _o.

Preferably, described fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}, and difference signal u _{α ε}and u _{β ε}frequency-domain expression be respectively:

$\left\{\begin{array}{cc}{U}_{\mathrm{xd}}\left(s\right)=G_d\left(s\right)U_x\left(s\right)& G_d\left(s\right)=\frac{k{\mathrm{\ω}}_{o}s}{s^2+k{\mathrm{\ω}}_{o}s+{\mathrm{\ω}}_o^2}\\ U_{\mathrm{xq}}\left(s\right)=G_q\left(s\right)U_x\left(s\right)& G_q\left(s\right)=\frac{k{\mathrm{\ω}}_o^2}{s^2+k{\mathrm{\ω}}_{o}s+{\mathrm{\ω}}_o^2}\\ U_{\mathrm{x\ϵ}}\left(s\right)=U_x\left(s\right)-U_{\mathrm{xd}}\left(s\right)& \end{array}\right.x=\mathrm{\α},\mathrm{\β};$

Wherein, U _xs frequency-domain expression that () is line voltage, G _ds centered by (), frequency is ω _othe frequency-domain expression of band pass filter, G _qs centered by (), frequency is ω _othe frequency-domain expression of low pass filter, k is described G _d(s) and G _qthe filter gain of (s).

Preferably, described to described difference signal u _{α ε}and u _{β ε}carry out trap process, comprising:

To described difference signal u _{α ε}and u _{β ε}carry out the process of circulation trap, and the frequency-domain expression that n-th trap process terminates to output signal is:

$U_{\mathrm{x\ϵ}}^n\left(s\right)=(1-\frac{\mathrm{km}{\mathrm{\ω}}_{o}s}{s^2+\mathrm{km}{\mathrm{\ω}}_{o}s+{\left(m{\mathrm{\ω}}_o\right)}^2})U_{\mathrm{x\ϵ}}^{n-1}\left(s\right)x=\mathrm{\α},\mathrm{\β};$

Wherein, 1≤n≤N, N represents preset loop number of times; Described u' _{α ε}frequency-region signal be $U_{\mathrm{\α\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\α\ϵ}}^N\left(s\right),$ U' _{β ε}frequency-region signal be $U_{\mathrm{\β\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\β\ϵ}}^N\left(s\right);$

M=or [n], represents the harmonic number of the filtering of n-th trap process; The trapper centre frequency ω [n] of n-th trap process meets ω [n]=m ω _o=or [n] ω _o.

Preferably, described according to described fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}calculate the positive sequence component of line voltage under two-phase rest frame with computing formula is:

$\left\{\begin{array}{c}{u}_{\mathrm{\α}}^{+}=\frac{1}{2}{u}_{\mathrm{\αd}}-\frac{1}{2}{u}_{\mathrm{\βq}}\\ u_{\mathrm{\β}}^{+}=\frac{1}{2}{u}_{\mathrm{\αq}}+\frac{1}{2}{u}_{\mathrm{\βd}}\end{array}\right..$

Preferably, described frequency error variable ε _{f (α)}and ε _{f (β)}computing formula be:

$\left\{\begin{array}{c}{\mathrm{\ϵ}}_{f\left(\mathrm{\α}\right)}=u_{\mathrm{\αq}}{u}_{\mathrm{\α\ϵ}}^{\′}\\ {\mathrm{\ϵ}}_{f\left(\mathrm{\β}\right)}=u_{\mathrm{\βq}}{u}_{\mathrm{\β\ϵ}}^{\′}\end{array}\right..$

Preferably, described to described ε _{f (α)}and ε _{f (β)}be normalized and obtain incoming frequency value ω _infrequency-domain expression be:

${\mathrm{\ω}}_{\mathrm{in}}=-k_{\mathrm{\τ}}({\mathrm{\ϵ}}_{f\left(\mathrm{\α}\right)}+{\mathrm{\ϵ}}_{f\left(\mathrm{\β}\right)})\×\frac{k{\mathrm{\ω}}_o}{{\left(u_{\mathrm{\α}}^{+}\right)}^2+{\left(u_{\mathrm{\β}}^{+}\right)}^2}.$

In formula, k _τfor FLL gain.

Preferably, described frequency locking value ω _ofrequency-domain expression be:

${\mathrm{\ω}}_o={\mathrm{\ω}}_f\left(s\right)+{\mathrm{\ω}}_{\mathrm{in}}\left(s\right)\×\frac{1}{s}.$

In formula, ω _ffor theoretical mains frequency value.

Suppress a frequency locking control system for mains by harmonics and amplitude disturbance, comprising:

Analog-to-digital conversion module, for carrying out analog-to-digital conversion to the analog signal of the three-phase power grid voltage obtained of sampling, obtains the digital signal u of three-phase power grid voltage _a, u _band u _c;

Coordinate transformation unit, for described u _a, u _band u _ccarry out coordinate transform, obtain the voltage u under two-phase rest frame _αand u _β;

Filter unit, for according to frequency locking value ω _orespectively to described u _αand u _βcarry out filtering process, obtain fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}, and difference signal u _{α ε}and u _{β ε}; Wherein, u _{α d}for u _αfundamental signal, u _{α q}for u _{α d}orthogonal signalling, u _{α ε}for u _αwith u _{α d}difference signal; u _{β d}for u _βfundamental signal, u _{β q}for u _{β d}orthogonal signalling, u _{β ε}for u _βwith u _{β d}difference signal;

Positive sequence component extraction unit, for according to described fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}calculate the positive sequence component of line voltage under two-phase rest frame with

Trap wave unit, for described difference signal u _{α ε}and u _{β ε}carry out trap process, obtain u' _{α ε}and u' _{β ε};

Frequency error variable calculation unit, for according to described u _{α q}and u' _{α ε}calculate the frequency error variable ε of mains frequency at α axle _{f (α)}, according to u _{β q}and u' _{β ε}mains frequency is at the frequency error variable ε of β axle _{f (β)};

Normalized unit, for described ε _{f (α)}and ε _{f (β)}be normalized and obtain incoming frequency value ω _in;

Frequency locking unit, for described incoming frequency value ω _incarry out integration, and by integral result and electrical network rated frequency ω _fsuperposition, obtains described frequency locking value ω _o.

Preferably, described filter unit comprises: sef-adapting filter;

Described sef-adapting filter is based on Second Order Generalized Integrator, and the frequency-domain expression of output signal is respectively:

$\left\{\begin{array}{cc}{U}_{\mathrm{xd}}\left(s\right)=G_d\left(s\right)U_x\left(s\right)& G_d\left(s\right)=\frac{k{\mathrm{\ω}}_{o}s}{s^2+k{\mathrm{\ω}}_{o}s+{\mathrm{\ω}}_o^2}\\ U_{\mathrm{xq}}\left(s\right)=G_q\left(s\right)U_x\left(s\right)& G_q\left(s\right)=\frac{k{\mathrm{\ω}}_o^2}{s^2+k{\mathrm{\ω}}_{o}s+{\mathrm{\ω}}_o^2}\\ U_{\mathrm{x\ϵ}}\left(s\right)=U_x\left(s\right)-U_{\mathrm{xd}}\left(s\right)& \end{array}\right.x=\mathrm{\α},\mathrm{\β};$

Wherein, U _xs frequency-domain expression that () is line voltage, G _ds centered by (), frequency is ω _oband pass filter, G _qs centered by (), frequency is ω _olow pass filter, k is described G _d(s) and G _qthe filter gain of (s).

Preferably, described trap wave unit comprises:

Cycle controller, for the harmonic number m of the filtering of the cycle-index and n-th trap process of determining trap process;

Trapper, under the control of described cycle controller, according to following formula to input signal in m subharmonic carry out trap process, outputed signal and,

$U_{\mathrm{x\ϵ}}^n\left(s\right)=(1-\frac{\mathrm{km}{\mathrm{\ω}}_{o}s}{s^2+\mathrm{km}{\mathrm{\ω}}_{o}s+{\left(m{\mathrm{\ω}}_o\right)}^2})U_{\mathrm{x\ϵ}}^{n-1}\left(s\right)x=\mathrm{\α},\mathrm{\β};$

Shift register, for storing the output signal of described trapper, and as the input signal of next trap process;

Wherein, 1≤n≤N, N represents preset loop number of times; Described u' _{α ε}frequency-region signal be $U_{\mathrm{\α\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\α\ϵ}}^N\left(s\right),$ U' _{β ε}frequency-region signal be $U_{\mathrm{\β\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\β\ϵ}}^N\left(s\right);$

M=or [n], represents the harmonic number of the filtering of n-th trap process; The trapper centre frequency ω [n] of n-th trap process meets ω [n]=m ω _o=or [n] ω _o.

As can be seen from above-mentioned technical scheme, the application is by carrying out coordinate transform to three-phase power grid voltage, obtain the voltage signal under two-phase rest frame, and then process after filtering, high order harmonic component in filtering voltage signal, and obtain its fundamental signal and corresponding orthogonal signalling, and the difference signal of described voltage signal and corresponding orthogonal signalling; Rapid extraction the positive sequence component of line voltage can be obtained according to described fundamental signal and orthogonal signalling; Trap process is carried out to described difference signal, with the corresponding low-order harmonic of filtering; Calculate the frequency error variable of system according to the difference signal after described orthogonal signalling and trap, and then described positive sequence component and frequency error variable are normalized, obtain incoming frequency value; After integration is carried out to this incoming frequency value, superpose with electrical network rated frequency, obtain frequency locking value, and using the centre frequency of this frequency locking value as filtering link, feed back to filtering link, form closed-loop control, realize frequency-tracking.Visible, the application, by carrying out to difference signal the ability that trap process improves grid-connected system harmonic inhabitation, improves the ability of system suppression grid voltage amplitude disturbance by normalized; Therefore, the application ensure that the harmonic inhabitation of grid-connected system and the ability of amplitude disturbance simultaneously, solves the problem of prior art.

Accompanying drawing explanation

In order to be illustrated more clearly in the embodiment of the present application or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the application, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.

The frequency locking control method flow chart of the suppression mains by harmonics that Fig. 1 provides for the embodiment of the present application and amplitude disturbance;

The flow chart of trap process in the frequency locking control method of the suppression mains by harmonics that Fig. 2 provides for the embodiment of the present application and amplitude disturbance;

U in the frequency locking control method of the suppression mains by harmonics that Fig. 3 provides for the embodiment of the present application and amplitude disturbance _{α q}(s)/U _α(s) and transfer function Bode figure;

Fig. 4 (a) falls front and back the embodiment of the present application and tradition phase-locked (frequently) ring output frequency response curve comparison diagram for voltage magnitude;

Difference signal comparison diagram in the frequency locking control method of the suppression mains by harmonics that Fig. 4 (b) provides for the embodiment of the present application and amplitude disturbance before and after trap process;

Fig. 5 is for exporting the comparison diagram of frequency locking value when application the embodiment of the present application and traditional frequency locking (phase) control method;

The structured flowchart of the frequency locking control system of the suppression mains by harmonics that Fig. 6 provides for the embodiment of the present application and amplitude disturbance.

Embodiment

Below in conjunction with the accompanying drawing in the embodiment of the present application, be clearly and completely described the technical scheme in the embodiment of the present application, obviously, described embodiment is only some embodiments of the present application, instead of whole embodiments.Based on the embodiment in the application, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the application's protection.

The embodiment of the present application discloses a kind of the frequency locking control method and the system that suppress mains by harmonics and amplitude disturbance, cannot take into account to solve prior art the problem suppressing mains by harmonics and amplitude disturbance two aspect performance.

With reference to Fig. 1, the frequency locking control method for suppressing mains by harmonics and amplitude disturbance that the embodiment of the present application provides, comprises the steps:

S1: the digital signal u obtaining three-phase power grid voltage _a, u _band u _c, and coordinate transform is carried out to it, obtain the voltage u under two-phase rest frame _αand u _β;

S2: according to frequency locking value ω _orespectively to described u _αand u _βcarry out filtering process, obtain fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}, and difference signal u _{α ε}and u _{β ε};

Wherein, u _{α d}for u _αfundamental signal, u _{α q}for u _{α d}orthogonal signalling, u _{α ε}for u _αwith u _{α d}difference signal; u _{β d}for u _βfundamental signal, u _{β q}for u _{β d}orthogonal signalling, u _{β ε}for u _βwith u _{β d}difference signal.

S3: according to described fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}calculate the positive sequence component of line voltage under two-phase rest frame with

S4, to described difference signal u _{α ε}and u _{β ε}carry out trap process, obtain u' _{α ε}and u' _{β ε};

S5, according to described u _{α q}and u' _{α ε}calculate the frequency error variable ε of mains frequency at α axle _{f (α)}, according to u _{β q}and u' _{β ε}mains frequency is at the frequency error variable ε of β axle _{f (β)};

S6, to described ε _{f (α)}and ε _{f (β)}be normalized and obtain incoming frequency value ω _in;

S7, to described incoming frequency value ω _incarry out integration, and by integral result and electrical network rated frequency ω _fsuperposition, obtains described frequency locking value ω _o.

From said method step, the embodiment of the present application is by carrying out coordinate transform to the digital signal of three-phase power grid voltage, obtain the voltage signal under two-phase rest frame, and then process after filtering, high order harmonic component in filtering voltage signal, and obtain its fundamental signal and corresponding orthogonal signalling, and the difference signal of described voltage signal and corresponding orthogonal signalling; Rapid extraction the positive sequence component of line voltage can be obtained according to described fundamental signal and orthogonal signalling; Trap process is carried out to described difference signal, with the corresponding low-order harmonic of filtering; Calculate the frequency error variable of system according to the difference signal after described orthogonal signalling and trap, and then described positive sequence component and frequency error variable are normalized, obtain incoming frequency value; After integration is carried out to this incoming frequency value, superpose with electrical network rated frequency, obtain frequency locking value, and using the centre frequency of this frequency locking value as filtering link, feed back to filtering link, form closed-loop control, realize frequency-tracking.In above-described embodiment, carry out to difference signal the ability that trap process improves grid-connected system harmonic inhabitation, normalized improves the ability that system suppresses grid voltage amplitude disturbance; Therefore, the embodiment of the present application ensure that the harmonic inhabitation of grid-connected system and the ability of amplitude disturbance simultaneously, solves the problem of prior art.

Concrete, in the embodiment of the present application, carry out the conversion of three phase coordinate systems to two-phase rest frame according to following clark transformation for mula, obtain the voltage signal u under two-phase rest frame _αand u _β:

$\left[\begin{array}{c}{u}_{\mathrm{\α}}\\ u_{\mathrm{\β}}\end{array}\right]=\left[T_{\mathrm{\α\β}}\right]\left[\begin{array}{c}{u}_a\\ u_b\\ u_c\end{array}\right]=\frac{2}{3}\left[\begin{array}{ccc}1& \frac{1}{2}& -\frac{1}{2}\\ 0& \frac{\sqrt{3}}{2}& -\frac{\sqrt{3}}{2}\end{array}\right]\left[\begin{array}{c}{u}_a\\ u_b\\ u_c\end{array}\right].$

Preferably, in the embodiment of the present application, the concrete grammar of described filtering process is adaptive-filtering; Especially, this adaptive filter method is based on Second Order Generalized Integrator (SOGI), and its frequency-domain expression is:

wherein, ω is the incoming frequency of SOGI.

Based on above-mentioned SOGI, obtain corresponding with frequency locking value ω _ocentered by the frequency-domain expression G of bandpass filtering of frequency _dthe frequency-domain expression G of (s) and low-pass filtering _q(s), that is:

$G_d\left(s\right)=\frac{k{\mathrm{\ω}}_{o}s}{s^2+k{\mathrm{\ω}}_{o}s+{\mathrm{\ω}}_o^2};$ $G_q\left(s\right)=\frac{k{\mathrm{\ω}}_o^2}{s^2+k{\mathrm{\ω}}_{o}s+{\mathrm{\ω}}_o^2}.$

Pass through G _ds () is to described voltage signal u _αand u _βcarry out bandpass filtering, pass through G _qs () is to described voltage signal u _αand u _βcarry out low-pass filtering, while the high order harmonic component in filtering voltage signal, the output signal u obtained _{α d}, u _{β d}, u _{α q}, u _{β q}, u _{α ε}and u _{β ε}; Corresponding frequency-domain expression is respectively:

$\left\{\begin{array}{cc}{U}_{\mathrm{xd}}\left(s\right)=G_d\left(s\right)U_x\left(s\right)& G_d\left(s\right)=\frac{k{\mathrm{\ω}}_{o}s}{s^2+k{\mathrm{\ω}}_{o}s+{\mathrm{\ω}}_o^2}\\ U_{\mathrm{xq}}\left(s\right)=G_q\left(s\right)U_x\left(s\right)& G_q\left(s\right)=\frac{k{\mathrm{\ω}}_o^2}{s^2+k{\mathrm{\ω}}_{o}s+{\mathrm{\ω}}_o^2}\\ U_{\mathrm{x\ϵ}}\left(s\right)=U_x\left(s\right)-U_{\mathrm{xd}}\left(s\right)& \end{array}\right.x=\mathrm{\α},\mathrm{\β};$

Wherein, U _xs frequency-domain expression that () is line voltage, k is described G _d(s) and G _qthe filter gain of (s).

Preferably, with reference to Fig. 2, in the embodiment of the present application, to described difference signal u _{α ε}and u _{β ε}the concrete grammar carrying out trap process comprises the steps:

S41, determine cycle-index N;

S42, determine that this (n-th time) circulation needs the harmonic number m of filtering;

S43, according to function carry out trap process to described difference signal, the m subharmonic in difference signal described in filtering, is outputed signal

S44, judge whether n equals N, if so, then perform step S46, otherwise perform step S45;

S45, general as input signal, the numerical value of n adds 1, is back to step S43;

S46, general as the final output signal u ' of circulation trap process _{x ε}, circulation filtering terminates.

Wherein, x=α, β in above-mentioned steps.

Concrete, for simplifying control procedure, the control function of trap processing procedure is consistent with aforementioned adaptive-filtering processing procedure, that is:

$G_{\mathrm{\ϵ}}^m\left(s\right)=\frac{\mathrm{km}{\mathrm{\ω}}_{o}s}{s^2+\mathrm{km}{\mathrm{\ω}}_{o}s+{\left(m{\mathrm{\ω}}_o\right)}^2}.$

Accordingly, the output signal of n-th trap process corresponding frequency signal expression formula be:

$U_{\mathrm{x\ϵ}}^n\left(s\right)=(1-G_{\mathrm{\ϵ}}^m\left(s\right))U_{\mathrm{x\ϵ}}^{n-1}\left(s\right)=(1-\frac{\mathrm{km}{\mathrm{\ω}}_{o}s}{s^2+\mathrm{km}{\mathrm{\ω}}_{o}s+{\left(m{\mathrm{\ω}}_o\right)}^2})U_{\mathrm{x\ϵ}}^{-1}\left(s\right).$

In above formula, 1≤n≤N, N represents preset loop number of times.

As n=1, the input signal of this trap process is i.e. difference signal u _{x ε};

As n>1, the input signal of this trap process is the output signal of last trap process after circulation terminates, the final output signal obtained is corresponding frequency-region signal is $U_{\mathrm{\α\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\α\ϵ}}^N\left(s\right),$ $U_{\mathrm{\β\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\β\ϵ}}^N\left(s\right).$

M represents the harmonic number of the filtering of n-th trap process; In practical application, according to the number of times of all harmonic waves wanting filtering, determine the corresponding relation m=or [n] of m and n.

Such as, filtering 3,5 subharmonic, then definable m=or [n], as n=1, m=3; As n=2, m=3; Fig. 3 shows U _{α q}(s)/U _α(s) and transfer function Bode schemes, and can find out, to voltage signal U _αthe first-harmonic of (s), 3,5 subharmonic have carried out filtering, wherein fundamental frequency trap is the effect of prime adaptive-filtering, and 3,5 subharmonic place traps are effects of described circulation trap process.

The centre frequency ω [n] of n-th trap process is relevant to m, meets ω [n]=m ω _o=or [n] ω _o.

The trap of circulation shown in Fig. 2 processing procedure, filtering can affect larger low-order harmonic to FLL, both ensure that the ability of system harmonic inhabitation, and ensure that frequency locking value ω _ostable, the yield value k of prime adaptive-filtering processing procedure need not be reduced again, even also can increase k as required, improve the ability that system suppresses amplitude disturbance.

In addition, in the embodiment of the present application, obtain the positive sequence component of line voltage under two-phase rest frame with computing formula be:

$\left\{\begin{array}{c}{u}_{\mathrm{\α}}^{+}=\frac{1}{2}{u}_{\mathrm{\αd}}-\frac{1}{2}{u}_{\mathrm{\βq}}\\ u_{\mathrm{\β}}^{+}=\frac{1}{2}{u}_{\mathrm{\αq}}+\frac{1}{2}{u}_{\mathrm{\βd}}\end{array}\right..$

In the embodiment of the present application, calculate the frequency error variable ε of grid-connected system at α axle according to the difference signal after trap process and orthogonal signalling _{f (α)}with the frequency error variable ε at β axle _{f (β)}, the following computing formula of concrete employing:

$\left\{\begin{array}{c}{\mathrm{\ϵ}}_{f\left(\mathrm{\α}\right)}=u_{\mathrm{\αq}}{u}_{\mathrm{\α\ϵ}}^{\′}\\ {\mathrm{\ϵ}}_{f\left(\mathrm{\β}\right)}=u_{\mathrm{\βq}}{u}_{\mathrm{\β\ϵ}}^{\′}\end{array}\right..$

In formula, frequency error is defined as the product with first-harmonic orthogonal signalling and error signal.The definition of main contents in formula, simple declaration.

Preferably, the normalized process described in the embodiment of the present application specifically comprises: according to formula calculate the inverse of positive sequence component amplitude according to formula be normalized, obtain incoming frequency value ω _in; Namely have:

${\mathrm{\ω}}_{\mathrm{in}}={\mathrm{\ω}}_{\mathrm{in}}=-k_{\mathrm{\τ}}({\mathrm{\ϵ}}_{f\left(\mathrm{\α}\right)}+{\mathrm{\ϵ}}_{f\left(\mathrm{\β}\right)})\×\frac{k{\mathrm{\ω}}_o}{{\left(u_{\mathrm{\α}}^{+}\right)}^2+{\left(u_{\mathrm{\β}}^{+}\right)}^2};$ Wherein, k _τrepresent FLL ride gain.

Preferably, in the embodiment of the present application, according to incoming frequency value ω _indetermine frequency locking value ω _ofrequency-domain expression be:

${\mathrm{\ω}}_o={\mathrm{\ω}}_f\left(s\right)+{\mathrm{\ω}}_{\mathrm{in}}\left(s\right)\×\frac{1}{s}.$

For showing the beneficial effect of the application more clearly, obtain under mains by harmonics and amplitude disturbance condition by simulated experiment, when application the embodiment of the present application and traditional frequency locking (phase) control method, the performance curve comparison diagram (as shown in Fig. 4 (a) and Fig. 4 (b)) of grid-connected system, and export the comparison diagram (as shown in Figure 5) of frequency locking value; In experiment, line voltage effective value is 315V, and 5 subharmonic content are 7.86%, 7 subharmonic content be 6.88%, 11 subharmonic content is the line voltage of 7.05%, and simulates three-phase power grid voltage amplitude and drop to 20% situation.

Wherein, Fig. 4 (a) falls front and back the embodiment of the present application and tradition phase-locked (frequently) ring output frequency response curve comparison diagram for voltage magnitude; Can find out, tradition phase-locked (frequently) ring output frequency is comparatively large because harmonic effects fluctuates, and amplitude disturbance causes having very large overshoot in dynamic response process; And adopt the embodiment of the present application all to have rejection ability well to mains by harmonics and amplitude disturbance.

Fig. 4 (b) shows and gives in the embodiment of the present application, difference signal u before trap process _{α ε}with the difference signal after twice trap process comparison diagram; Can find, harmonic content is suppressed significantly, and tradition phase-locked (frequently) ring is directly based on u _{α ε}control, and the embodiment of the present application obviously reduces based on harmonic content control, improve grid-connected system ring harmonic inhabitation ability.

Fig. 5 is for exporting the comparison diagram of frequency locking value when application the embodiment of the present application and traditional frequency locking (phase) control method; Can find out, relative to conventional method, after application the embodiment of the present application, the fluctuation of output frequency locking value is less, harmonic content is less.

Corresponding with said method embodiment, the embodiment of the present application additionally provides a kind of frequency locking control system suppressing mains by harmonics and amplitude disturbance; With reference to system shown in Figure 6 block diagram, this frequency locking control system comprises:

Analog-to-digital conversion module 2, for carrying out analog-to-digital conversion to the analog signal of the three-phase power grid voltage obtained of sampling, obtains the digital signal u of three-phase power grid voltage _a, u _band u _c;

Coordinate transformation unit 3, for described u _a, u _band u _ccarry out coordinate transform, obtain the voltage u under two-phase rest frame _αand u _β;

Filter unit 4, for according to frequency locking value ω _orespectively to described u _αand u _βcarry out filtering process, obtain fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}, and difference signal u _{α ε}and u _{β ε}; Wherein, u _{α d}for u _αfundamental signal, u _{α q}for u _{α d}orthogonal signalling, u _{α ε}for u _αwith u _{α d}difference signal; u _{β d}for u _βfundamental signal, u _{β q}for u _{β d}orthogonal signalling, u _{β ε}for u _βwith u _{β d}difference signal;

Positive sequence component extraction unit 5, for according to described fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}calculate the positive sequence component of line voltage under two-phase rest frame with

Trap wave unit 6, for described difference signal u _{α ε}and u _{β ε}carry out trap process, obtain u' _{α ε}and u' _{β ε};

Frequency error variable calculation unit 7, for according to described u _{α q}and u' _{α ε}calculate the frequency error variable ε of mains frequency at α axle _{f (α)}, according to u _{β q}and u' _{β ε}mains frequency is at the frequency error variable ε of β axle _{f (β)};

Normalized unit 8, for described ε _{f (α)}and ε _{f (β)}be normalized and obtain incoming frequency value ω _in;

Frequency locking unit 9, for described incoming frequency value ω _incarry out integration, and by integral result and electrical network rated frequency ω _fsuperposition, obtains described frequency locking value ω _o.

From said structure and function, the digital signal of the embodiment of the present application three-phase power grid voltage is successively through coordinate transformation unit and filter unit, finally obtain the fundamental signal of filtering high order harmonic component and corresponding orthogonal signalling, and the difference signal of described voltage signal and corresponding orthogonal signalling; Rapid extraction the positive sequence component of line voltage can be obtained according to described fundamental signal and orthogonal signalling; Trap process is carried out to described difference signal, with the corresponding low-order harmonic of filtering; Calculate the frequency error variable of system according to the difference signal after described orthogonal signalling and trap, and then described positive sequence component and frequency error variable are normalized, obtain incoming frequency value; After integration is carried out to this incoming frequency value, superpose with electrical network rated frequency, obtain frequency locking value, and using the centre frequency of this frequency locking value as filtering link, feed back to filtering link, form closed-loop control, realize frequency-tracking.In the present embodiment, by trapper, the ability that trap process improves grid-connected system harmonic inhabitation is carried out to difference signal, be normalized by normalized unit, improve the ability that system suppresses grid voltage amplitude disturbance; Therefore, the embodiment of the present application ensure that the harmonic inhabitation of grid-connected system and the ability of amplitude disturbance simultaneously, solves the problem of prior art.

In addition, frequency locking control system described in the embodiment of the present application also comprises sampling conditioning unit 1, for sampling to three-phase power grid voltage, and filtering carried out to sampled signal, zoom in or out, output level process etc., to obtain the accessible signal of analog-to-digital conversion module.Concrete, sampling process realizes by the mode such as voltage sensor or electric resistance partial pressure.

Preferably, in the embodiment of the present application, described filter unit comprises: sef-adapting filter;

Described sef-adapting filter is based on Second Order Generalized Integrator, and the frequency-domain expression of output signal is respectively:

$\left\{\begin{array}{cc}{U}_{\mathrm{xd}}\left(s\right)=G_d\left(s\right)U_x\left(s\right)& G_d\left(s\right)=\frac{k{\mathrm{\ω}}_{o}s}{s^2+k{\mathrm{\ω}}_{o}s+{\mathrm{\ω}}_o^2}\\ U_{\mathrm{xq}}\left(s\right)=G_q\left(s\right)U_x\left(s\right)& G_q\left(s\right)=\frac{k{\mathrm{\ω}}_o^2}{s^2+k{\mathrm{\ω}}_{o}s+{\mathrm{\ω}}_o^2}\\ U_{\mathrm{x\ϵ}}\left(s\right)=U_x\left(s\right)-U_{\mathrm{xd}}\left(s\right)& \end{array}\right.x=\mathrm{\α},\mathrm{\β};$

Wherein, U _xs frequency-domain expression that () is line voltage, G _ds centered by (), frequency is ω _oband pass filter, G _qs centered by (), frequency is ω _olow pass filter, k is described G _d(s) and G _qthe filter gain of (s).

Preferably, in the embodiment of the present application, described trap wave unit comprises:

Cycle controller, for determining the harmonic number m of the filtering of cycle-index N and n-th trap process of trap process;

Trapper, under the control of described cycle controller, according to following formula to input signal in m subharmonic carry out trap process, outputed signal and,

$U_{\mathrm{x\ϵ}}^n\left(s\right)=(1-\frac{\mathrm{km}{\mathrm{\ω}}_{o}s}{s^2+\mathrm{km}{\mathrm{\ω}}_{o}s+{\left(m{\mathrm{\ω}}_o\right)}^2})U_{\mathrm{x\ϵ}}^{n-1}\left(s\right)x=\mathrm{\α},\mathrm{\β};$

Shift register, for storing the output signal of described trapper, and as the input signal of next trap process;

Wherein, 1≤n≤N, N represents preset loop number of times; Described u' _{α ε}frequency-region signal be $U_{\mathrm{\α\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\α\ϵ}}^N\left(s\right),$ U' _{β ε}frequency-region signal be $U_{\mathrm{\β\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\β\ϵ}}^N\left(s\right);$

M=or [n], represent n-th trap process for harmonic number; The trapper centre frequency ω [n] of n-th trap process meets ω [n]=m ω _o=or [n] ω _o.

One of ordinary skill in the art will appreciate that all or part of flow process realized in above-described embodiment method, that the hardware that can carry out instruction relevant by computer program has come, described program can be stored in a computer read/write memory medium, described program, when performing, can comprise the flow process of the embodiment as above-mentioned each side method.Wherein, described storage medium can be magnetic disc, CD, read-only store-memory body (Read-OnlyMemory, ROM) or random store-memory body (RandomAccessMemory, RAM) etc.

It should be noted that, in this article, the such as relational terms of first and second grades and so on is only used for an entity or operation to separate with another entity or operating space, and not necessarily requires or imply the relation that there is any this reality between these entities or operation or sequentially.

Each embodiment in this specification all adopts the mode of going forward one by one to describe, between each embodiment identical similar part mutually see, what each embodiment stressed is the difference with other embodiments.To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the application.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein when not departing from the spirit or scope of the application, can realize in other embodiments.Therefore, the application can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.

Claims (10)

1. suppress a frequency locking control method for mains by harmonics and amplitude disturbance, it is characterized in that, comprising:

Obtain the digital signal u of three-phase power grid voltage _a, u _band u _c, and coordinate transform is carried out to it, obtain the voltage signal u under two-phase rest frame _αand u _β;

According to frequency locking value ω _orespectively to described u _αand u _βcarry out filtering process, obtain fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}, and difference signal u _{α ε}and u _{β ε}; Wherein, u _{α d}for u _αfundamental signal, u _{α q}for u _{α d}orthogonal signalling, u _{α ε}for u _αwith u _{α d}difference signal; u _{β d}for u _βfundamental signal, u _{β q}for u _{β d}orthogonal signalling, u _{β ε}for u _βwith u _{β d}difference signal;

According to described fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}calculate the positive sequence component of line voltage under two-phase rest frame with

To described difference signal u _{α ε}and u _{β ε}carry out trap process, obtain u' _{α ε}and u' _{β ε};

According to described u _{α q}and u' _{α ε}calculate the frequency error variable ε of mains frequency at α axle _{f (α)}, according to u _{β q}and u' _{β ε}mains frequency is at the frequency error variable ε of β axle _{f (β)};

To described ε _{f (α)}and ε _{f (β)}be normalized and obtain incoming frequency value ω _in;

To described incoming frequency value ω _incarry out integration, and by integral result and electrical network rated frequency ω _fsuperposition, obtains described frequency locking value ω _o.

2. frequency locking control method according to claim 1, is characterized in that, described fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}, and difference signal u _{α ε}and u _{β ε}frequency-domain expression be respectively:

$\left\{\begin{array}{ccc}{U}_{xd}\left(s\right)=G_d\left(s\right)U_x\left(s\right)& G_d\left(s\right)=\frac{{\mathrm{k\ω}}_{o}s}{s^2+{\mathrm{k\ω}}_{o}s+{\mathrm{\ω}}_o^2}& \\ U_{xq}\left(s\right)=G_q\left(s\right)U_x\left(s\right)& G_q\left(s\right)=\frac{{\mathrm{k\ω}}_o^2}{s^2+{\mathrm{k\ω}}_{o}s+{\mathrm{\ω}}_o^2}& x=\mathrm{\α},\mathrm{\β}\\ U_{x\mathrm{\ϵ}}\left(s\right)=U_x\left(s\right)-U_{xd}\left(s\right)& & \end{array}\right.;$

Wherein, U _xs frequency-domain expression that () is line voltage, G _ds centered by (), frequency is ω _othe frequency-domain expression of band pass filter, G _qs centered by (), frequency is ω _othe frequency-domain expression of low pass filter, k is described G _d(s) and G _qthe filter gain of (s).

3. frequency locking control method according to claim 2, is characterized in that, described to described difference signal u _{α ε}and u _{β ε}carry out trap process, comprising:

To described difference signal u _{α ε}and u _{β ε}carry out the process of circulation trap, and the frequency-domain expression that n-th trap process terminates to output signal is:

$\begin{array}{cc}{U}_{x\mathrm{\ϵ}}^n\left(s\right)=(1-\frac{{\mathrm{km\ω}}_{o}s}{s^2+{\mathrm{km\ω}}_{o}s+{\left({\mathrm{m\ω}}_o\right)}^2})U_{x\mathrm{\ϵ}}^{n-1}\left(s\right)& x=\mathrm{\α},\mathrm{\β}\end{array};$

Wherein, 1≤n≤N, N represents preset loop number of times; Described u' _{α ε}frequency-region signal be $U_{\mathrm{\α}\mathrm{\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\α}\mathrm{\ϵ}}^N\left(s\right),$ U' _{β ε}frequency-region signal be $U_{\mathrm{\β}\mathrm{\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\β}\mathrm{\ϵ}}^N\left(s\right);$

M=or [n], represents the harmonic number of the filtering of n-th trap process; The trapper centre frequency ω [n] of n-th trap process meets ω [n]=m ω _o=or [n] ω _o.

4. frequency locking control method according to claim 1, is characterized in that, described according to described fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}calculate the positive sequence component of line voltage under two-phase rest frame with computing formula is:

$\left\{\begin{array}{c}{u}_{\mathrm{\α}}^{+}=\frac{1}{2}{u}_{\mathrm{\α}d}-\frac{1}{2}{u}_{\mathrm{\β}q}\\ u_{\mathrm{\β}}^{+}=\frac{1}{2}{u}_{\mathrm{\α}q}+\frac{1}{2}{u}_{\mathrm{\β}d}\end{array}\right..$

5. frequency locking control method according to claim 1, is characterized in that, described frequency error variable ε _{f (α)}and ε _{f (β)}computing formula be:

$\left\{\begin{array}{c}{\mathrm{\ϵ}}_{f\left(\mathrm{\α}\right)}=u_{\mathrm{\β}q}{u}_{\mathrm{\α}\mathrm{\ϵ}}^{\′}\\ {\mathrm{\ϵ}}_{f\left(\mathrm{\β}\right)}=u_{\mathrm{\β}q}{u}_{\mathrm{\β}\mathrm{\ϵ}}^{\′}\end{array}\right..$

6. frequency locking control method according to claim 1, is characterized in that, described to described ε _{f (α)}and ε _{f (β)}be normalized and obtain incoming frequency value ω _infrequency-domain expression be:

${\mathrm{\ω}}_{in}=-k_{\mathrm{\τ}}({\mathrm{\ϵ}}_{f\left(\mathrm{\α}\right)}+{\mathrm{\ϵ}}_{f\left(\mathrm{\β}\right)})\×\frac{{\mathrm{k\ω}}_o}{{\left(u_{\mathrm{\α}}^{+}\right)}^2+{\left(u_{\mathrm{\β}}^{+}\right)}^2};$

In formula, k _τfor FLL gain.

7. frequency locking control method according to claim 1, is characterized in that, described frequency locking value ω _ofrequency-domain expression be:

${\mathrm{\ω}}_o={\mathrm{\ω}}_f\left(s\right)+{\mathrm{\ω}}_{in}\left(s\right)\×\frac{1}{s};$

In formula, ω _ffor theoretical mains frequency value.

8. suppress a frequency locking control system for mains by harmonics and amplitude disturbance, it is characterized in that, comprising:

Analog-to-digital conversion module, for carrying out analog-to-digital conversion to the analog signal of the three-phase power grid voltage obtained of sampling, obtains the digital signal u of three-phase power grid voltage _a, u _band u _c;

Coordinate transformation unit, for described u _a, u _band u _ccarry out coordinate transform, obtain the voltage u under two-phase rest frame _αand u _β;

Filter unit, for according to frequency locking value ω _orespectively to described u _αand u _βcarry out filtering process, obtain fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}, and difference signal u _{α ε}and u _{β ε}; Wherein, u _{α d}for u _αfundamental signal, u _{α q}for u _{α d}orthogonal signalling, u _{α ε}for u _αwith u _{α d}difference signal; u _{β d}for u _βfundamental signal, u _{β q}for u _{β d}orthogonal signalling, u _{β ε}for u _βwith u _{β d}difference signal;

Positive sequence component extraction unit, for according to described fundamental signal u _{α d}and u _{β d}, orthogonal signalling u _{α q}and u _{β q}calculate the positive sequence component of line voltage under two-phase rest frame with

Trap wave unit, for described difference signal u _{α ε}and u _{β ε}carry out trap process, obtain u' _{α ε}and u' _{β ε};

Frequency error variable calculation unit, for according to described u _{α q}and u' _{α ε}calculate the frequency error variable ε of mains frequency at α axle _{f (α)}, according to u _{β q}and u' _{β ε}mains frequency is at the frequency error variable ε of β axle _{f (β)};

Normalized unit, for described ε _{f (α)}and ε _{f (β)}be normalized and obtain incoming frequency value ω _in;

Frequency locking unit, for described incoming frequency value ω _incarry out integration, and by integral result and electrical network rated frequency ω _fsuperposition, obtains described frequency locking value ω _o.

9. frequency locking control system according to claim 8, is characterized in that, described filter unit comprises: sef-adapting filter;

Described sef-adapting filter is based on Second Order Generalized Integrator, and the frequency-domain expression of output signal is respectively:

$\left\{\begin{array}{ccc}{U}_{xd}\left(s\right)=G_d\left(s\right)U_x\left(s\right)& G_d\left(s\right)=\frac{{\mathrm{k\ω}}_{o}s}{s^2+{\mathrm{k\ω}}_{o}s+{\mathrm{\ω}}_o^2}& \\ U_{xq}\left(s\right)=G_q\left(s\right)U_x\left(s\right)& G_q\left(s\right)=\frac{{\mathrm{k\ω}}_o^2}{s^2+{\mathrm{k\ω}}_{o}s+{\mathrm{\ω}}_o^2}& x=\mathrm{\α},\mathrm{\β}\\ U_{x\mathrm{\ϵ}}\left(s\right)=U_x\left(s\right)-U_{xd}\left(s\right)& & \end{array}\right.;$

Wherein, U _xs frequency-domain expression that () is line voltage, G _ds centered by (), frequency is ω _oband pass filter, G _qs centered by (), frequency is ω _olow pass filter, k is described G _d(s) and G _qthe filter gain of (s).

10. frequency locking control system according to claim 9, is characterized in that, described trap wave unit comprises:

Cycle controller, for the harmonic number m of the filtering of the cycle-index and n-th trap process of determining trap process;

Trapper, under the control of described cycle controller, according to following formula to input signal in m subharmonic carry out trap process, outputed signal and,

$\begin{array}{cc}{U}_{x\mathrm{\ϵ}}^n\left(s\right)=(1-\frac{{\mathrm{km\ω}}_{o}s}{s^2+{\mathrm{km\ω}}_{o}s+{\left({\mathrm{m\ω}}_o\right)}^2})U_{x\mathrm{\ϵ}}^{n-1}\left(s\right)& x=\mathrm{\α},\mathrm{\β}\end{array};$

Shift register, for storing the output signal of described trapper, and as the input signal of next trap process;

Wherein, 1≤n≤N, N represents preset loop number of times; Described u' _{α ε}frequency-region signal be $U_{\mathrm{\α}\mathrm{\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\α}\mathrm{\ϵ}}^N\left(s\right),$ U' _{β ε}frequency-region signal be $U_{\mathrm{\β}\mathrm{\ϵ}}^{\′}\left(s\right)=U_{\mathrm{\β}\mathrm{\ϵ}}^N\left(s\right),$

M=or [n], represents the harmonic number of the filtering of n-th trap process; The trapper centre frequency ω [n] of n-th trap process meets ω [n]=m ω _o=or [n] ω _o.