CN103713912B - A kind of computer automatic boot circuit - Google Patents
A kind of computer automatic boot circuit Download PDFInfo
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- CN103713912B CN103713912B CN201210370693.4A CN201210370693A CN103713912B CN 103713912 B CN103713912 B CN 103713912B CN 201210370693 A CN201210370693 A CN 201210370693A CN 103713912 B CN103713912 B CN 103713912B
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- electronic switch
- computer
- south bridge
- chip
- bridge chip
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Abstract
The invention discloses a kind of computer automatic boot circuit, for automatically turning on the computer, including South Bridge chip, and the super I/O chip being connected with South Bridge chip, in addition to the first electronic switch, the second electronic switch, the first electric capacity, first resistor, second resistance and 3rd resistor；First electronic switch and the second electronic switch include first end, the second end, the 3rd end respectively；The reset signal end RSMRST# that 3rd end of the first electronic switch passes through the first capacitance connection South Bridge chip, first end connects the reset signal end RSMRST# of South Bridge chip by time delay module, and the second end connects the first end of second electronic switch by first resistor；The second end ground connection of second electronic switch, the 3rd end connects the start trigger signal end FP_PWRBTN# of super I/O chip, the standby power of the computer is connected by 3rd resistor respectively.The implementation of the computer automatic boot circuit of the present invention is devices at full hardware structure, and its line construction is simple, and cost is low.
Description
Technical field
The present invention relates to automatic boot circuit, applies after computer system telegram in reply, can weigh more specifically to one kind
The new computer automatic boot circuit for starting computer system.
Background technology
Computer in people live using more and more extensive, such as personal computer and industrial computer.In computer system
Operation in, if occur civil power power-off, computer shutdown, when civil power again come after often require that computer capacity horse back
Start is resumed work.The common practice of computer motherboard at this stage is that super I/O chip provides hardware circuit control,
BIOS provides software control, such as it is POWER ON that BIOS, which is needed AC POWER FAIL function settings, so carrys out civil power every time
With regard to Auto Power On.But BIOS controls are needed using aforesaid way, BIOS CMOS, which is set, needs a RTC battery powereds ability
Keep set, when due to vibrations etc. reason cause RTC batteries loosen, RTC power supply transient loss, or due to long-time use RTC
Battery power voltage deficiency, CMOS, which is set, will lose and revert to factory-default, AC POWERFAIL function setting
It may be modified, cause incoming call automatic turn-on function to realize.
The content of the invention
The technical problem to be solved in the present invention is, needs hardware and software co- controlling computer for prior art
The defects of Auto Power On, software boot program complexity, there is provided a kind of only to pass through hardware circuit and the simple computer of circuit structure
Automatic boot circuit.
The technical solution adopted for the present invention to solve the technical problems is：A kind of computer automatic boot circuit is provided, used
In the automatic opening computer, including South Bridge chip, and the super I/O chip being connected with South Bridge chip, in addition to first
Electronic switch, the second electronic switch, the first electric capacity, first resistor, second resistance and 3rd resistor；First electronic switch and
Second electronic switch includes first end, the second end, the 3rd end respectively；3rd end of first electronic switch passes through described first
The reset signal end RSMRST# of capacitance connection South Bridge chip, first end connect the reset signal of South Bridge chip by time delay module
RSMRST# is held, the second end connects the first end of second electronic switch by first resistor；The of second electronic switch
Two ends are grounded, and the 3rd end connects the start trigger signal end FP_PWRBTN# of super I/O chip, by the 3rd electricity respectively
Resistance connects the standby power of the computer；
Wherein, the time delay module includes the 4th resistance and the second electric capacity, the electricity of one end connection first of second electric capacity
One end of the first end of sub switch and the 4th resistance, the other end ground connection of second electric capacity；4th resistance it is another
The reset signal end RSMRST# of end connection South Bridge chip.
In computer automatic boot circuit of the present invention, the automatic boot circuit also includes the first diode,
The negative electrode of the diode connects the 3rd end of first electronic switch, plus earth.
In computer automatic boot circuit of the present invention, first electronic switch is N-channel MOS type field-effect
Pipe, its first end, the second end, the 3rd end are respectively grid, source electrode, drain electrode.
In computer automatic boot circuit of the present invention, second electronic switch is NPN triode, and it first
End, the second end, the 3rd end are respectively base stage, emitter stage, colelctor electrode.
In computer automatic boot circuit of the present invention, first diode is Schottky diode.
Implement the computer automatic boot circuit of the present invention, have the advantages that：The computer automatic boot circuit
The conducting of the first electronic switch can be controlled when computer restores electricity, and then control the conducting of the second electronic switch, output one is low
Level gives the start trigger signal end FP_PWRBTN# of super I/O chip, then super I/O chip notice south bridge
Chip is started shooting.The implementation of the computer automatic boot circuit of the present invention is devices at full hardware structure, and its line construction is simple, cost
It is low.
Brief description of the drawings
Below in conjunction with drawings and Examples, the invention will be further described, in accompanying drawing：
Fig. 1 is the schematic diagram of the computer automatic boot circuit of the present invention.
Embodiment
In order that the purpose of the present invention is more clearly understood, below in conjunction with drawings and Examples, traveling one is entered to the present invention
Step describes in detail.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not used to limit this hair
It is bright.
As shown in figure 1, the schematic diagram of the computer automatic boot circuit in the present invention, for automatically turning on the computer,
Including South Bridge chip 10, and the super I/O chip 20 being connected with South Bridge chip 10, in addition to the first electronic switch, second
Electronic switch, the first electric capacity C1, first resistor R1, second resistance R2,3rd resistor R3, time delay module 30, the first diode D1；
In specific implementation process, the first electronic switch uses N-channel MOS type FET Q1, and the second electronic switch uses the poles of NPN tri-
Pipe Q2.
FET Q1 drain electrode passes through the reset signal end RSMRST# of the first electric capacity C1 connections South Bridge chip 10, grid
The reset signal end RSMRST# of South Bridge chip 10 is connected by time delay module 30, source electrode passes through first resistor R1 connecting triodes
Q2 base stage；Triode Q2 base stage is also grounded by second resistance R2, and triode Q2 grounded emitter, colelctor electrode connects respectively
Meet the start trigger signal end FP_PWRBTN# of super I/O chip 20, waiting for the computer is connected by 3rd resistor R3
Electromechanical source+V3.3SB.
Time delay module 30 includes the 4th resistance R4 and the second electric capacity C2, the second electric capacity C2 one end connection FET Q1's
One end of grid and the 4th resistance R4, the second electric capacity C2 other end ground connection；4th resistance R4 other end connection south bridge core
The reset signal end RSMRST# of piece 10.
First diode D1 negative electrodes connection FET Q1 drain electrode, plus earth.In specific implementation process, two pole
Pipe D1 is Schottky diode, can such as use model IN4148 diode.
In specific work process, after all standby powers of South Bridge chip 10 are ready for, reset signal end
(reset signal end RSMRST# RSMRST# signals are the standby powers of South Bridge chip to RSMRST# output high level+3.3V
POWER OK signals, are exported to South Bridge chip by feed circuit of mainboard).The trigger signal end FP_PWRBTN# that starts shooting is to super defeated
Enter the starting-up signal of pio chip 20, when FP_PWRBTN# has a low level, super I/O chip 20 is informed about
South Bridge chip 10 is started shooting.
When civil power one, upper electricity, all standby powers of South Bridge chip 10 are ready for computer at once, then south bridge core
The reset signal end RSMRST# of piece 10 changes to+3.3V (becoming high level by low level) by 0V, passes through the 4th resistance R4 and second
After electric capacity C2 is delayed, FET Q1 conductings, the high level+3.3V of the reset signal end RSMRST# outputs of South Bridge chip 10
Start to charge to the first electric capacity C1 by the loop of FET Q1, first resistor R1, second resistance R2 compositions, B point (triodes
Q2 base terminal) voltage reaches highest, and exceedes triode Q2 conducting voltage, then and triode Q2 is turned on, triode Q2's
Colelctor electrode exports low level, i.e., exports low level to the start trigger signal end FP_PWRBTN# of super I/O chip 20.
With the reduction of charging current, the voltage of B points also reduces, when B points voltage is less than triode Q2 conducting voltage, triode Q2
Cut-off, i.e., the start trigger signal end FP_PWRBTN# of super I/O chip 20 is high level, and such triode Q2 is with regard to defeated
Gone out a low pulse notifies South Bridge chip 10 to start shooting to super I/O chip 20, super I/O chip 20, so
It is achieved that the function of incoming call Auto Power On.
After the first electric capacity C1 is fully charged, there is+3.3V voltage between the second electric capacity C2 the 1st pin and the 2nd pin, work as civil power
Disconnect, the reset signal end RSMRST# of South Bridge chip 10 is changed into 0V (high level becomes low level) from+3.3V, due to the first electricity
Holding C1 both end voltages can not be mutated, therefore the pin voltage-to-grounds of the first electric capacity C1 the 2nd are -3.3V, the voltage at the first electric capacity C1 both ends
It can be discharged over the ground by the first diode D1, so whole automatic boot circuit can waits to touch again during civil power next time
Hair start.
The pulsewidth of the start trigger signal end FP_PWRBTN# of super I/O chip 20 low level pulse can lead to
Adjustment first resistor R1 and second resistance R2 are crossed to change.
The delay circuit formed by using the 4th resistance R4 and the second electric capacity C2, trigger signal end of starting shooting can be prevented
FP_PWRBTN# low pulse send it is too early cause computer to start shooting because FP_PWRBTN# low pulse signal must be
Reset signal end RSMRST# signals are sent after being ready to, and mainboard could normal boot-strap.
Using the computer automatic boot circuit of the present invention, super I/O chip is given when computer is sent a telegram here after a power failure
20 mono- low pulse of start trigger signal end FP_PWRBTN#, simulation is started shooting by the action of key, not by bios software control
System, RTC power supplies are caused to be lost by vibrations no matter whether RTC batteries have, no matter due to whether being powered not using RTC batteries for a long time
Foot, can realize incoming call automatic turn-on function.By using the computer automatic boot circuit, when computer restores electricity,
FET Q1 conductings are controlled, and then control triode Q2 conductings, export a low level opening to super I/O chip 20
Machine trigger signal end FP_PWRBTN#, then super I/O chip 20 notify South Bridge chip 10 to start shooting.The calculating of the present invention
The implementation of machine automatic boot circuit is devices at full hardware structure, and its line construction is simple, and cost is low.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
All any modification, equivalent and improvement made within refreshing and principle etc., should be included in the scope of the protection.
Claims (5)
1. a kind of computer automatic boot circuit, connect for automatically turning on the computer, including South Bridge chip, and with South Bridge chip
The super I/O chip connect, it is characterised in that also including the first electronic switch, the second electronic switch, the first electric capacity, first
Resistance, second resistance and 3rd resistor；First electronic switch and the second electronic switch respectively include first end, the second end,
3rd end；The reset signal end that 3rd end of first electronic switch passes through the first capacitance connection South Bridge chip
RSMRST#, first end connect the reset signal end RSMRST# of South Bridge chip by time delay module, and the second end passes through first resistor
Connect the first end of second electronic switch；The first end of second electronic switch is also grounded by second resistance, described
The second end ground connection of second electronic switch, the 3rd end connects the start trigger signal end FP_ of super I/O chip respectively
PWRBTN#, the standby power for connecting by 3rd resistor the computer；
Wherein, the time delay module includes the 4th resistance and the second electric capacity, and one end of second electric capacity connects the first electronic cutting
One end of the first end of pass and the 4th resistance, the other end ground connection of second electric capacity；The other end of 4th resistance connects
Meet the reset signal end RSMRST# of South Bridge chip.
2. computer automatic boot circuit according to claim 1, it is characterised in that the automatic boot circuit also includes
First diode, the negative electrode of the diode connect the 3rd end of first electronic switch, plus earth.
3. computer automatic boot circuit according to claim 2, it is characterised in that first electronic switch is N ditches
Road MOS type FET, its first end, the second end, the 3rd end are respectively grid, source electrode, drain electrode.
4. computer automatic boot circuit according to claim 3, it is characterised in that second electronic switch is NPN
Triode, its first end, the second end, the 3rd end are respectively base stage, emitter stage, colelctor electrode.
5. computer automatic boot circuit according to claim 4, it is characterised in that first diode is Schottky
Diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210370693.4A CN103713912B (en) | 2012-09-29 | 2012-09-29 | A kind of computer automatic boot circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210370693.4A CN103713912B (en) | 2012-09-29 | 2012-09-29 | A kind of computer automatic boot circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103713912A CN103713912A (en) | 2014-04-09 |
| CN103713912B true CN103713912B (en) | 2017-11-24 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210370693.4A Expired - Fee Related CN103713912B (en) | 2012-09-29 | 2012-09-29 | A kind of computer automatic boot circuit |
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| CN (1) | CN103713912B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104407668B (en) * | 2014-10-29 | 2017-07-28 | 大唐移动通信设备有限公司 | It is a kind of to control the upper electric board automatically of the board based on X86 system architectures |
| CN106155250B (en) * | 2015-04-17 | 2019-08-06 | 鸿富锦精密工业(武汉)有限公司 | Computer reflex circuit |
| CN106291438B (en) * | 2015-06-09 | 2019-06-07 | 深圳市祈飞科技有限公司 | Abnormal shutdown processing method and processing device and electric energy measuring equipment equipped therewith |
| CN106292984A (en) * | 2016-09-05 | 2017-01-04 | 深圳微步信息股份有限公司 | Automatic boot circuit and automatic power-on method |
| CN107807728B (en) * | 2016-09-09 | 2020-07-21 | 佛山市顺德区顺达电脑厂有限公司 | Shutdown discharge system |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201242718Y (en) * | 2008-07-23 | 2009-05-20 | 佛山市顺德区顺达电脑厂有限公司 | Automatic startup apparatus |
| CN201773350U (en) * | 2010-03-10 | 2011-03-23 | 深圳华北工控股份有限公司 | Computer master control board power supply management module for PCTV integrated machine |
| CN202025308U (en) * | 2011-03-02 | 2011-11-02 | 深圳市研祥软件技术有限公司 | Computer and automatic boot circuit thereof |
-
2012
- 2012-09-29 CN CN201210370693.4A patent/CN103713912B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201242718Y (en) * | 2008-07-23 | 2009-05-20 | 佛山市顺德区顺达电脑厂有限公司 | Automatic startup apparatus |
| CN201773350U (en) * | 2010-03-10 | 2011-03-23 | 深圳华北工控股份有限公司 | Computer master control board power supply management module for PCTV integrated machine |
| CN202025308U (en) * | 2011-03-02 | 2011-11-02 | 深圳市研祥软件技术有限公司 | Computer and automatic boot circuit thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103713912A (en) | 2014-04-09 |
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