CN103699467B - SOC chip burning and debugging method - Google Patents
SOC chip burning and debugging method Download PDFInfo
- Publication number
- CN103699467B CN103699467B CN201310738739.8A CN201310738739A CN103699467B CN 103699467 B CN103699467 B CN 103699467B CN 201310738739 A CN201310738739 A CN 201310738739A CN 103699467 B CN103699467 B CN 103699467B
- Authority
- CN
- China
- Prior art keywords
- file
- development board
- burning
- write
- flash
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Debugging And Monitoring (AREA)
- Stored Programmes (AREA)
Abstract
The invention discloses an SOC chip burning and debugging method. The method includes the steps of connecting, configuring development board basic information, burning with a Linux system, burning with an independent system, and debugging. A safe, stable, simple and reliable graphical operating interface is provided, and the method is mainly applied to the industries of integrated circuits and the like. A computer is connected with a programmable chip through a USB interface, the chip is directly powered by the computer, implementation is simple, and the cost is low. Chip-recognizable commands are transmitted to directly burn, debug and configure the programmable chip, the process of frequent write command is simplified, hardware debugging tools are omitted, and the cost is further reduced. The SOC chip burning and debugging method supports direct writing of an initiator from SDRAM, and the development time of embedded software is saved.
Description
Technical field
The present invention relates to a kind of method by USB interface debugging burning SOC.
Background technology
Replication tool, for writing data on programmable chip, makes chip have different functions.Existing a kind of replication tool on market, it comprises multiple control chip, and can complete burning and exploitation two kinds of functions, but its replication rate is slow, for only selecting, the enterprise cost of burning function is too high.The another kind of replication tool only with burning function, it electric power loop comprising the microprocessing unit of the information of sending and process corresponding informance, data buffer zone that reading/writing document is kept in and power management is provided.Microprocessing unit first by data storage to data buffer area, and then by interface by recordable data to programmable chip, burning process is complicated, and needs electric power loop managing electrical power, and complicated structure adds cost.
Summary of the invention
For above-mentioned situation, applicant is on the basis of the burning with debugging flow process that fully have studied programmable chip, and provide a kind of SOC burning adjustment method, the operation for development board provides patterned user interface, simplify debugging, burning process, simplify structure and reduce costs.
Technical scheme of the present invention is as follows:
A kind of SOC burning adjustment method, comprises the following steps:
1) Connection Step: start a timer, the at set intervals USB interface information that is connected with PC of autoscan, confirm and upgrade the connection of development board and PC; Described timer exists all the time, and when having detected that development board connects, the information of display development board; Subsequent step is all only just effectively actual after having scanned development board connection PC; Obtain the order of user's input, send to development board by USB interface, and the command execution results that display obtains;
2) development board Back ground Information configuration step: obtain the specifying information of development board comprising CPU model, EMI, USBPKG Size, SPI FLASH that user inserts, using above-mentioned information as basis for estimation, import different orders by USB interface into development board, proceed to following step 3) respectively or step 4) operates;
3) linux system burning step: by built-in hboot.bin fileinfo, automatically judge to write the address becoming development board and specify according to configuration information before burning linux system, read Sys Loader, U-boot, OS Kernel, Bootup Logo and Root FS file path information that user inserts successively, read the content of above-mentioned All Files or single file, file content is write the assigned address of development board by the host-host protocol of being specified by command mode and development board;
4) autonomous system burning step: read Sys loader file, application file routing information that user inserts successively, file reading content, and step 2) in the CPU model selected of user, the host-host protocol that file content is specified by command mode and development board by programming in the address of specifying; When from Chip Loader frame file reading path and when obtaining file content, by foregoing by command forms write development board SRAM or SDRAM, directly from assigned address startup optimization, the file write by which is only performed successively, and after development board power down, file content is not saved;
5) debugging step: comprise following four kinds of operations:
Send file to RAM: read the file path content that user specifies, write and specify address ram; This operates by resolution file and sends specified command to development board and completes;
Receive file: this operation is also analyzed the command execution results received and is stored in user's specified path by sending specified command to development board and completes, and the file content length of acquisition is specified by user;
Programming file is to Flash: read the file path content that user specifies, and is write and specifies Flash address; This operates by resolution file and sends specified command to development board and completes; Described Flash can be nandflash, nor flash or spi flash;
Jump: read by read-write Flash order or write the Flash value of assigned address.
Advantageous Effects of the present invention is:
The graphical operation interface that the present invention can provide safety and stability simple and reliable, be mainly used in the industries such as integrated circuit, support the download to development board flash internal memory, programme, copy, clash the operations such as mirror image, support to carry out debugging operations from the sdram reading and writing of files of development board, support directly download to development board sdram and run.Compared with prior art, computing machine is connected with programmable chip by USB interface by the present invention, directly utilizes computing machine to chip power supply, and realize simple, cost is lower.Send the discernible order of chip by the present invention, directly burning, debugging, configuration are carried out to programmable chip, simplify the process of frequent write order, eliminate hardware debug tool, reduce further cost.The present invention supports, directly from sdram programming start-up routine, to have saved the time required for embedded software developing.
Accompanying drawing explanation
Figure l is schematic flow sheet of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described further.
Fig. 1 shows the block diagram of programmable chip burning of the present invention debugging flow process, comprising:
One, Connection Step:
As one of common steps of the present invention, first, start a timer, the USB interface information that is connected with PC of autoscan at set intervals, thus confirm and upgrade the connection of development board and PC, this timer can exist all the time in the life cycle of whole flow process of the present invention, and when detecting that development board connects by the information displaying of development board in Device List window.Other subsequent operations of the present invention, all only just effectively actual after having scanned development board connection PC.By command boxe, the order of user's input can be obtained, send to development board by USB interface, and the command execution results of acquisition is shown.
This step realizes the connection of display development board automatically, realizes many development boards and connects simultaneously.The command forms adjustment method irrelevant with concrete chip model is provided, provides the graphical interface of burning program to SDRAM, SRAM directly.
Two, development board Back ground Information configuration step:
As one of common steps of the present invention, it is the basis of following linux system burning step, autonomous system burning step and debugging step.When these three steps perform above, capital first obtains the specifying information comprising the development board such as CPU model, EMI, USB PKG Size, SPI FLASH that in development board Back ground Information configuration step, user inserts, then using these information as basis for estimation, import different orders by USB interface into development board and operate.
This step provides infrastructure service for whole flow process, comprises the confirmation of the development board specifying information such as CPU model, EMI, USB PKG, SPIFLASH.
Three, linux system burning step:
By built-in hboot.bin fileinfo, automatically judge to write the address becoming development board and specify according to configuration information before this linux system of burning, read Sys Loader, U-boot, OS Kernel, Bootup Logo and Root FS file path information that user inserts afterwards successively, read the content of these files, file content is write the assigned address of development board by the host-host protocol of being specified by command mode and development board.This step also supports the some single files of only burning, and its operation is same as described above, only omits the process of burning alternative document.
This step provides burning a whole set of graphical interface needed for linux system, realizes a whole set of linux system of burning to the function of programmable chip, comprises burning sysloader, U-boot, Linux kernel and file system.
Four, autonomous system burning step:
Successively read user insert Sys loader file, application file path, file reading content (can be Nand/SPI/Nor according to the flash type that user selects), and the CPU model that configuration information module user is selected, the host-host protocol that file content is specified by command mode and development board by programming in the address of specifying.This step is supported from Chip Loader frame file reading path thus is obtained file content, and by these contents by command forms write development board SRAM or SDRAM, finally direct from assigned address startup optimization, the file write by which is only performed successively, and after development board power down, file content is not saved.
This step provides burning a whole set of graphical interface needed for non-linux system, realizes the function autonomous system of non-linux system being burnt to programmable chip.
Five, debugging step:
Support following four kinds of operations: (1) sends file to RAM: read the file path content that user specifies, and is write and specifies address ram; This operates by resolution file and sends specified command to development board and completes.(2) file is received: this operation is also analyzed the command execution results received and is stored in user's specified path by sending specified command to development board and completes, and the file content length of acquisition is specified by user.(3) programming file is to Flash: read the file path content that user specifies, and is write and specifies Flash address; This operates by resolution file and sends specified command to development board and completes; Flash can be nand flash, nor flash or spi flash, different Flash, and the address sending order write is different.(4) jump: read by read-write Flash order or write the Flash value of assigned address.
This step provides from assigned address burning, read test program, and the graphical interface of read-write specific address register, realizes various debugging operations.
Above-described is only the preferred embodiment of the present invention, the invention is not restricted to above embodiment.Be appreciated that the oher improvements and changes that those skilled in the art directly derive without departing from the spirit and concept in the present invention or associate, all should think and be included within protection scope of the present invention.
Claims (1)
1. a SOC burning adjustment method, is characterized in that, comprises the following steps:
1) Connection Step: start a timer, the at set intervals USB interface information that is connected with PC of autoscan, confirm and upgrade the connection of development board and PC; Described timer exists all the time, and when having detected that development board connects, the information of display development board; Subsequent step is all only just effectively actual after having scanned development board connection PC; Obtain the order of user's input, send to development board by USB interface, and the command execution results that display obtains;
2) development board Back ground Information configuration step: obtain the specifying information of development board comprising CPU model, EMI, USBPKG Size, SPI FLASH that user inserts, using above-mentioned information as basis for estimation, different orders is imported into development board by USB interface, proceed to following step 3 respectively) or step 4), and step 5) operate;
3) linux system burning step: by built-in hboot.bin fileinfo, automatically judge to write the address becoming development board and specify according to configuration information before burning linux system, read Sys Loader, U-boot, OS Kernel, Bootup Logo and Root FS file path information that user inserts successively, read the content of above-mentioned All Files or single file, file content is write the assigned address of development board by the host-host protocol of being specified by command mode and development board;
4) autonomous system burning step: read Sys loader file, application file routing information that user inserts successively, file reading content, and step 2) in the CPU model selected of user, the host-host protocol that file content is specified by command mode and development board by programming in the address of specifying; When from Chip Loader frame file reading path and when obtaining file content, by foregoing by command forms write development board SRAM or SDRAM, directly from assigned address startup optimization, the file write by which is only performed once, and after development board power down, file content is not saved;
5) debugging step: comprise following four kinds of operations:
Send file to RAM: read the file path content that user specifies, write and specify address ram; This operates by resolution file and sends specified command to development board and completes;
Receive file: this operation is also analyzed the command execution results received and is stored in user's specified path by sending specified command to development board and completes, and the file content length of acquisition is specified by user;
Programming file is to Flash: read the file path content that user specifies, and is write and specifies Flash address; This operates by resolution file and sends specified command to development board and completes; Described Flash is nand flash or nor flash;
Jump: read by read-write Flash order or write the Flash value of assigned address.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310738739.8A CN103699467B (en) | 2013-12-27 | 2013-12-27 | SOC chip burning and debugging method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310738739.8A CN103699467B (en) | 2013-12-27 | 2013-12-27 | SOC chip burning and debugging method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103699467A CN103699467A (en) | 2014-04-02 |
| CN103699467B true CN103699467B (en) | 2015-05-27 |
Family
ID=50361005
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310738739.8A Expired - Fee Related CN103699467B (en) | 2013-12-27 | 2013-12-27 | SOC chip burning and debugging method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103699467B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107291484B (en) * | 2016-04-11 | 2021-05-25 | 龙芯中科技术股份有限公司 | Method and device for programming bare board |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101673237A (en) * | 2009-09-02 | 2010-03-17 | 太仓市同维电子有限公司 | Network type method for debugging starting procedure |
| TW201211761A (en) * | 2010-09-06 | 2012-03-16 | Hon Hai Prec Ind Co Ltd | BIOS debugging device and method |
| CN102999422A (en) * | 2012-11-06 | 2013-03-27 | 太仓市同维电子有限公司 | Efficient embedded system debugging method |
-
2013
- 2013-12-27 CN CN201310738739.8A patent/CN103699467B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101673237A (en) * | 2009-09-02 | 2010-03-17 | 太仓市同维电子有限公司 | Network type method for debugging starting procedure |
| TW201211761A (en) * | 2010-09-06 | 2012-03-16 | Hon Hai Prec Ind Co Ltd | BIOS debugging device and method |
| CN102999422A (en) * | 2012-11-06 | 2013-03-27 | 太仓市同维电子有限公司 | Efficient embedded system debugging method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103699467A (en) | 2014-04-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103777972B (en) | System, configuration method based on field programmable gate array and upgrade method | |
| CN105760191A (en) | Embedded system equipment programming mass production method | |
| CN103914315B (en) | Configuration method of drivers | |
| CN108037938B (en) | Card opening method of eMMC | |
| CN101216773A (en) | Embedded Linux system firmware downloading method and device | |
| CN104077166B (en) | EPCS and EPCQ memory online upgrading methods based on IP kernel in FPGA | |
| US20070168905A1 (en) | Networked linux machine and windows software development system | |
| CN104679559A (en) | Single chip microcomputer on-line programming method | |
| CN101169729A (en) | Embedded type system and method for renewing application program | |
| CN102411363A (en) | On-line monitoring system and monitoring method of running state of mine fan | |
| CN103677915A (en) | Automatic burning method of flash mirror image based on TF starting card | |
| CN105653330A (en) | SD card based NorFlash programming system and method | |
| CN101620542A (en) | Compatible updating method of ultrasonic imaging equipment software data | |
| CN105677429A (en) | Program burning method, processor and electronic circuit | |
| CN103699467B (en) | SOC chip burning and debugging method | |
| TW201502991A (en) | A SATA storage device with SPI interface, using this device for boot up and BIOS code update method thereof | |
| CN104572140A (en) | Method, device and system for transplanting operating system | |
| CN103914331A (en) | Emulator supporting multi-chip configuration function | |
| KR20150072963A (en) | Multisystem, and method of booting the same | |
| CN102999422A (en) | Efficient embedded system debugging method | |
| CN102750167B (en) | Application program launching method, device and computer system | |
| CN105045624A (en) | PowerPC mainboard and program writing method | |
| CN108052337A (en) | A kind of firmware upgrade method and device of eMMC production tools | |
| CN113360440B (en) | Processor communication control method and related product | |
| CN105068835A (en) | Mobile terminal and debugging information display method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| ASS | Succession or assignment of patent right |
Owner name: WUXI ALPSCALE INTEGRATED CIRCUITS CO., LTD. Free format text: FORMER OWNER: WUXI ZHIXIN ELECTRONIC TECHNOLOGY CO., LTD. Effective date: 20140305 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20140305 Address after: 2, building 214028, building F, Information Technology Industrial Park, 21 Changjiang Road, Wuxi New District, Jiangsu, China Applicant after: Wuxi Alpscale Integrated Circuits Co., Ltd. Address before: 1104, room 214028, Wuxi national integrated circuit design Park (building source building), 21-1 Changjiang Road, New District, Jiangsu, Wuxi Applicant before: Wuxi Zhixin Technologies Co., Ltd. |
|
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| ASS | Succession or assignment of patent right |
Owner name: GUANGZHOU XINULTRA ELECTRONIC TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: WUXI ALPSCALE INTEGRATED CIRCUITS CO., LTD. Effective date: 20150319 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 214028 WUXI, JIANGSU PROVINCE TO: 213000 CHANGZHOU, JIANGSU PROVINCE |
|
| TA01 | Transfer of patent application right |
Effective date of registration: 20150319 Address after: 213000 building 450-1-1, building No. 588, South Wu Road, Wujin hi tech Industrial Development Zone, Changzhou, Jiangsu, Applicant after: Guangzhou Xinultra Electronic Technology Co., Ltd. Address before: 2, building 214028, building F, Information Technology Industrial Park, 21 Changjiang Road, Wuxi New District, Jiangsu, China Applicant before: Wuxi Alpscale Integrated Circuits Co., Ltd. |
|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150527 Termination date: 20151227 |
|
| EXPY | Termination of patent right or utility model |