CN103699427B - A kind of interruption detection method and system based on JIT emulators - Google Patents
A kind of interruption detection method and system based on JIT emulators Download PDFInfo
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Abstract
The embodiment of the invention discloses a kind of interruption detection method and system based on JIT emulators, for improving the accuracy of interrupt response, so as to improve the accuracy of JIT emulator simulation results.Present invention method includes：Before each instruction of execute instruction block, judge whether current system meets the down trigger condition entrained by the instruction；If system meets the down trigger condition entrained by the instruction, jump out and perform and interrupted corresponding to the down trigger condition.
Description
Technical field
The present invention relates to simulation technical field, and in particular to a kind of interruption detection method and system based on JIT emulators.
Background technology
Immediately (Just In Time, abbreviation JIT) emulator is a kind of high-speed simulation device common in emulation technology, and it is transported
Row is divided into two stages：Translating phase and execution stage, wherein, executable finger of the translating phase by instruction translation into host machines
Order, an instruction block is formed by a plurality of executable instruction；Dispatched by emulation platform in the execution stage and performed by unit of instruction block.
At present, JIT emulators are in interpretive order block, CPU (Central Processing Unit,
CPU interruption) can not have been detected whether, therefore, has been added before interpretive order block and interrupts detection, when detecting that interruption occurs,
The translation for then interrupting present instruction block performs interruption, the finger not being translated before returning to continue translation again after interruption has performed
Make block.
In such scheme, the execution of interruption is carried out between two instruction blocks, and may cause should be in instruction block
Some instruction perform after interruption for terminating just trigger afterwards is delayed to whole instruction block end and go to perform again, cause to interrupt
Inaccurately, so as to influenceing the accuracy of simulation result.
The content of the invention
For drawbacks described above, the embodiments of the invention provide a kind of interruption detection method and system based on JIT emulators,
Interruption can be accurately responded, improves the accuracy of JIT emulator simulation results.
First aspect of the embodiment of the present invention provides a kind of interruption detection method based on JIT emulators, including:
Before each instruction of execute instruction block, judge whether current system meets the down trigger entrained by the instruction
Condition；If system meets the down trigger condition entrained by the instruction, jump out and perform the down trigger condition correspondingly
Interruption.
With reference in a first aspect, in the first possible implementation, when the down trigger condition includes down trigger
Between, so it is described judge whether current system meets the down trigger condition entrained by the instruction, including：Judge current system
Whether the time is identical with the down trigger time in the down trigger condition entrained by the instruction.
With reference in a first aspect, in second of possible implementation, the down trigger condition refers to comprising down trigger
Rule of judgment is made, the down trigger instruction Rule of judgment is specifically used for the N articles instruction in indicator block, and the N is just
Integer, and less than or equal to the total number of instructions mesh of the instruction block；And then described judge whether current system meets the instruction
Entrained down trigger condition, including：Judge whether current system has performed the down trigger condition entrained by the instruction
In down trigger instruction Rule of judgment indicated by the N articles instruction.
With reference in a first aspect, or first aspect the first possible implementation, or second of first aspect may
Implementation, it is described also to include before the instruction of execute instruction block in the third possible implementation：Interpretive order
Instruction in block, wherein, carry the down trigger condition before each instruction after translation.
With reference to the third possible implementation of first aspect, in the 4th kind of possible implementation, turned over described
When translating the instruction in instruction block, the interruption detection method also includes：Registration is interrupted when having detected, is registered from interrupting in queue
Obtain the down trigger condition.
With reference to the 4th kind of possible implementation of first aspect, in the 5th kind of possible implementation, the interruption
Trigger condition also includes interrupt processing function；And then it is described from interrupt register queue in obtain the down trigger condition it
Afterwards, in addition to：By the interrupt processing function translation in the down trigger condition into executable interrupt processing function, and will turn over
Interrupt processing function after translating is stored in buffering area.
With reference to the 5th kind of possible implementation of first aspect, in the 6th kind of possible implementation, the interruption
Trigger condition also includes interrupt processing type；And then it is described jump out and perform to interrupt corresponding to the down trigger condition include：
Interrupt processing type in the down trigger condition reads the interrupt processing function after translation from buffering area, in execution
It is disconnected.
, can at the 7th kind with reference to any one in six kinds of possible implementations of first aspect or above-mentioned first aspect
Can implementation in, it is described jump out and perform corresponding to the down trigger condition interruption after, including：Return to and be interrupted
The instruction block, execute instruction the instruction being interrupted since the instruction block.
The present invention implements second aspect and provides a kind of outage detection system based on JIT emulators, including：
Judging unit is interrupted, for before each instruction of execute instruction block, judging whether current system meets the finger
The entrained down trigger condition of order；
Execution unit is interrupted, if meeting the down trigger condition entrained by the instruction for system, jumps out and performs
Interrupted corresponding to the down trigger condition.
With reference to second aspect, in the first possible implementation, when the down trigger condition includes down trigger
Between；And then the interruption judging unit includes：Break period judging unit, for before each instruction of execute instruction block, sentencing
Whether disconnected present system time is identical with the down trigger time in the down trigger condition entrained by the instruction.
With reference to second aspect, in second of possible implementation, the down trigger condition refers to comprising down trigger
Rule of judgment is made, the down trigger instruction Rule of judgment is specifically used for the N articles instruction in indicator block, and the N is big
In or equal to 0 positive integer, and less than or equal to the instruction block total number of instructions mesh；And then the interruption judging unit bag
Include：Interrupt instruction judging unit, for before each instruction of execute instruction block, it is described to judge whether current system has performed
The N articles instruction indicated by down trigger instruction Rule of judgment in the entrained down trigger condition of instruction.
It is possible with reference to the first possible implementation of second aspect, or second aspect, or second of second aspect
Implementation, in the third possible implementation, the outage detection system also includes：Instruction translation unit, it is used for
Before the instruction of execute instruction block, the instruction in interpretive order block, wherein, carry to interrupt before each instruction after translation and touch
Clockwork spring part.
With reference to the third possible implementation of second aspect, in the 4th kind of possible implementation, the interruption
Trigger condition also includes interrupt processing function；The outage detection system also includes：Condition acquiring unit, in interpretive order
During instruction in block, registration is interrupted when having detected, the down trigger condition is obtained from interrupting to register in queue.
With reference to the 4th kind of possible implementation of second aspect, in the 5th kind of possible implementation, the interruption
Detecting system also includes：Interrupt processing function translation unit, for the interrupt processing function in the down trigger condition to be turned over
Executable interrupt processing function is translated into, and the interrupt processing function after translation is stored in buffering area.
With reference to the 5th kind of possible implementation of second aspect, in the 6th kind of possible implementation, the interruption
Trigger condition also includes interrupt processing type；The interruption execution unit includes：First execution unit, if meeting institute for system
The entrained down trigger condition of instruction is stated, the interrupt processing type in the down trigger condition is read from buffering area to be turned over
Interrupt processing function after translating, performs interruption.
, can at the 7th kind with reference to any one in six kinds of possible implementations of second aspect or above-mentioned second aspect
In the implementation of energy, the outage detection system also includes：Instruction execution unit, for being performed in the interruption execution unit
After being interrupted corresponding to down trigger condition entrained by the instruction of complete instruction block, the instruction block being interrupted is returned to, from described
The instruction being interrupted in instruction block starts execute instruction.
As can be seen from the above technical solutions, the embodiment of the present invention has advantages below：
The interruption detection method and system based on JIT emulators that the embodiment of the present invention is provided, by execute instruction
Before each instruction of block, judge whether current system meets to instruct entrained down trigger condition, meet to instruct in system
During entrained down trigger condition, just jump out and perform and interrupted corresponding to down trigger condition.Compared with prior art, this hair
By all carrying out interruption judgement before each instruction performs in bright, when it is determined that there is interruption to occur, present instruction can be interrupted
The execution instructed in block, then interruption is performed, without judging when whole instruction block has performed to carry out interrupting again in execution
It is disconnected, interrupt response accuracy is effectively increased, ensures the accuracy of JIT emulator simulation results.
Brief description of the drawings
In order to illustrate the technical solution of the embodiments of the present invention more clearly, it will make below to required in the embodiment of the present invention
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for
For those of ordinary skill in the art, on the premise of not paying creative work, other can also be obtained according to these accompanying drawings
Accompanying drawing.
Fig. 1 is the interruption detection method schematic flow sheet based on JIT emulators that one embodiment of the invention provides；
Fig. 2-a are the interruption detection method schematic flow sheet based on JIT emulators that another embodiment of the present invention provides；
Fig. 2-b are the interruption detection method schematic flow sheet based on JIT emulators that another embodiment of the present invention provides；
Fig. 3 is the outage detection system basic structure schematic diagram based on JIT emulators that one embodiment of the invention provides；
Fig. 4-a are the signal of the outage detection system basic structure based on JIT emulators that another embodiment of the present invention provides
Figure；
Fig. 4-b are the signal of the outage detection system basic structure based on JIT emulators that another embodiment of the present invention provides
Figure；
Fig. 5-a are the signal of the outage detection system basic structure based on JIT emulators that another embodiment of the present invention provides
Figure；
Fig. 5-b are the signal of the outage detection system basic structure based on JIT emulators that another embodiment of the present invention provides
Figure；
Fig. 5-c are the signal of the outage detection system basic structure based on JIT emulators that another embodiment of the present invention provides
Figure；
Fig. 6 is the outage detection system basic structure schematic diagram based on JIT emulators that another embodiment of the present invention provides；
Fig. 7 is the outage detection system basic structure schematic diagram based on JIT emulators that another embodiment of the present invention provides；
Fig. 8 is the interruption detection device basic structure schematic diagram based on JIT emulators that one embodiment of the invention provides.
Embodiment
Below in conjunction with the accompanying drawing of the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Ground describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.Based on this
Embodiment in invention, the every other reality that those of ordinary skill in the art are obtained under the premise of creative work is not made
Example is applied, belongs to the scope of protection of the invention.
The embodiments of the invention provide a kind of interruption detection method and system based on JIT emulators, interruption can be improved
Accuracy is responded, and then improves the accuracy of JIT emulator simulation results.
The technical scheme that the embodiment of the present invention is provided is directed to the interrupt processing in JIT emulators, wherein, JIT emulation
The operation of device simulation objectives machine PC systems, it is allowed to which the process of target machine PC CPU constructions performs in the CPU of JIT emulators.
The operation of JIT emulators is divided into translating phase and execution stage, and the translating phase is mainly first by instruction translation into JIT emulator the machine
The intermediate code that host machines can identify, and a plurality of instruction after translation is formed into an instruction block and is stored in memory modules,
Then the instruction block after main program performs translation is started by CPU.If external timer will register interruption, registered by interrupting
Module is registered to CPU interrupts, and is then organized into by CPU and is stored in about the down trigger condition interrupted in interruption registration queue.
As shown in figure 1, a kind of interruption detection method based on JIT emulators includes：
S110, before the instruction of each of execute instruction block, in judging whether current system meets entrained by the instruction
Disconnected trigger condition；
When external timer will register interruption to CPU, registered by Registering modules to CPU, interruption is registered in after registration
Queue is lined up, specific to represent that the interruption of registration is organized into corresponding down trigger condition is stored in interruption registration queue.It is imitative
True device starts main program, is detecting that currently then reading interrupt processing function performs interruption when having interruption to occur, if not provided,
Detection interrupts whether registration queue has new down trigger condition, if so, obtaining down trigger bar in queue from interrupting to register
Part, in the instruction of interpretive order block, down trigger condition in increase in instruction, before causing every instruction after translation
All carry upper down trigger condition.
Alternatively, the down trigger condition can include the down trigger time.
Alternatively, the down trigger condition can also include down trigger instruction Rule of judgment, the down trigger instruction
Rule of judgment is specifically used for the N articles instruction in indicator block, and the N is positive integer, and is less than or equal to the instruction block
Total number of instructions mesh.
Alternatively, the down trigger condition can also include interrupt processing function.
Alternatively, the down trigger condition can also include interrupt processing type.
If S120, system meet the down trigger condition entrained by the instruction, jump out and perform the down trigger
Interrupted corresponding to condition.
In the execution stage of JIT emulators, in the instruction of execute instruction block, by instructing entrained down trigger bar
Part, judge whether current system meets the down trigger condition before instruction performs, if current system meets instruction and taken
The down trigger condition of band, then jump out, then performs and interrupted corresponding to down trigger condition.The embodiment of the present invention can instruct
Judge whether to interrupt during block execute instruction, the execution of interrupt instruction block in the implementation procedure of instruction block, then in triggering
It is disconnected, the accuracy for interrupting detection is improved, so as to effectively improve the accuracy of JIT emulator simulation results.
As an optional embodiment, the down trigger time is included in above-mentioned down trigger condition, as shown in Fig. 2-a,
A kind of interruption detection method based on JIT emulators, it may include：
S2101, before the instruction of each of execute instruction block, judge present system time whether with the instruction entrained by
The down trigger time in down trigger condition is identical；
If S2102, present system time are identical with the down trigger time in the down trigger condition entrained by the instruction,
Then jump out and perform and interrupted corresponding to the down trigger condition.
Down trigger condition specifically includes the down trigger time in the embodiment of the present invention, if in present system time and this
The disconnected triggered time is identical, then can perform interruption.
As an example it is assumed that the down trigger time is 14:05,20 instructions are shared in the instruction block being currently performed,
After translating phase interpretive order, the down trigger condition for including the down trigger time is carried before every instruction.It is if current
System has performed the 8th article of instruction in instruction block, and the then interruption in the entrained down trigger condition of the 9th article of instruction is touched
Send out the time 14:05, if present system time has arrived at 14:05, then will interrupt and perform the 9th article of instruction, then go to perform
Interrupted corresponding to down trigger condition.
Due to after the instruction of interpretive order block, upper down trigger bar is all carried before each instruction in the embodiment of the present invention
Part, and the down trigger condition includes the down trigger time, and then current system can be judged in the instruction of execute instruction block
Whether system is identical with the down trigger time, if identical, it is possible to jumps out present instruction block, performs down trigger condition pair
The interruption answered, interruption can be accurately responded, improve the accuracy of JIT emulator simulation results.
As an optional embodiment, comprising down trigger instruction Rule of judgment in above-mentioned down trigger condition, such as scheme
Shown in 2-b, a kind of interruption detection method based on JIT emulators, it may include：
S2201, before the instruction of each of execute instruction block, judge whether current system has performed the down trigger instruction
The N articles instruction indicated by Rule of judgment, wherein, the down trigger instruction Rule of judgment is specifically used in indicator block
The N articles instruction, the N is positive integer, and less than or equal to the total number of instructions mesh of the instruction block；
If the N articles instruction indicated by S2202, the complete down trigger instruction Rule of judgment of system executed, is jumped out
And perform and interrupted corresponding to the down trigger condition.
Down trigger condition in the embodiment of the present invention specifically includes down trigger instruction Rule of judgment, and the interruption is touched
The Rule of judgment that sends instructions is specifically used for the N articles instruction in indicator block, and the N is positive integer, and less than or equal to described
The total number of instructions mesh of instruction block, therefore, if current system has performed the N articles of the instruction block in down trigger instruction Rule of judgment
After instruction, then stop performing the instruction block, then perform and interrupted corresponding to down trigger condition, accurate response is interrupted, and improves JIT
The accuracy of emulator simulation result.
As an example it is assumed that down trigger instruction Rule of judgment instruction is the J articles instruction in instruction block, if instruction block
In have the instruction of I bars, then explanation performs interruption when the J articles of instruction block instruction has performed.Therefore work as and performed the J articles instruction
When, the down trigger in the entrained down trigger condition of the J+1 articles instruction instructs Rule of judgment, specifically according to interruption
The J articles instruction, judges whether current system has performed the J articles instruction in instruction block indicated by triggering command Rule of judgment, if
It is then to stop performing the J+1 articles instruction, jumps out instruction block, then perform and interrupted corresponding to down trigger condition.Wherein, I is big
In or equal to 1 positive integer；J is the positive integer more than or equal to 0, and less than or equal to I.
Down trigger condition includes down trigger instruction Rule of judgment in the embodiment of the present invention, and down trigger instruction is sentenced
Broken strip part is specifically used for the N articles instruction in indicator block, therefore, in the instruction of execute instruction block, by each in execution
Before bar instruction, judge current system whether the N articles instruction in the complete instruction block of executed, and then the N articles in execute instruction block
During instruction, the execution of instruction block is jumped out, then is interrupted corresponding to down trigger condition, improves and interrupts detection accuracy, so as to have
Effect improves the accuracy of JIT emulator simulation results.
It is understood that in the instruction translation stage, if having detected interruption registration, just register in queue and obtain from interruption
Down trigger condition is taken, and down trigger condition is except including above-mentioned down trigger time or down trigger instruction Rule of judgment
Outside, interrupt processing function, interrupt processing type can also be included.
After above-mentioned interruption detects successfully, returning to main program and detecting will currently interrupt, into interrupt processing function
Perform interruption.It is, of course, also possible to which the interrupt processing function translation in down trigger condition is preserved in the buffer, examined when interrupting
After surveying successfully, the interrupt processing type in down trigger condition extracted into buffering area corresponding to interrupt processing function, enter
And can avoid interrupt detect successfully after return to main program carry out repeatedly detection.
Alternatively, the interrupt processing type included in above-mentioned down trigger condition, can be specifically it is mandatory interruption and
Voluntary is interrupted.Wherein, mandatory interruption can include in I/O interrupt, hardware fault interruption, tick interrupt, console
Disconnected, program interrupt etc..
It is understood that when the above-mentioned interrupt processing function by after translation is saved in buffering area, physics can be passed through
Address represents the save location of each interrupt processing function in buffering area, after interrupt processing function is translated, in buffering area
In for interrupt processing function distribute a physical address, the physical address can be matched with the interrupt processing type of interruption,
Physical address can be searched according to interrupt processing type when obtaining interrupt processing function, so as to get interrupt processing letter
Number.After interrupt processing function translation is preserved in advance, interruption carries out repeating detection after detecting successfully without returning to main program,
Simple flow.
After interruption has performed corresponding to down trigger condition, it will be returned in the instruction block being interrupted, from the last time by
The disconnected instruction being not carried out starts to re-execute instruction.For example, there are A, B, C---H totally 7 instructions in instruction block, performing
After the C articles instruction of the complete instruction block, instruction block is interrupted execution, then performs the D articles entrained down trigger article of instruction
Interrupted corresponding to part, then after interruption has performed corresponding to the down trigger condition, will be returned to the instruction block, refer to from the D articles
Order starts to re-execute.
In practical application scene, it is assumed that exemplified by the alarm clock on by JIT emulator simulated handsets, it is assumed that the alarm clock makes
Realized with timer outside CPU, when setting alarm clock time-out time to be 1 small after, the outer timers of CPU can record this time,
After time reaches, interruption can be issued CPU by timer.Simultaneously in order to accurately receive this interruption, CPU can also record time-out
Time, in translation process, translation adds time judgement before every instruction, and afterwards upon execution, discovery time judges super with this
When time when coincideing, just jump out executions, the CPU interrupt signals sent of timer outside be properly received, so as to trigger alarm clock.
As shown in figure 3, the embodiment of the present invention also provides outage detection system 300, it may include：
Judging unit 310 is interrupted, for before each instruction of execute instruction block, it is described to judge whether current system meets
The entrained down trigger condition of instruction；
Execution unit 320 is interrupted, if meeting the down trigger condition entrained by the instruction for system, jumps out and holds
Interrupted corresponding to the row down trigger condition.
Wherein, judging unit 310 is interrupted before each instruction of execute instruction block, by judging whether current system is full
Down trigger condition entrained by the foot instruction, if satisfied, then being jumped out by interruption execution unit 320 and performing the down trigger
Interrupted corresponding to condition, interruption can be accurately responded, so as to improve the accuracy of simulation result.
Alternatively, the down trigger condition can include the down trigger time.
Alternatively, the down trigger condition can also include down trigger instruction Rule of judgment, the down trigger instruction
Rule of judgment is specifically used for the N articles instruction in indicator block, and the N is positive integer, and is less than or equal to the instruction block
Total number of instructions mesh.
Alternatively, the down trigger condition can also include interrupt processing function.
Alternatively, the down trigger condition can also include interrupt processing type, and specifically, the interrupt processing type can be with
It is that mandatory interruption and voluntary are interrupted.Wherein, mandatory interruption can include I/O interrupt, hardware fault interrupt, when
Clock interruption, console interruption, program interrupt etc..
Further, as depicted in fig. 4-a, when above-mentioned down trigger condition includes the down trigger time, above-mentioned interruption is sentenced
Disconnected unit 310 may include：
Break period judging unit 410, for before each instruction of execute instruction block, whether judging present system time
It is identical with the down trigger time in the down trigger condition entrained by the instruction.
As an example it is assumed that the down trigger time is 14:05,20 instructions are shared in the instruction block being currently performed,
After translating phase interpretive order, the down trigger condition for including the down trigger time is carried before every instruction.It is if current
System has performed the 8th article of instruction in instruction block, and the then interruption in the entrained down trigger condition of the 9th article of instruction is touched
Send out the time 14:05, if present system time has arrived at 14:05, then will interrupt and perform the 9th article of instruction, then go to perform
Interrupted corresponding to down trigger condition.
Further, as shown in Fig. 4-b, when above-mentioned down trigger condition includes down trigger instruction Rule of judgment, on
Stating interruption judging unit 310 may include：
Interrupt instruction judging unit 420, for before each instruction of execute instruction block, judging whether current system is held
The N articles instruction gone indicated by the down trigger instruction Rule of judgment, wherein, the down trigger instruction Rule of judgment tool
The N articles instruction that body is used in indicator block, the N is the positive integer more than or equal to 0, and is less than or equal to the instruction
The total number of instructions mesh of block.
As an example it is assumed that down trigger instruction Rule of judgment instruction is the J articles instruction in instruction block, if instruction block
In have the instruction of I bars, then explanation performs interruption when the J articles of instruction block instruction has performed.Therefore work as and performed the J articles instruction
When, the down trigger in the entrained down trigger condition of the J+1 articles instruction instructs Rule of judgment, specifically according to interruption
The J articles instruction, judges whether current system has performed the J articles instruction in instruction block indicated by triggering command Rule of judgment, if
It is then to stop performing the J+1 articles instruction, jumps out instruction block, then perform and interrupted corresponding to down trigger condition.Wherein, I is big
In or equal to 1 positive integer；J is the positive integer more than or equal to 0, and less than or equal to I.
JIT emulators run CPU main programs, are detected in the translating phase and interrupt whether registration queue has new down trigger bar
Part.When detecting new down trigger condition, down trigger condition is read in queue from interrupting to register, it is then every in translation
During one instruction, while the down trigger conditional translation into the host down trigger conditions that can recognize that and is increased in instruction,
So that each translation after instruction before all carry translation after down trigger condition.
Therefore, as shown in Fig. 5-a, above-mentioned outage detection system 300 can also include：
Instruction translation unit 510, for before the instruction of execute instruction block, the instruction in interpretive order block, wherein, translation
Down trigger condition is carried before each instruction afterwards.
As shown in Fig. 5-b, above-mentioned outage detection system 300 also includes：
Condition acquiring unit 520, during for instruction in interpretive order block, registration is interrupted when having detected, from interruption
The down trigger condition is obtained in registration queue.
As shown in Fig. 5-c, above-mentioned outage detection system 300 also includes：
Interrupt processing function translation unit 530, for by the interrupt processing function translation in the down trigger condition into
Executable interrupt processing function, and the interrupt processing function after translation is stored in buffering area.
It is understood that in the instruction translation stage, if having detected interruption registration, just register in queue and obtain from interruption
Down trigger condition is taken, and down trigger condition is except including above-mentioned down trigger time or down trigger instruction Rule of judgment
Outside, interrupt processing function, interrupt processing type can also be included.
After above-mentioned interruption detects successfully, returning to main program and detecting will currently interrupt, into interrupt processing function
Perform interruption.It is, of course, also possible to which the interrupt processing function translation in down trigger condition is preserved in the buffer, examined when interrupting
After surveying successfully, the interrupt processing type in down trigger condition extracted into buffering area corresponding to interrupt processing function, enter
And can avoid interrupt detect successfully after return to main program carry out repeatedly detection.
As shown in fig. 6, above-mentioned interruption execution unit 320 can specifically include：
First execution unit 610, if meeting the down trigger condition entrained by the instruction for system, in described
Interrupt processing type in disconnected trigger condition reads the interrupt processing function after translation from buffering area, performs interruption.
It is understood that when the above-mentioned interrupt processing function by after translation is saved in buffering area, physics can be passed through
Address represents the save location of each interrupt processing function in buffering area, after interrupt processing function is translated, in buffering area
In for interrupt processing function distribute a physical address, the physical address can be matched with the interrupt processing type of interruption,
Physical address can be searched according to interrupt processing type when obtaining interrupt processing function, so as to get interrupt processing letter
Number.After interrupt processing function translation is preserved in advance, interruption carries out repeating detection after detecting successfully without returning to main program,
Simple flow.
As shown in fig. 7, above-mentioned outage detection system 300 can also include：
Instruction execution unit 700, for having performed the interruption entrained by the instruction of instruction block in the interruption execution unit
After being interrupted corresponding to trigger condition, the instruction block being interrupted is returned to, is held the instruction being interrupted since the instruction block
Row instruction.
After the above-mentioned execution unit 610 of interruption execution unit 320 or first has performed interruption corresponding to down trigger condition,
Instruction execution unit 700 will be returned in the instruction block being interrupted, and be held again since the instruction being not carried out that the last time is interrupted
Row instruction.For example, there are A, B, C---H totally 7 instructions in instruction block, after the C articles instruction of the instruction block has been performed, refer to
Make block be interrupted execution, then perform and interrupted corresponding to the D articles entrained down trigger condition of instruction, then touched in the interruption
Interrupted corresponding to clockwork spring part after having performed, will be returned to the instruction block, re-executed since instructing the D articles.
The embodiment of the present invention also provides a kind of interruption detection device based on JIT emulators, as shown in Figure 8, it may include：Deposit
Reservoir 810 and at least one processor 820 (in Fig. 8 by taking a processor as an example).In some embodiments of the embodiment of the present invention,
Memory 810 and processor 820 can be connected by bus or other means, wherein, Fig. 8 by bus exemplified by being connected.
Wherein, processor 820 can perform following steps：Before each instruction of execute instruction block, current system is judged
Whether the down trigger condition instruction entrained by is met；If system meets the down trigger condition entrained by the instruction,
Then jump out and perform and interrupted corresponding to the down trigger condition.
In some embodiments of the invention, the down trigger condition includes the down trigger time, and processor 820 may be used also
To perform following steps：Judge present system time whether with the down trigger in the down trigger condition entrained by the instruction
Time is identical.
In some embodiments of the invention, the down trigger condition includes down trigger instruction Rule of judgment, described
Down trigger instruction Rule of judgment is specifically used for the N articles instruction in indicator block, and the N is positive integer, and is less than or waits
In the total number of instructions mesh of the instruction block；Processor 820 can also carry out following steps：Judge whether current system has performed institute
State the N articles instruction indicated by down trigger instruction Rule of judgment.
In some embodiments of the invention, processor 820 can also carry out following steps：Finger in interpretive order block
Order, wherein, carry the down trigger condition before each instruction after translation.
In some embodiments of the invention, processor 820 can also carry out following steps：Note is interrupted when having detected
Volume, the down trigger condition is obtained from interrupting to register in queue.
In some embodiments of the invention, processor 820 can also carry out following steps：By the down trigger condition
In interrupt processing function translation be stored in buffering into executable interrupt processing function, and by the interrupt processing function after translation
Area.
In some embodiments of the invention, processor 820 can also carry out following steps：According to the down trigger bar
Interrupt processing type in part reads the interrupt processing function after translation from buffering area, performs interruption.
In some embodiments of the invention, processor 820 can also carry out following steps：Return to the finger being interrupted
Block is made, execute instruction the instruction being interrupted since the instruction block.
In some embodiments of the invention, memory 810 can be used for preserving down trigger condition, the down trigger bar
Part can include interrupt processing function, interrupt processing type, down trigger time or down trigger instruction Rule of judgment；
In some embodiments of the invention, memory 810 can be also used for preserving the instruction block after translation.
In some embodiments of the invention, memory 810 can be also used for preserve translation after interrupt processing function, in
Disconnected trigger condition.
The interrupt processing apparatus that the embodiment of the present invention is provided can be JIT emulators, can also be other and be applicable this hair
The emulator of bright technical scheme.
Can be with one of ordinary skill in the art will appreciate that realizing that all or part of step in above-described embodiment method is
The hardware of correlation is instructed to complete by program, described program can be stored in a kind of computer-readable recording medium, on
It can be read-only storage to state the storage medium mentioned, disk or CD etc..
Detailed Jie has been carried out to a kind of interruption detection method and system based on JIT emulators provided by the present invention above
Continue, for those of ordinary skill in the art, according to the thought of the embodiment of the present invention, in specific embodiments and applications
There will be changes, in summary, this specification content should not be construed as limiting the invention.
Claims (16)
- A kind of 1. interruption detection method based on JIT emulators, it is characterised in that including：Before each instruction of execute instruction block, judge whether current system meets the down trigger bar entrained by the instruction Part, wherein, all carry down trigger condition before every instruction；If system meets the down trigger condition entrained by the instruction, jump out and perform corresponding to the down trigger condition Interrupt.
- 2. interruption detection method according to claim 1, it is characterised in that the down trigger condition includes down trigger Time, so it is described judge whether current system meets the down trigger condition entrained by the instruction, including：Judge whether present system time is identical with the down trigger time in the down trigger condition entrained by the instruction.
- 3. interruption detection method according to claim 1, it is characterised in that the down trigger condition includes down trigger Rule of judgment is instructed, the down trigger instruction Rule of judgment is specifically used for the N articles instruction in indicator block, and the N is Positive integer, and less than or equal to the total number of instructions mesh of the instruction block；And then it is described judge whether current system meets the down trigger condition entrained by the instruction, including：Judge whether current system has performed the N articles instruction indicated by the down trigger instruction Rule of judgment.
- 4. the interruption detection method according to any one of claims 1 to 3, it is characterised in that in the instruction of execute instruction block Also include before：Instruction in interpretive order block, wherein, carry the down trigger condition before each instruction after translation.
- 5. interruption detection method according to claim 4, it is characterised in that during instruction in the interpretive order block, The interruption detection method also includes：Registration is interrupted when having detected, the down trigger condition is obtained from interrupting to register in queue.
- 6. interruption detection method according to claim 5, it is characterised in that the down trigger condition is also comprising at interruption Manage function；And then it is described from interrupt register queue in obtain the down trigger condition after, in addition to：By the interrupt processing function translation in the down trigger condition into executable interrupt processing function, and by after translation Interrupt processing function is stored in buffering area.
- 7. interruption detection method according to claim 6, it is characterised in that the down trigger condition is also comprising at interruption Manage type；And then it is described jump out and perform to interrupt corresponding to the down trigger condition include：Interrupt processing type in the down trigger condition reads the interrupt processing function after translation from buffering area, performs Interrupt.
- 8. according to the interruption detection method described in claims 1 to 3 or 5~7 any one, it is characterised in that jumped out simultaneously described Perform after being interrupted corresponding to the down trigger condition, in addition to：Return to the instruction block being interrupted, execute instruction the instruction being interrupted since the instruction block.
- A kind of 9. outage detection system based on JIT emulators, it is characterised in that including：Judging unit is interrupted, for before each instruction of execute instruction block, judging whether current system meets the instruction institute The down trigger condition of carrying, wherein, all carry down trigger condition before every instruction；Execution unit is interrupted, if meeting the down trigger condition entrained by the instruction for system, jumps out and performs described Interrupted corresponding to down trigger condition.
- 10. outage detection system according to claim 9, it is characterised in that the down trigger condition is included to interrupt and touched Send out the time；And then the interruption judging unit includes：Break period judging unit, for before the instruction of each of execute instruction block, judge present system time whether with it is described The down trigger time in the entrained down trigger condition of instruction is identical.
- 11. outage detection system according to claim 9, it is characterised in that the down trigger condition is included to interrupt and touched Send instructions Rule of judgment, and the down trigger instruction Rule of judgment is specifically used for the N articles instruction in indicator block, the N For the positive integer more than or equal to 0, and less than or equal to the total number of instructions mesh of the instruction block；And then the interruption judging unit Including：Interrupt instruction judging unit, for before each instruction of execute instruction block, judging whether current system has performed institute State the N articles instruction indicated by down trigger instruction Rule of judgment.
- 12. according to the outage detection system described in any one of claim 9~11, it is characterised in that the outage detection system Also include：Instruction translation unit, for before the instruction of execute instruction block, the instruction in interpretive order block, wherein, it is every after translation Down trigger condition is carried before one instruction.
- 13. outage detection system according to claim 12, it is characterised in that the down trigger condition is also comprising interruption Handle function；The outage detection system also includes：Condition acquiring unit, during for instruction in interpretive order block, registration is interrupted when having detected, queue is registered from interrupting It is middle to obtain the down trigger condition.
- 14. outage detection system according to claim 13, it is characterised in that the outage detection system also includes：Interrupt processing function translation unit, for by the interrupt processing function translation in the down trigger condition into executable Interrupt processing function, and the interrupt processing function after translation is stored in buffering area.
- 15. outage detection system according to claim 14, it is characterised in that the down trigger condition also includes interrupting Handle type；The interruption execution unit includes：First execution unit, if meeting the down trigger condition entrained by the instruction for system, according to the down trigger Interrupt processing type in condition reads the interrupt processing function after translation from buffering area, performs interruption.
- 16. according to the outage detection system described in claim 9~11 or 13~15 any one, it is characterised in that the interruption Detecting system also includes：Instruction execution unit, for having performed the down trigger condition entrained by the instruction of instruction block in the interruption execution unit After corresponding interruption, the instruction block being interrupted, execute instruction the instruction being interrupted since the instruction block are returned to.
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| CN103077073A (en) * | 2013-01-15 | 2013-05-01 | 华为技术有限公司 | Method and device for realizing instant functional level simulator and simulation processor |
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| CN101164041A (en) * | 2005-04-20 | 2008-04-16 | 可递有限公司 | Precise handling of exceptions during program code conversion |
| CN103077073A (en) * | 2013-01-15 | 2013-05-01 | 华为技术有限公司 | Method and device for realizing instant functional level simulator and simulation processor |
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