CN103679079B - Active label data receiver method and device - Google Patents
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Abstract
The present invention relates to a kind of active label data receiver method and device, its method includes：Receive the data-signal outside active label；Low and high level sampling is carried out to each data bit of data-signal；For the level width of each data bit after sampling, calculating decoding is carried out according to predetermined coding rule.The present invention carries out low and high level sampling by each data bit in the data-signal that is received to active label, and for the level width of each data bit after sampling, calculating decoding is carried out according to predetermined coding rule, solves the problems such as uniformity, reliability of label, reduce product development difficulty, shorten the research and development of products cycle, product design costses are reduced simultaneously, label is applicable plurality of application scenes.
Description
Technical field
The present invention relates to technical field of RFID, more particularly to a kind of active label data receiver method and device.
Background technology
Radio frequency identification（RFID, Radio Frequency Identify）System includes label and read write line, is a kind of non-
The automatic identification technology of contact, it is by radiofrequency signal automatic identification destination object and obtains related data, identification work without
Palpus manual intervention, is operable with various adverse circumstances.RFID technique can recognize that high-speed moving object and can identify multiple marks simultaneously
Label, it is swift and convenient to operate.
Usual radio frequency identification includes passive radio frequency identification and active radio frequency identifies that both essential distinctions are in tab end.Mark
Label are specifically divided into active electronic label and passive electronic label.
Active electronic label is also known as active tag, the working power of active electronic label completely by internal battery powers,
The energy supply of tag battery is also partly converted into RF energy of the electronic tag needed for read write line communication simultaneously.
Passive electronic label is also known as passive label, without internal battery, when outside the read range of read write line, electronics
Label is in passive states, when within the read range of read write line, is carried in the RF energy that electronic tag is sent from reader
Take the power supply needed for its work.Passive electronic label generally completes electronic labeling information to read write line using reflection modulation mode
Transmission.
Data receiver is carried out when active electronic label communicates with read write line, data receiver scheme mainly there are two kinds at present：One
Kind is to carry out sampling decoding to signal by pure software；Another kind is to use special decoding chip.
The first above-mentioned scheme realizes that difficulty is larger, it is necessary to signal Analysis bit rate, software sampling point, instruction cycle
Deng so that there is very big bottleneck in the MCU dominant frequency of label, while the fault-tolerant ability of algorithm is also a very test.
Above-mentioned second scheme needs to use chip to realize, thereby increases the cost and power consumption of label.
The content of the invention
It is a primary object of the present invention to provide a kind of active label data receiver method and device, it is intended to improve active electrical
The uniformity and reliability of subtab, reduce cost and development difficulty.
In order to achieve the above object, the present invention proposes a kind of active label data receiver method, including：
Receive the data-signal outside active label；
Low and high level sampling is carried out to each data bit of the data-signal；
For the level width of each data bit after sampling, calculating decoding is carried out according to predetermined coding rule.
Preferably, each data bit to data-signal, which carries out the step of low and high level sampling, includes：
Whether the input and output I/O port bound by timer detection with the timer has level saltus step, each saltus step level
A corresponding data bit；If there is level saltus step,
Timer preserves the time counter value for recording current transition level width into the capture register of the timer；
Timers trigger dma module automatically specifies data-moving to the memory in the capture register in array.
Preferably, each data bit to data-signal carries out the step of low and high level sampling and further comprised：
The register of dma module described in regular check whether moving data；
If the register of the dma module does not have moving data in the given time, judge that data frame sampling terminates.
Preferably, the timers trigger dma module is automatically by the data-moving in the capture register to memory
The step in array is specified also to include afterwards：
The timer is initialized to set.
Preferably, also include before the step of data-signal of the reception outside active label：
After the active label is waken up signal wake-up,
It is acquisition mode to configure the timer, and the active label is placed in etc. to the resting state of data to be received.
The present invention also proposes a kind of active label data sink, including：
Receiving module, for receiving the data-signal outside active label；
Sampling module, for carrying out low and high level sampling to each data bit of the data-signal；
MCU module, for the level width for each data bit after sampling, counted according to predetermined coding rule
Calculate decoding.
Preferably, the sampling module includes：
Whether the first time block, the I/O port for being bound by timer detection with the timer have level saltus step, often
The corresponding data bit of one saltus step level；If there is level saltus step, the time counter value for recording current transition level width is preserved
Into the capture register of the timer；
First dma module, for by the timers trigger automatically by the data-moving in the capture register to depositing
Reservoir is specified in array.
Preferably, the sampling module also includes：
Second time block, for dma module described in regular check register whether moving data；If in the scheduled time
The register of the interior dma module does not shift data, then judges that data frame sampling terminates.
Preferably, the sampling module also includes：
Second dma module, in first dma module by the data-moving in the capture register to memory
After specifying in array, initialize the timer and set.
Preferably, the device also includes：
Setup module, for the active label be waken up signal wake up after, it is acquisition mode to configure the timer,
And the active label is placed in etc. to the resting state of data to be received.
A kind of active label data receiver method proposed by the present invention and device, believed by the data received to active label
Each data bit in number carries out low and high level sampling, and for the level width of each data bit after sampling, according to predetermined
Coding rule carry out calculating decoding, solve the problems such as uniformity, reliability of label, reduce product development difficulty, contracting
The short research and development of products cycle, while product design costses are reduced, label is applicable plurality of application scenes.
Brief description of the drawings
Fig. 1 is the schematic flow sheet of the embodiment of active label data receiver method one of the present invention；
Fig. 2 is to carry out height to each data bit of data-signal in the embodiment of active label data receiver method one of the present invention
The schematic flow sheet of low level sampling；
Fig. 3 a are the schematic flow sheets of another embodiment of active label data receiver method of the present invention；
Fig. 3 b are a kind of FM0 decoding datas signals of example in another embodiment of active label data receiver method of the present invention
Figure；
Fig. 4 is the structural representation of the embodiment of source label data reception device one of the present invention；
Fig. 5 is the structural representation of sampling module in the embodiment of source label data reception device one of the present invention；
Fig. 6 is the structural representation of another embodiment of source label data reception device of the present invention.
In order that the technical scheme of invention is clearer, clear, it is described in further detail below in conjunction with accompanying drawing.
Embodiment
The solution of the embodiment of the present invention is mainly：Each data bit in the data-signal received to active label is entered
Row low and high level samples, and for the level width of each data bit after sampling, is calculated according to predetermined coding rule
Decoding, to solve the problems such as uniformity of label, reliability, reduce product development difficulty and product design costses.
As shown in figure 1, one embodiment of the invention proposes a kind of active label data receiver method, including：
Step S101, receive the data-signal outside active label；
The present embodiment method is related to the active electronic label in radio-frequency recognition system（Hereinafter referred to as active label）And read-write
Device, active label carry out data receiver when being communicated with read write line, i.e., active label, which receives, comes from read write line in radio-frequency recognition system
Data-signal.
Step S102, low and high level sampling is carried out to each data bit of the data-signal；
After active label receives the data-signal from read write line, electricity is carried out to each data bit in data-signal
Flat sampling.
For level sampling process, the present embodiment uses DMA（Direct Memory Access, direct memory access）
Module and Timer（Timer）Linked manner, realize the automatic CPU moved without interfering with label of data, greatly increase
Label MCU data throughput capabilities, make MCU dominant frequency no longer turn into bottleneck, complete almost to connect specific coding mode in real time
Receive.
Timer has the level saltus step capturing function of multiple passages, as the IO of timer binding（Input/Output, it is defeated
Enter/export）When mouth has level saltus step, timer can be saved in current time counter value in capture register.
In DRP data reception process, timer captures a low and high level data edge per certain time, at this moment can be automatic
Dma module is triggered, dma module is automatically by among the data-moving in the capture register of timer to the specified array in RAM areas.
Whole DRP data reception process does not need CPU participation.Because there is the presence of dma module, CPU is avoided the need for frequently
Disengaging interrupt and go evidence of fetching, without the loss for worrying timer capture register data, MCU only needs to be absorbed in decode
Journey.
Because the data bit in the data-signal of reception is not isometric, program needs to do the judgement of data frame end, can adopt
With another timer regular check data along capture situation, if the register of dma module does not shift in a period of time
Data, then judge that data frame sampling terminates.In actual applications, label C PU decodes to obtain data frame end mark by MCU
Afterwards, then follow-up invalid data can be abandoned.
In addition, the capture register in timer captures data after every time, can be by another dma module to timing
Device is reset, and ensures the time counter value in capture register always since 0 ing, beneficial to the subsequent decoding stage to capturing
Data pulse widths analyzed.
Step S103, for the level width of each data bit after sampling, calculated according to predetermined coding rule
Decoding.
After sampled data is obtained, decoding operate is carried out to sampled data by label MCU., can basis in decoding
Existing specific coding rule, analyzes the pulsewidth that the RAM areas specify the data in array one by one, searches the frame head of the data
And postamble.
Wherein, existing specific coding rule can such as use FM0 coding rules, Miller code rule and Man Chesi
Special coding rule etc., above-mentioned coding rule have ripe scheme, will not be repeated here in the prior art.
It is parallel because MCU decodings and dma module receive, therefore, needs first to allow dma module to receive beginning one in theory
Decoding operate is carried out again after the section time, otherwise can directly decode failure.In practical operation, by setting predetermined prolong on software
When come the synchronization of realizing decoding and dma module receives, such as delay time could be arranged to 225 clocks, i.e. about 6 bit's
Width.
After decoding terminates, MCU can carry out follow-up data processing, including verification to data etc., and send and ring
Operation should be waited.
Specifically, as shown in Fig. 2 above-mentioned steps S102, low and high level sampling is carried out to each data bit of data-signal
The step of include：
Whether step S1021, the I/O port bound by timer detection with the timer have level saltus step, each saltus step electricity
A flat corresponding data bit；If there is level saltus step, into step S1022；
The time counter value for recording current transition level width is preserved catching to the timer by step S1022, timer
Obtain in register；
Step S1023, timers trigger dma module automatically refer to data-moving to the memory in the capture register
In fixed number group.
The present embodiment solves the problems such as uniformity of active label, reliability by such scheme, reduces product and opens
Degree of raising difficult questions, the research and development of products cycle is shortened, while reduce product design costses, label is applicable plurality of application scenes.
As shown in Figure 3 a, another embodiment of the present invention proposes a kind of active label data receiver method, in above-described embodiment
On the basis of, also include before above-mentioned steps S101：
Step S100, after the active label is waken up signal wake-up, it is acquisition mode to configure the timer, and will
The active label such as is placed at the resting state of data to be received.
The difference of the present embodiment and above-described embodiment is, before the present embodiment also includes active label reception data-signal
Configuration operation, corresponding preparation is carried out to receive data.
Specifically, active label be waken up signal wake up after, it is necessary to which it is acquisition mode to configure first timer, then
Active label enters resting state, waits pending data to arrive.The dormancy grade could be arranged to LPM0.The present embodiment is taken by dormancy
Whether there is data arrival for program endless loop inquiry, the effect of efficient electricity-saving can be reached.
The present embodiment realizes the corresponding configuration before data-signal is received to active label by such scheme, and by stopping
Whether the substitution program endless loop inquiry of dormancy technology has data arrival, to reach the effect of efficient electricity-saving.
This embodiment scheme is described in detail with instantiation below：
Setting completes whole sample decoding process using tetra- hardware modules of TimerA, TimerB, DMA1, DMA2, specifically
For：
In holding state, active label is after being waken up signal and waking up, and configuration TimerA is into acquisition mode, subsequently into not
The pending datas such as dormancy arrive.Dormancy grade is LPM0, substitutes whether program endless loop inquiry has data arrival by dormancy, reaches high
Effect economize on electricity；
Afterwards, first data edge is captured, TimerA is closed and interrupts, DMA1, DMA2, TimerB is opened and interrupts；
Then carry out data receiver, DMA 1 automatically by subsequent captured to data along moving in memory ram array, together
When MCU decoded；
At the end of data receiver, TimerB timings judge whether data receiver terminates into interruption；Data are carried out afterwards
Decoding is until decoding terminates.
In said process, for TimerA interrupt processings, TimerA interruptions are first shut off, otherwise can frequently enter interruption,
Influence the follow-up decoding process of MCU.
DMA1 completes transfer of the value in capture register to reception buf, and source address is TA1CCR0, and destination address is to connect
Receive buf.Source address is constant after transfer every time, and destination address is incremental.Receive the bit width that buf storages receive data bit.
DMA2 is mainly reset to TimerA, and capture every time is all reset after occurring, and ensures to count
Value since 0, is analyzed the data pulse widths of capture beneficial to decoding stage always.Source address and destination address after capture all
Do not change.
, it is necessary to exit LMP0 dormancy before interrupt handling routine is exited, MCU is waken up, starts TimerB, carries out data decoding
Processing and reception time-out judge.
When the count value in DMA1 does not change, representing not capture data in a period of time, it is believed that reception terminates,
Corresponding hardware module is then closed to exit.It is relevant with timer clock and the bit width for receiving data on TimerB interrupt intervals,
It is traditionally arranged to be 2 times of most wide bit wide.
The present embodiment goes for different application scenarios, is introduced below by taking the application of national standard electric non-stop toll as an example
Application of the present embodiment in these scenes.
Major parameter is as follows in national standard ETC：
Working frequency range：5.7GHz~5.85GHz；ASK modulation mode：FM0 encoding and decoding；Data rate：Up 512kbps, under
Row 256kbps.
Provided according to agreement, each data frame is with 01111110（0x7E）Indicate beginning and end.Recipient detects
0x7E finds out the beginning and end of data frame.The message length of frame is variable, in order to ensure the uniqueness of banner word, sends data
Shi Caiyong " 0 " bit inserts technology, and sender is when sending all information in addition to tab character（Including check bit）, run into company
5 continuous " 1 " are just automatically inserted into one " 0 "；Recipient runs into continuous 5 " 1 " just automatically by thereafter when receiving data
" 0 " deletes.
It refer to shown in Fig. 3 b, FM0 codings follow following three rules：
1st, level saltus step represents " 0 " in a cycle；
2nd, level saltus step is not had to represent " 1 " in a cycle；
3rd, two neighboring cycle level is opposite.
FM0 decoding process is as follows：
First, byte-by-byte analysis receives buf, searches frame head 0x7E, continuous 6 " 1 "+1 " 0 " is thought to have found frame
Head, state is set to PreCode states." 0 " have found first half code and be thought to have found " 0 " by two and half representations, later half code
Need to skip, otherwise influence subsequent data reception combination；
Then, analyzed pulse width, judge to receive is 1 or 0, needs processing of zero-suppressing for 0 behind continuous 51.
Every 81 bytes are preserved.Think that decoding terminates when finding postamble 0x7E and occurring continuous 61.
Wherein, determined on peak pulse duration compared with threshold value.It is 256kbps to set downstream data rate, and the most long bit wide of reception is
3.90us, timer count clock are 20.48MHz, are at most counted as 80, i.e., " 1 " needs 80 clocks, half yard of needs of " 0 "
40 clocks, threshold value are arranged to median, and 60 clocks of value, i.e., think to receive more than 60 is " 1 ", otherwise it is assumed that connecing
What is received is " 0 ".
On time-out time, 150 count values are can be set as, most long interrupt interval is 80 countings in receive process
Value, if reaching 150 count values also without interrupting, i.e., without capturing, then it is assumed that receive time-out.
As previously described, because decoding and dma module receive parallel, so needing first to allow dma module reception to start in theory
Decoding operate is being carried out after a period of time, otherwise can directly decode failure.On software decoding and dma module are realized by being delayed
Synchronous, delay time is arranged to 225 clocks, i.e., about 6 bit width.
Above-mentioned application example is tested by stability of merchandising, high/low temperature, actual sport car, and transaction success rate reaches 100%, number
According to transmitting-receiving without frame losing, wrong frame phenomenon, application request is fully met well.
As shown in figure 4, one embodiment of the invention proposes a kind of active label data sink, including：Receiving module
401st, sampling module 402 and MCU module 403, wherein：
Receiving module 401, for receiving the data-signal outside active label；
Sampling module 402, for carrying out low and high level sampling to each data bit of the data-signal；
MCU module 403, for the level width for each data bit after sampling, entered according to predetermined coding rule
Row calculates decoding.The MCU module 403 can specifically use the MCU of active label.
The present embodiment is related to the active electronic label in radio-frequency recognition system（Hereinafter referred to as active label）And read write line, have
Source label carries out data receiver when being communicated with read write line, active label is received by receiving module 401 and comes from radio-frequency recognition system
The data-signal of middle read write line.
After active label receives the data-signal from read write line, sampling module 402 is to each in data-signal
Data bit carries out level sampling.
For level sampling process, the present embodiment uses DMA（Direct memory access）Module and Timer（Timer）Connection
Flowing mode, the automatic CPU moved without interfering with label of data is realized, significantly increase label MCU data throughput energy
Power, MCU dominant frequency is no longer turned into bottleneck, complete almost to receive specific coding mode in real time.
Timer has the level saltus step capturing function of multiple passages, fixed when the I/O port of timer binding has level saltus step
When device current time counter value can be saved in capture register in.
In DRP data reception process, timer captures a low and high level data edge per certain time, at this moment can be automatic
Dma module is triggered, dma module is automatically by among the data-moving in the capture register of timer to the specified array in RAM areas.
Whole DRP data reception process does not need CPU participation.Because there is the presence of dma module, CPU is avoided the need for frequently
Disengaging interrupt and go evidence of fetching, without the loss for worrying timer capture register data, MCU only needs to be absorbed in decode
Journey.
Because the data bit in the data-signal of reception is not isometric, program needs to do the judgement of data frame end, can adopt
With another timer regular check data along capture situation, if the register of dma module does not shift in a period of time
Data, then judge that data frame sampling terminates.In actual applications, label C PU decodes to obtain data frame end mark by MCU
Afterwards, then follow-up invalid data can be abandoned.
In addition, the capture register in timer captures data after every time, can be by another dma module to timing
Device is reset, and ensures the time counter value in capture register always since 0 ing, beneficial to the subsequent decoding stage to capturing
Data pulse widths analyzed.
After sampled data is obtained, decoding operate is carried out to sampled data by the MCU module 403 of label.In decoding,
It can analyze the pulsewidth that the RAM areas specify the data in array one by one according to existing specific coding rule, search the number
According to frame head and postamble.
Wherein, existing specific coding rule can such as use FM0 coding rules, Miller code rule and Man Chesi
Special coding rule etc., above-mentioned coding rule have ripe scheme, will not be repeated here in the prior art.
It is parallel because MCU decodings and dma module receive, therefore, needs first to allow dma module to receive beginning one in theory
Decoding operate is carried out again after the section time, otherwise can directly decode failure.In practical operation, by setting predetermined prolong on software
When come the synchronization of realizing decoding and dma module receives, such as delay time could be arranged to 225 clocks, i.e. about 6 bit's
Width.
After decoding terminates, MCU can carry out follow-up data processing, including verification to data etc., and send and ring
Operation should be waited.
Specifically, as shown in figure 5, the sampling module 402 includes：First time block 4021, the first dma module
4022nd, the second dma module 4023 and the second time block 4024, wherein：
Whether the first time block 4021, the I/O port for being bound by timer detection with the timer have level jump
Become, the corresponding data bit of each saltus step level；If there is level saltus step, the time counter value of current transition level width will be recorded
Preserve into the capture register of the timer；
First dma module 4022, for by the timers trigger automatically by it is described capture register in data-moving
Specified to memory in array.
Second dma module 4023, in first dma module by the data-moving in the capture register to depositing
After reservoir is specified in array, initialize the timer and set.
Whether the second time block 4024, the register for dma module described in regular check shift data；If predetermined
The register of the dma module does not shift data in time, then judges that data frame sampling terminates.
The present embodiment solves the problems such as uniformity of active label, reliability by such scheme, reduces product and opens
Degree of raising difficult questions, the research and development of products cycle is shortened, while reduce product design costses, label is applicable plurality of application scenes.
As shown in fig. 6, another embodiment of the present invention proposes a kind of active label data sink, in above-described embodiment
On the basis of, in addition to：
Setup module 400, for after the active label is waken up signal wake-up, configuring the timer as capture mould
Formula, and the active label is placed in etc. to the resting state of data to be received.
The difference of the present embodiment and above-described embodiment is, before the present embodiment also includes active label reception data-signal
Configuration operation, corresponding preparation is carried out to receive data.
Specifically, active label configures first timer to catch after being waken up signal and waking up by setup module 400
Pattern is obtained, subsequently into resting state, waits pending data to arrive.The dormancy grade could be arranged to LPM0.The present embodiment is by stopping
Whether substitution program of sleeping endless loop inquiry has data arrival, can reach the effect of efficient electricity-saving.
The present embodiment realizes the corresponding configuration before data-signal is received to active label by such scheme, and by stopping
Whether the substitution program endless loop inquiry of dormancy technology has data arrival, to reach the effect of efficient electricity-saving.
A kind of active label data receiver method and device that the embodiment of the present invention proposes, pass through what active label was received
Each data bit in data-signal carries out low and high level sampling, and for the level width of each data bit after sampling, root
Calculating decoding is carried out according to predetermined coding rule, solves the problems such as uniformity, reliability of label, reduces product development hardly possible
Spend, shorten the research and development of products cycle, while reduce product design costses, label is applicable plurality of application scenes.
The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the scope of the invention, every utilization
Equivalent structure or the flow conversion that description of the invention and accompanying drawing content are made, or directly or indirectly it is used in other related skills
Art field, is included within the scope of the present invention.
Claims (6)
- A kind of 1. active label data receiver method, it is characterised in that including：Receive the data-signal outside active label；Low and high level sampling is carried out to each data bit of the data-signal；For the level width of each data bit after sampling, calculating decoding is carried out according to predetermined coding rule；Each data bit to data-signal, which carries out the step of low and high level sampling, to be included：Whether the input and output I/O port bound by timer detection with the timer has level saltus step, and each saltus step level corresponds to One data bit；If there is level saltus step,Timer preserves the time counter value for recording current transition level width into the capture register of the timer；Timers trigger direct memory access dma module automatically refers to data-moving to the memory in the capture register In fixed number group；Also include before the step of data-signal of the reception outside active label：After the active label is waken up signal wake-up,It is acquisition mode to configure the timer, and the active label is placed in etc. to the resting state of data to be received；Whole DRP data reception process does not need CPU participation.
- 2. according to the method for claim 1, it is characterised in that each data bit to data-signal carries out height electricity The step of flat sampling, further comprises：The register of direct memory access dma module described in regular check whether moving data；If the register of the direct memory access dma module does not have moving data in the given time, data frame is judged Sampling terminates.
- 3. according to the method for claim 1, it is characterised in that the timers trigger direct memory access dma module Automatically also include after data-moving to the memory in the capture register being specified into the step in array：The timer is initialized to set.
- A kind of 4. active label data sink, it is characterised in that including：Receiving module, for receiving the data-signal outside active label；Sampling module, for carrying out low and high level sampling to each data bit of the data-signal；MCU module, for the level width for each data bit after sampling, calculating solution is carried out according to predetermined coding rule Code；Whole DRP data reception process does not need CPU participation；The sampling module includes：Whether the first time block, the I/O port for being bound by timer detection with the timer have level saltus step, each jump Become the corresponding data bit of level；If there is level saltus step, the time counter value for recording current transition level width is preserved to this In the capture register of timer；First direct memory access dma module, for by the timers trigger automatically by it is described capture register in number Specified according to moving to memory in array；The active label data sink also includes setup module, is waken up for being waken up signal in the active label Afterwards, it is acquisition mode to configure the timer, and the active label is placed in etc. to the resting state of data to be received.
- 5. device according to claim 4, it is characterised in that the sampling module also includes：Second time block, for direct memory access dma module described in regular check register whether moving data；If The register of the direct memory access dma module does not shift data in the given time, then judges data frame sampling knot Beam.
- 6. device according to claim 4, it is characterised in that the sampling module also includes：Second direct memory access dma module, for posting the capture in the first direct memory access dma module After data-moving in storage is specified in array to memory, initialize the timer and set.
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| CN102054157A (en) * | 2010-12-17 | 2011-05-11 | 深圳市远望谷信息技术股份有限公司 | Multifunctional electronic tag information decoding method and device thereof |
| CN102129588A (en) * | 2011-04-14 | 2011-07-20 | 中国电子技术标准化研究所 | Synchronous injection decoding method and system for RFID system |
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| CN101968776A (en) * | 2010-10-19 | 2011-02-09 | 广东威创视讯科技股份有限公司 | Method and system for acquiring and outputting images |
| CN102054157A (en) * | 2010-12-17 | 2011-05-11 | 深圳市远望谷信息技术股份有限公司 | Multifunctional electronic tag information decoding method and device thereof |
| CN102129588A (en) * | 2011-04-14 | 2011-07-20 | 中国电子技术标准化研究所 | Synchronous injection decoding method and system for RFID system |
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