CN103618041B - A kind of LED encapsulation structure of esd protection and method for packing thereof - Google Patents
A kind of LED encapsulation structure of esd protection and method for packing thereof Download PDFInfo
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- CN103618041B CN103618041B CN201310669399.8A CN201310669399A CN103618041B CN 103618041 B CN103618041 B CN 103618041B CN 201310669399 A CN201310669399 A CN 201310669399A CN 103618041 B CN103618041 B CN 103618041B
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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Abstract
The present invention relates to a kind of LED encapsulation structure and method for packing thereof of esd protection, belong to technical field of semiconductor encapsulation.The LED encapsulation structure of esd protection comprises upside-down mounting to the esd protection chip (300) in the blind hole (113) of the LED chip (200) in the die cavity (111) of silica-based body (110) and embedding silica-based body (110) another side; by in the silicon through hole (112) of die cavity (111) below and the interior more metal layers of blind hole (113) and is connected the metal lead wire (900) of more metal layers, achieve the electrical communication in electrical communication and LED chip (200) between LED chip (200), esd protection chip (300), esd protection chip (300) and the external world.The encapsulating structure that the present invention realizes by LED chip and ESD electrostatic protection chip integrating in packaging body; strengthen the ESD anti-static ability of LED encapsulation structure; the increase of thermal dissipating path, greatly reduces packaging thermal resistance, improves serviceability and the life-span of LED chip.
Description
Technical field
The present invention relates to a kind of LED encapsulation structure and method for packing thereof of esd protection, belong to technical field of semiconductor encapsulation.
Background technology
General, light-emitting diode (Light-EmittingDiode, is called for short LED, lower with) be packaged with multiple packing forms.Early stage, adopt lead frame to be that substrate encapsulates, LED chip is mounted on lead frame by heat-conducting cream (or conducting resinl), realize current load by the mode of wire bonding thus make it luminous; Along with technological progress, some are new, high performance baseplate material appearance, serve leading action, as ceramic substrate, AlN substrate etc. in the application of great power LED.But as the product of commercialization, also there is following defect in existing LED: 1. thermal resistance is high.Because LED chip luminescence is excited by electron recombination process, thus while generation light, produce a large amount of heat.As everyone knows, the heat of generation affects the efficiency that electricity is converted into light conversely, thus reduces the luminescent properties of LED itself.2. LED chip is in paster technique, very easily produces electrostatic breakdown, and traditional mode adding ESD electrostatic protection device on substrate can only help LED lamp bead to reduce the risk of electrostatic breakdown afterwards in attachment.
Summary of the invention
The object of the invention is to overcome above-mentioned deficiency, provide a kind of and reduce thermal resistance and integrate LED encapsulation structure and the method for packing thereof of the esd protection of ESD electrostatic protection chip.
The object of the present invention is achieved like this:
The LED encapsulation method of a kind of esd protection of the present invention, comprises the steps:
Silica-based disk is provided, utilizes the mode of photoetching and etching, form the recessed die cavity that can hold LED chip at the upper surface of silica-based disk;
Utilize chip attachment mode by LED chip upside-down mounting in die cavity;
Glass wafer is provided, glass wafer is bonded to the top of silica-based disk;
In the below of the die cavity of silica-based disk, corresponding LED chip electrode place, utilizes photoetching and etching technics to form silicon through hole, and offers the blind hole holding esd protection chip in the side of silicon through hole;
At silicon through hole and the inwall of blind hole and the back side of silica-based disk, insulating barrier I is set, in silicon through hole, corresponding LED chip electrode place offers Heraeus opening, sputtering, photoetching, electro-plating method is utilized to be formed and adhere to each silicon through hole and blind hole independently metal level I separately more successively, there is gap in metal level I, form the metal lead wire connecting blind hole place metal level I and a wherein silicon through hole metal level I each other in the side of metal level I simultaneously;
Mounted on the metal level I in blind hole by conducting resinl by esd protection chip, esd protection chip electrode towards the outside of blind hole, then is coated with layer of cloth II in esd protection chip periphery, and offers insulating barrier II opening at esd protection chip electrode place;
On the surface of metal level I and in the surface of insulating barrier II and insulating barrier II opening, utilize sputtering successively, independently metal level II that photoetching, electro-plating method form each silicon through hole corresponding and blind hole, there is gap each other in metal level II;
At the surperficial coat protective layer of metal level II, and offer the protective layer opening of each silicon through hole corresponding and blind hole respectively;
The surface of the metal level II below each silicon through hole, forms metal level III by printing solder or the mode of planting soldered ball;
Cut above-mentioned encapsulation disk, form the LED encapsulation structure of independently esd protection, enter subsequent handling.
Further, utilizing chip attachment mode also to comprise step before in LED chip upside-down mounting to die cavity:
By sputtering or the mode of electron beam evaporation plating in conjunction with photolithographic masking technique, wet etching mode, form reflector layer at the inwall of die cavity and outer, and form the reflector layer opening figure running through reflector layer and can hold LED chip electrode.
Further, described LED chip is connected with the bottom of die cavity by Heraeus.
Further, phosphor powder layer is formed on the surface towards die cavity of glass wafer by the mode sprayed or print.
Further, also step was comprised before above the die cavity being bonded to silica-based disk at glass wafer:
In the die cavity being provided with LED chip, fill filler, and solidify.
Further, before silicon through hole and blind hole are offered in the below of die cavity, also step is comprised:
The silica-based part at the back side of silica-based disk complete for bonding is thinned to the thickness of setting.
Further, form metal level III by printing solder or the mode of planting soldered ball after also comprise step:
By mechanical-chemistry grinding, metal level III is flushed with the surface of the metal level II below blind hole.
The LED encapsulation structure of the esd protection of the LED encapsulation method formation of a kind of esd protection of the present invention, comprise silica-based body and the LED chip with LED chip electrode, the one side of described silica-based body is provided with die cavity, another side is provided with several silicon through hole and blind holes, described silicon through hole is positioned at the below of die cavity, blind hole is positioned at the side of silicon through hole, described LED chip is arranged in die cavity, its LED chip electrode is towards the inner side of die cavity, the inwall of described die cavity arranges reflector layer, above described die cavity, glassy layer is set, the surface towards die cavity of described glassy layer arranges phosphor powder layer, described glassy layer is connected by adhesive and die cavity, in described die cavity, filler is set,
The inwall of described silicon through hole and blind hole all arranges insulating barrier I, described insulating barrier I outwards extends into the surface of the silica-based body at silicon through hole and/or blind hole place, described insulating barrier I in each hole arranges independently more metal layers respectively, described more metal layers comprises metal level I, metal level II and/or metal level III, and described LED chip realizes electrical communication by the described more metal layers of filling in described LED chip electrode and silicon through hole;
Also comprise the esd protection chip with esd protection chip electrode, described esd protection chip is arranged between the described more metal layers in blind hole, and realize electrical communication, insulating barrier II is set between described more metal layers, described esd protection chip realizes serial or parallel connection by metal lead wire and described LED chip, and described metal lead wire is arranged at the side of described more metal layers;
Protective layer is set in the periphery of described more metal layers with in the gap each other of described more metal layers, and offers protective layer opening, the outermost layer of more metal layers described in described protective layer opening exposed portion.
Alternatively, between described LED chip and metal level I, Heraeus is set, and offer Heraeus opening in the top place of silicon through hole, described metal level I is arranged on the described insulating barrier I in silicon through hole, at the top of silicon through hole, described metal level I by Heraeus opening respectively with LED chip Electrode connection, the surface of described metal level I arranges metal level II, arranges metal level III on the surface of described metal level II.
Alternatively; described metal level I is arranged on the described insulating barrier I in blind hole; described esd protection chip is fixed on the metal level I in blind hole by conducting resinl; described esd protection chip electrode is towards the outside of blind hole; and described metal level II is set thereon, between described metal level I and metal level II, insulating barrier II is set.
Structure of the present invention utilizes the Wafer-Level Packaging Technology of semiconductor in a package traditional LED chip and ESD electrostatic protection chip to be carried out embedding and integrates, improve the antistatic breakdown capability of LED chip in paster process and in follow-up use, and the metal level that large area ratio uses contributes to the thermal resistance reducing encapsulating structure; Wafer level packaging from chip manufacturing, be encapsulated into product and mail to the whole process of user, greatly reduce intermediate link, shorten the cycle, this will cause the reduction of cost.
Beneficial effect of the present invention is:
1, Wafer-Level Packaging Technology is utilized, by LED chip and ESD electrostatic protection chip integrating in packaging body, reduce the electrostatic breakdown risk of LED chip in encapsulation process, ensure that the antistatic impact capacity of LED lamp bead (i.e. LED encapsulation structure) in attachment process etc. uses, simultaneously, reduce the space taking substrate, can significantly expand its application;
2, the thin copper film metal level that thermal dissipating path is used by large area ratio is main, by chip electrode and thin copper film metal level Direct Bonding, without additional thermal resistance, greatly reduce packaging thermal resistance, far below traditional LED lamp pearl packaging thermal resistance, contribute to the serviceability and the life-span that promote LED chip;
3, the chip design of wafer level packaging and package design can be unified to consider, carry out simultaneously, contribute to improving design efficiency, reduce design cost;
4, wafer level packaging from chip manufacturing, be encapsulated into product and mail to the whole process of user, greatly reduce intermediate link, shorten the cycle, contribute to the reduction of cost.
Accompanying drawing explanation
Fig. 1 is the process chart of the LED encapsulation method of a kind of esd protection of the present invention;
Fig. 2 is the schematic diagram of the LED encapsulation structure of a kind of esd protection of the present invention;
Fig. 3 be the LED chip of Fig. 2 and esd protection chip relative position relation and and each metal level between the schematic diagram of relative position relation;
Fig. 4 is the schematic diagram of the amplification of local I in Fig. 2;
Fig. 5 is the schematic diagram of the amplification of local I I in Fig. 2;
Fig. 6 to Figure 18 is the process flow diagram of the method for packing of embodiment in Fig. 2;
In figure: silica-based disk 100,101,102,103
Silica-based body 110
Die cavity 111
Silicon through hole 112
Blind hole 113
Reflector layer 120
Reflector layer opening figure 121
Filler 131
Adhesive 141
Heraeus 151,151 '
Heraeus opening 152
Conducting resinl 161
LED chip 200
LED chip electrode 210
Esd protection chip 300
Esd protection chip electrode 310
Glass wafer 400
Glassy layer 410
Phosphor powder layer 510
Insulating barrier I 610,610 '
Insulating barrier II 620
Insulating barrier II opening 621
Metal level I 711,712,713
Metal level II 721,722,723
Metal level III 731,732
Protective layer 800
Protective layer opening I 801
Protective layer opening II 802
Protective layer opening III 803
Metal lead wire 900.
Embodiment
See the LED encapsulation method of a kind of esd protection of Fig. 1 the present invention, comprise the steps:
Perform step S101: silica-based disk is provided, utilizes the mode of photoetching and etching, form the recessed die cavity that can hold LED chip at the upper surface of silica-based disk;
Perform step S102: utilize chip attachment mode by LED chip upside-down mounting in die cavity;
Perform step S103: glass wafer is provided, glass wafer is bonded to the top of silica-based disk;
Perform step S104: the corresponding LED chip electrode place in the below of the die cavity of silica-based disk, utilizes photoetching and etching technics to form silicon through hole, and offer the blind hole holding esd protection chip in the side of silicon through hole;
Perform step S105: insulating barrier I is set at silicon through hole and the inwall of blind hole and the back side of silica-based disk, in silicon through hole, corresponding LED chip electrode place offers Heraeus opening, sputtering, photoetching, electro-plating method is utilized to be formed and adhere to each silicon through hole and blind hole independently metal level I separately more successively, there is gap in metal level I, form the metal lead wire connecting blind hole place metal level I and a wherein silicon through hole metal level I each other in the side of metal level I simultaneously;
Perform step S106: mounted on the metal level I in blind hole by conducting resinl by esd protection chip, esd protection chip electrode is towards the outside of blind hole, be coated with layer of cloth II in esd protection chip periphery again, and offer insulating barrier II opening at esd protection chip electrode place;
Perform step S107: on the surface of metal level I and in the surface of insulating barrier II and insulating barrier II opening, utilize sputtering successively, independently metal level II that photoetching, electro-plating method form each silicon through hole of correspondence and blind hole, there is gap each other in metal level II;
Perform step S108: at the surperficial coat protective layer of metal level II, and offer the protective layer opening of each silicon through hole corresponding and blind hole respectively;
Perform step S109: the surface of the metal level II below each silicon through hole, form metal level III by printing solder or the mode of planting soldered ball;
Perform step S110: cut above-mentioned encapsulation disk, form the LED encapsulation structure of independently esd protection, enter subsequent handling.
The embodiment of the LED encapsulation structure of the esd protection that the LED encapsulation method of a kind of esd protection of the present invention can be formed, as shown in Figures 2 to 5.LED chip 200 and esd protection chip 300 are integrated in the mode embedded and are packaged in silica-based body 110, and realize each other and with the electrical connection of extraneous substrate.LED chip 200 and esd protection chip 300 all can one or more, multi-functional integrated to realize.
The one side of the silica-based body 110 of the LED encapsulation structure of a kind of esd protection of the present invention is provided with the recessed die cavity 111 that can hold LED chip 200, another side is provided with several silicon through holes 112 and blind hole 113, the side that silicon through hole 112 is positioned at the below of die cavity 111, blind hole 113 is positioned at silicon through hole 112.Usually, the number of silicon through hole 112 is no less than the number of LED chip electrode 210, and blind hole 113 can one or more.The shape of cross section of silicon through hole 112 is circle, rectangle or polygon, adopts suitable shape according to actual needs.The shape of cross section of blind hole 113 also can be circle, rectangle or polygon, and its degree of depth is as the criterion can hold esd protection chip electrode 310.
LED chip 200 is arranged in die cavity 111, its LED chip electrode 210 is towards the inner side of die cavity 111, it is upside down in the bottom of die cavity 111 by the reverse installation process of semiconductor technology, and be fixed with Heraeus 151, and corresponding LED chip electrode 210 place offers Heraeus opening 152 in silicon through hole 112.Die cavity 111 inner wall smooth, has certain reflection and the effect of refracted ray, in order to promote its effect to light, generally arranges the reflector layer 120 of the material such as silver, aluminium at die cavity 111 inwall.Reflector layer 120 leaves reflector layer opening figure 121 in the bottom of die cavity 111, to hold LED chip electrode 210, and LED chip electrode 210 is not contacted with reflector layer 120.The excellent glassy layer of light transmission 410 is set above die cavity 111, the setting of glassy layer 410 also contributes to improving the characteristic of LED chip encapsulating structure in weatherability, particularly environment out of doors, its ambient temperature, humidity etc. all will directly affect the life-span of LED.Glassy layer 410 is connected by adhesive 141 and die cavity 111, and adhesive 141 can be general adhesive glue, also can be silica gel.Usually, in die cavity 111, also can fill filler 131, to improve the reliability of LED chip 200 in die cavity 111.The surface towards die cavity 111 of glassy layer 410 also can coating phosphor powder layer 510, to realize the outgoing of white light.Phosphor powder layer 510 uniformity formed by the mode of wafer level packaging, can promote the optical grade test yield of LED encapsulation structure effectively.Certainly, phosphor substance also can be mixed in the filler 131 in die cavity 111.
All arrange insulating barrier I 610 at the silicon through hole 112 of the another side of silica-based body 110 and the inwall of blind hole 113, insulating barrier I 610 outwards can extend into the surface of the silica-based body 110 at silicon through hole 112 and/or blind hole 113 place.Insulating barrier I 610 in each silicon through hole 112 arranges independently more metal layers respectively, and more metal layers can by metal level I 711,712,713, and metal level II 721,722,723 and metal level III 731,732 form.Wherein, metal level I 711,712 is arranged on the insulating barrier I 610 in silicon through hole 112 respectively, and in silicon through hole 112, metal level I 711,712 is connected with LED chip electrode 210 respectively by Heraeus opening 152.Metal level I 711,712 is the thin copper layer that connects up again, and its lower surface arranges metal level II 721,722 respectively; Metal level II 721,722 is also the thin copper layer that connects up again, is attached in silicon through hole 112 along metal level I 711,712; Metal level II 721,722 arranges the metal level III 731,732 of thick tin layers respectively, makes metal level III 731,732 fill and lead up silicon through hole 112.Described LED chip 200 realizes electrical communication by described LED chip electrode 210 and the interior described more metal layers of filling of silicon through hole 112.
Insulating barrier I 610 in blind hole 113 arranges metal level I 713; esd protection chip 300 with esd protection chip electrode 310 is arranged in blind hole 113; esd protection chip electrode 310 is towards the outside of blind hole 113; the opposite side of the esd protection chip electrode 310 of esd protection chip 300 is fixed on metal level I 713 by conducting resinl 161; esd protection chip electrode 310 is arranged the thin copper layer metal level II 723 that connects up again contacted with extraneous substrate, and insulating barrier II 620 is set between metal level I 713 and metal level II 723.The more metal layers be made up of metal level I 713 and metal level II 723 is independent of one another with the more metal layers being distributed in each silicon through hole 112 place.The wherein metal level I 711 of metal level I 713 by one of the LED chip electrode 210 of the metal lead wire 900 with LED chip 200 that are arranged at its side of esd protection chip 300 or the connection of metal level I 712, achieves the serial or parallel connection relation of esd protection chip 300 and LED chip 200.Usually, the N pole electrode of corresponding LED chip electrode 210 and P pole electrode, the metal level III 731 of answering with the N pole electrode pair of LED chip electrode 210 be N pole conductive metal layer, the metal level III 732 of answering with the P pole electrode pair of LED chip electrode 210 is P pole conductive metal layer; The metal level I 713 that the metal level II 723 be connected with the esd protection chip electrode 310 of esd protection chip 300 is P pole conductive metal layer, be connected with the opposite side of esd protection chip electrode 310 is N pole conductive metal layer; If the metal level of esd protection chip 300 I 713 is connected with the metal level I 711 of the N pole electrode of LED chip 200 by metal lead wire 900, then achieve the parallel relationship of esd protection chip 300 and LED chip 200; If the metal level of esd protection chip 300 I 713 is connected with the metal level I 712 of the P pole electrode of LED chip 200 by metal lead wire 900, then achieve the series relationship of esd protection chip 300 and LED chip 200.Esd protection chip 300 is determined by actual needs with the determination of the serial or parallel connection relation of LED chip 200.
The setting of more metal layers of the present invention, adds thermal dissipating path, greatly reduces packaging thermal resistance, improves serviceability and the life-span of LED chip.In the periphery of more metal layers with in the gap each other of more metal layers, protective layer 800 is set; and offer protective layer opening I 801, protective layer opening II 802, protective layer opening III 803; expose the P pole conductive metal layer of the P pole conductive metal layer of LED chip 200 and N pole conductive metal layer, esd protection chip 300 respectively, for the surface mount process of LED encapsulation structure.
The implementation procedure of the embodiment of the LED encapsulation structure of esd protection of the present invention is:
As shown in Figure 6 and Figure 7, silica-based disk 100 is provided, utilize the mode of photoetching and etching, recessed die cavity 111 is formed at the upper surface of silica-based disk 101, the sidewall of die cavity 111 is smooth and have certain angle of inclination, can play certain reflection function, the degree of depth of die cavity 111 is as the criterion can hold LED chip 200.
As shown in Figure 8, by sputtering or the mode of electron beam evaporation plating, in conjunction with photolithographic masking technique, form reflector layer 120 at the inwall of die cavity 111 and outer, and forming the reflector layer opening figure 121 running through reflector layer 120, the material of reflector layer 120 can be the metal that silver, aluminium etc. have reverberation effect.
As shown in Figure 9 and Figure 10, utilize chip attachment mode by LED chip 200 upside-down mounting in die cavity 111, LED chip electrode 210 aims at reflector layer opening figure 121, adopt the firmness bottom Heraeus 151 ' enhancing LED chip 200 and die cavity 111, and fill filler 131 in die cavity 111, and solidify.
As shown in figure 11, glass wafer 400 is provided, phosphor powder layer 510 is formed by the mode sprayed or print on the surface towards die cavity 111 of glass wafer 400, solidification after with silica-based disk 102 by the adhesives such as silica gel 141 bonding, phosphor powder layer 510 also can with setting graphic style spraying or printing, fluorescent material also can by with filler 131 Homogeneous phase mixing after be filled in die cavity 111.
As shown in figure 12; the silica-based part at the back side of the silica-based disk 102 after bonding is thinned to the thickness of setting; corresponding LED chip electrode 210 place in the below of die cavity 111 again; photoetching and etching technics is utilized to be formed and the silicon through hole 112 being no less than LED chip electrode 210 number; silicon through hole 112 runs through the silica-based part below die cavity 111; blind hole 113 is offered in the side of silicon through hole 112, and its degree of depth is as the criterion can hold esd protection chip 300.
As shown in Figure 13 and Fig. 3, insulating barrier I 610 is set at the back side of silicon through hole 112 and blind hole 113 inwall and silica-based disk 103 ', in silicon through hole 112, corresponding LED chip electrode 210 place removes the partial insulative layer I 610 at LED chip electrode 210 place ' and part Heraeus 151 ' formation Heraeus opening 152, utilize sputtering successively again, photoetching, electro-plating method forms the discontinuous metal level I 711 of the thin copper material of wire laying mode again, 712, 713, each silicon through hole 112 and blind hole 113 is made all to have independently metal level I 711, 712, 713, metal level I 711, 712, 713 exist gap each other, simultaneously at metal level I 711, 712, the side of 713 forms the metal lead wire 900 connecting blind hole 113 place metal level I 713 and a wherein silicon through hole 112 place metal level I 711 or 712.
As shown in figure 14; esd protection chip 300 is mounted on the metal level I 713 in blind hole 113 by conducting resinl 161; esd protection chip electrode 310 is towards the outside of blind hole 113; and Curing conductive adhesive 161; be coated with layer of cloth II 620 in esd protection chip 300 periphery again, and offer insulating barrier II opening 621 at esd protection chip electrode 310 place.
As shown in figure 15, on the surface of above-mentioned metal level I 711,712,713 and in the surface of insulating barrier II 620 and insulating barrier II opening 621, utilize sputtering successively, independently metal level II 721,722,723 that photoetching, electro-plating method form each silicon through hole 112 corresponding and blind hole 113, there is gap each other in metal level II 721,722,723.
As shown in figure 16, at the surperficial coat protective layer 800 of above-mentioned metal level II 721,722,723, and offer protective layer opening I 801, protective layer opening II 802, the protective layer opening III 803 of each silicon through hole 112 corresponding and blind hole 113 respectively.
As shown in figure 17; in the protective layer opening I 801 and protective layer opening II 802 of silicon through hole 112 correspondence; by printing or plant the mode of soldered ball; form the metal level III 731,732 of solder alloy; again by mechanical-chemistry grinding, metal level III 731,732 is flushed with the surface of the metal level II 723 below blind hole 113.
As shown in figure 18, cut above-mentioned encapsulation disk, form the packaging body of the LED encapsulation structure of independently esd protection, and carry out the operations such as follow-up sorting, test.
LED encapsulation structure and the method for packing thereof of esd protection of the present invention are not limited to above-described embodiment; any those skilled in the art without departing from the spirit and scope of the present invention; the any amendment done above embodiment according to technical spirit of the present invention, equivalent variations and modification, all fall in protection range that the claims in the present invention define.
Claims (10)
1. a LED encapsulation method for esd protection, comprises the steps:
Silica-based disk (100) is provided, utilizes the mode of photoetching and etching, form the recessed die cavity (111) that can hold LED chip (200) at the upper surface of silica-based disk (100);
Utilize chip attachment mode by LED chip (200) upside-down mounting in die cavity (111);
Glass wafer (400) is provided, glass wafer (400) is bonded to the top of silica-based disk;
In the below of the die cavity (111) of silica-based disk, corresponding LED chip electrode (210) place, utilizes photoetching and etching technics to form silicon through hole (112), and offers the blind hole (113) holding esd protection chip (300) in the side of silicon through hole (112);
At silicon through hole (112) and the inwall of blind hole (113) and the back side of silica-based disk, insulating barrier I (610) is set, in silicon through hole (112), corresponding LED chip electrode (210) place offers Heraeus opening (152), utilize sputtering successively again, photoetching, electro-plating method is formed and adheres to each silicon through hole (112) and blind hole (113) independently metal level I (711 separately, 712, 713), metal level I (711, 712, 713) there is gap each other, simultaneously at metal level I (711, 712, 713) formation connection blind hole (113) place, side metal level I (713) and wherein silicon through hole (112) place metal level I (711, 712) metal lead wire (900),
Esd protection chip (300) is mounted on the metal level I (713) in blind hole (113) by conducting resinl (161), esd protection chip electrode (310) is towards the outside of blind hole (113), be coated with layer of cloth II (620) in esd protection chip (300) periphery again, and offer insulating barrier II opening (621) at esd protection chip electrode (310) place;
On the surface of metal level I (711,712,713) and in the surface of insulating barrier II (620) and insulating barrier II opening (621), utilize sputtering successively, independently metal level II (721,722,723) that photoetching, electro-plating method form each silicon through hole (112) corresponding and blind hole (113), there is gap each other in metal level II (721,722,723);
At the surperficial coat protective layer (800) of metal level II (721,722,723), and offer the protective layer opening of each silicon through hole (112) corresponding and blind hole (113) respectively;
On the surface of the metal level II (721,722) of each silicon through hole (112) below, form metal level III (731,732) by printing solder or the mode of planting soldered ball;
Cut above-mentioned encapsulation disk, form the LED encapsulation structure of independently esd protection, enter subsequent handling.
2. the LED encapsulation method of esd protection according to claim 1, is characterized in that: before in LED chip (200) upside-down mounting to die cavity (111), also comprise step utilizing chip attachment mode:
By sputtering or the mode of electron beam evaporation plating in conjunction with photolithographic masking technique, wet etching mode, in inwall and outer formation reflector layer (120) of die cavity (111), and form the reflector layer opening figure (121) running through reflector layer (120) and LED chip electrode (210) can be held.
3. the LED encapsulation method of esd protection according to claim 2, is characterized in that: described LED chip (200) is connected by the bottom of Heraeus (151) with die cavity (111).
4. the LED encapsulation method of esd protection according to claim 3, is characterized in that:
Step is comprised after glass wafer (400) is provided:
Phosphor powder layer (510) is formed by the mode sprayed or print on the surface towards die cavity (111) of glass wafer (400).
5. the LED encapsulation method of esd protection according to claim 4, is characterized in that: also comprised step be bonded to die cavity (111) top of silica-based disk at glass wafer (400) before:
In the die cavity (111) being provided with LED chip (200), fill filler (131), and solidify.
6. the LED encapsulation method of esd protection according to claim 5, is characterized in that: also comprised step offer silicon through hole (112) and blind hole (113) in the below of die cavity (111) before:
The silica-based part at the back side of silica-based disk complete for bonding is thinned to the thickness of setting.
7. the LED encapsulation method of esd protection according to claim 6, is characterized in that: also comprise step after forming metal level III (731,732) by printing solder or the mode of planting soldered ball:
By mechanical-chemistry grinding, metal level III (731,732) is flushed with the surface of the metal level II (723) of blind hole (113) below.
8. the LED encapsulation structure of the esd protection of the LED encapsulation method formation of an esd protection as claimed in claim 7, it is characterized in that: comprise silica-based body (110) and the LED chip (200) with LED chip electrode (210), the one side of described silica-based body (110) is provided with die cavity (111), another side is provided with several silicon through holes (112) and blind hole (113), described silicon through hole (112) is positioned at the below of die cavity (111), blind hole (113) is positioned at the side of silicon through hole (112), described LED chip (200) is arranged in die cavity (111), its LED chip electrode (210) is towards the inner side of die cavity (111), the inwall of described die cavity (111) arranges reflector layer (120), described die cavity (111) top arranges glassy layer (410), the surface towards die cavity (111) of described glassy layer (410) arranges phosphor powder layer (510), described glassy layer (410) is connected by adhesive (141) and die cavity (111), filler (131) is set in described die cavity (111),
The inwall of described silicon through hole (112) and blind hole (113) all arranges insulating barrier I (610), described insulating barrier I (610) outwards extends into the surface of the silica-based body (110) at silicon through hole (112) and/or blind hole (113) place, described insulating barrier I (610) in each hole arranges independently more metal layers respectively, described more metal layers comprises metal level I (711, 712, 713), metal level II (721, 722, 723) and/or metal level III (731, 732), described LED chip (200) realizes electrical communication by the interior described more metal layers of filling of described LED chip electrode (210) and silicon through hole (112),
Also comprise the esd protection chip (300) with esd protection chip electrode (310), described esd protection chip (300) is arranged between the described more metal layers in blind hole (113), and realize electrical communication, insulating barrier II (620) is set between described more metal layers, described esd protection chip (300) realizes serial or parallel connection by metal lead wire (900) and described LED chip (200), and described metal lead wire (900) is arranged at the side of described more metal layers;
Protective layer (800) is set in the periphery of described more metal layers with in the gap each other of described more metal layers, and offers protective layer opening, the outermost layer of more metal layers described in described protective layer opening exposed portion.
9. the LED encapsulation structure of esd protection according to claim 8, it is characterized in that: at described LED chip (200) and metal level I (711, 712) Heraeus (151) is set between, and offer Heraeus opening (152) in the top place of silicon through hole (112), described metal level I (711, 712) be arranged on the described insulating barrier I (610) in silicon through hole (112), at the top of silicon through hole (112), described metal level I (711, 712) be connected with LED chip electrode (210) respectively by Heraeus opening (152), described metal level I (711, 712) surface arranges metal level II (721, 722), at described metal level II (721, 722) surface arranges metal level III (731, 732).
10. the LED encapsulation structure of esd protection according to claim 8; it is characterized in that: described metal level I (713) is arranged on the described insulating barrier I (610) in blind hole (113); described esd protection chip (300) is fixed on the metal level I (713) in blind hole (113) by conducting resinl (161); described esd protection chip electrode (310) is towards the outside of blind hole (113); and described metal level II (723) is set thereon, between described metal level I (713) and metal level II (723), insulating barrier II (620) is set.
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| CN105449071B (en) * | 2015-12-31 | 2018-11-16 | 鸿利智汇集团股份有限公司 | Wafer-level package LED forming method and wafer-level package LED |
| CN105449080B (en) * | 2015-12-31 | 2018-08-28 | 鸿利智汇集团股份有限公司 | With the method and CSP LED of the method and molding flip-chip of positive cartridge chip molding CSP LED |
| JP7266961B2 (en) * | 2015-12-31 | 2023-05-01 | 晶元光電股▲ふん▼有限公司 | light emitting device |
| WO2018098648A1 (en) * | 2016-11-30 | 2018-06-07 | 深圳修远电子科技有限公司 | Integrated circuit packaging method and integrated packaging circuit |
| KR102140993B1 (en) * | 2019-04-01 | 2020-08-05 | (주)라이타이저 | Light Emitting Diode Chip Scale Package and method for manufacturing thereof |
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