Groove-shaped grid and manufacture method
Technical field
The present invention relates to field of semiconductor manufacture, refer to especially the groove-shaped grid of a kind of MOSFET, the invention still further relates to the manufacture method of described groove-shaped grid.
Background technology
Groove type power MOS FET device has the features such as integrated level is high, conducting resistance is low, switching speed is fast, switching loss is little, almost in low pressure and high pressure field, substitutes plane power MOS (Metal Oxide Semiconductor) device comprehensively, becomes the main flow of application.Due to application extensively and the continuous lifting of equipment performance, at present the switching speed of power MOS (Metal Oxide Semiconductor) device is required also more and more highlyer, common groove-type power MOS device manifests the defect of performance deficiency gradually.The main cause that affects switching speed is the parasitic capacitance between grid and source electrode and grid and drain electrode.Traditional trench MOSFET is to utilize gate oxide that polysilicon gate is divided into two parts: grid conductive polycrystalline silicon and shield grid, be so just equivalent to be connected in series a Cox on gate leakage capacitance.As shown in Figure 1, in groove 17, between grid conductive polycrystalline silicon 18 and shield grid 16, have second gate oxide layer 14 to separate, 16 of shield grids are surrounded by thicker first grid oxide layer 13.Its manufacturing process is generally etching groove in extension, then the thicker one deck gate oxide of deposit, deposition gate polysilicon return to carve again, then wet method is removed the slightly thin gate oxide of regrowth one deck after the gate oxide on groove top, and deposit grid conductive polycrystalline silicon also returns and has carved.By such method, can reduce grid capacitance, improve to a certain extent the switching speed of device, but in the higher occasion of ask for something, still need the better device of switching speed and frequency characteristic.
Summary of the invention
Technical problem to be solved by this invention is to provide the groove-shaped grid structure of a kind of MOSFET of being applicable to, and grid capacitance is further reduced.
Another technical problem to be solved by this invention is to provide the method for manufacturing technology of described groove-shaped grid.
For addressing the above problem, groove-shaped grid of the present invention, comprises grid conductive polycrystalline silicon and shield grid polysilicon, wherein:
In trench wall bottom and bottom there is first grid oxide layer, first grid oxide layer is partly wrapped up shield grid polysilicon, and shield grid polysilicon is divided into two-layer, comprises the P type polysilicon that is positioned at bottom, and being positioned at the N-type polysilicon on P type polysilicon, two-layer polysilicon contacts with each other formation PN junction.
On N-type polysilicon and trench wall top there is second gate oxide layer, second gate oxide layer is partly wrapped up N-type grid conductive polycrystalline silicon, by the isolation of N-type grid conductive polycrystalline silicon and shield grid polysilicon.
For addressing the above problem, the method for manufacturing technology of groove-shaped grid of the present invention, comprises following steps:
The 1st step, first gate oxide of growing in groove.
The 2nd step deposits P type polysilicon and returns quarter in groove.
The 3rd step, carries out N-type Implantation to P type polysilicon, and its top is made the transition as N-type.
The 4th step, carries out returning of wet etching to first grid oxide layer and carves, and gets rid of the first grid oxide layer of N-type polysilicon top.
The 5th step, growth the second gate oxide in groove.
The 6th step, in groove, deposition is filled N-type polysilicon, and returns quarter.
Preferably, in described the 1st step, the thickness of the first grid oxide layer of growth is
Preferably, in described the 2nd step, the P type polysilicon concentration range of deposition is 1x10
13~1x10
20cm
-3, P type polysilicon returns the distance of carving to its surface lies groove top and is not less than 0.8 μ m.
Preferably, in described the 3rd step, the impurity of N-type Implantation is arsenic, and Implantation Energy is less than 40KeV, and implantation dosage is 1x10
9~1x10
16cm
-2.
Preferably, in described the 5th step, the thickness of the second gate oxide layer of growth is
Preferably, in described the 6th step, N-type polysilicon is returned to the distance of carving to polysilicon surface lies groove top and be less than
Groove-shaped grid of the present invention and manufacture method, in common shield grid, only to increase primary ions to inject the extra polysilicon that forms one deck transoid, form a PN junction electric capacity with former shielding polysilicon, make grid be equivalent to be connected in series again a PN junction electric capacity, series connection effect by electric capacity, further reduce the grid capacitance of device, make to adopt the device of this trench gate to there is better switching speed and frequency characteristic.
Accompanying drawing explanation
Fig. 1 is common groove-shaped grid structure schematic diagram;
Fig. 2 is the groove-shaped grid structure schematic diagram of the present invention;
Fig. 3 is that the 1st step first grid oxide layer deposit completes figure;
Fig. 4 is the 2nd step P type polysilicon deposit and returns and carved figure;
Fig. 5 is that the 3rd step N-type Implantation completes schematic diagram;
Fig. 6 is the schematic diagram after the first grid oxide layer above the 4th step wet etching removal shield grid polysilicon;
Fig. 7 is the schematic diagram of the interior growth of groove second gate oxide of the 5th step shield grid polysilicon top;
Fig. 8 is the 6th step grid conductive polycrystalline silicon deposit and returns carving technology schematic diagram;
Fig. 9 is trench fill process chart of the present invention.
Description of reference numerals
7, the 17th, groove, 3, the 13rd, first grid oxide layer, the 4, the 14th, second gate oxide layer, the 16th, shield grid polysilicon, 8, the 18th, grid conductive polycrystalline silicon, the 5th, P type polysilicon, the 6th, N-type polysilicon, d1 is first grid oxidated layer thickness, h1 is that P type polysilicon is apart from the distance at groove top, d2 is the thickness of second gate oxide layer, and h2 is that grid conductive polycrystalline silicon returns the distance of carving rear its surface lies groove top, and C ' ox, Cox+Cd, C1, C2, C3 are equivalent capacitys.
Embodiment
Groove-shaped grid of the present invention, its structure 2 is described as follows by reference to the accompanying drawings:
In groove 7 inwall bottoms and bottom, there is first grid oxide layer 3, first grid oxide layer 3 half parcel shield grid polysilicons, shield grid polysilicon is divided into two-layer, comprises the P type polysilicon 5 that is positioned at bottom, and being positioned at the N-type polysilicon 6 on P type polysilicon, two-layer polysilicon contacts with each other formation PN junction.
On N-type polysilicon 6 and groove 7 upper inside wall there is second gate oxide layer 4, second gate oxide layer 4 half parcel is positioned at the N-type grid conductive polycrystalline silicon 8 of groove 7 internal upper parts.
The manufacture method of groove-shaped grid of the present invention, existing trench gate of take 30V operating voltage is described as follows as example: the 1st step, one deck first grid of growing in
groove 7
oxide layer 3, thickness d 1 is
as shown in Figure 3.
The 2nd step as shown in Figure 4, deposits P type polysilicon 5 and returns quarter in groove 7.P type polysilicon 5 concentration ranges of deposition are 1x10
18cm
-3, P type polysilicon 5 times is carved to the distance h 1 at its surface lies groove top and is not less than 0.8 μ m.
The 3rd step, carries out N-type Implantation to P type polysilicon 5, and the upper strata of P type polysilicon 5 is made the transition as N-type polysilicon 6, and the P type polysilicon 5 of former bottom forms a PN junction with the N-type polysilicon 6 that Implantation forms.As shown in Figure 5.The impurity of N-type Implantation is arsenic, and Implantation Energy is less than 40KeV, and implantation dosage is 1x10
14cm
-2.
The 4th step, returns quarter to first grid oxide layer 3, uses wet etching to get rid of the first grid oxide layer 3 of N-type polysilicon 6 tops.As shown in Figure 6.
The 5th step, interior growth the second gate oxide 4 of groove 7, the thickness d 2 of the second gate oxide layer 4 of growth is
as shown in Figure 7.
The 6th step, in groove, deposition is filled N-type polysilicon, and returns quarter.N-type polysilicon is returned to the distance h 2 of carving to polysilicon surface lies groove top to be less than
groove-shaped fabrication completes.As shown in Figure 8.
More than be the manufacture method of groove-shaped grid of the present invention, wherein shield grid polysilicon is floating empty grid, and P type polysilicon and N-type polysilicon do not need external.C1 shown in Fig. 2, C2, C3 are equivalent capacity, C1 is the equivalent capacity Cox forming between shield grid polysilicon and grid conductive polycrystalline silicon and first grid oxide layer, C2 is the PN junction equivalent capacity Cpn that shield grid N-type polysilicon 6 and P type polysilicon 5 form, and C3 is the serial connection equivalent capacity Cox+Cd of first grid oxide layer and drain terminal.By the serial connection effect of C1, C2, C3, further reduced the grid capacitance of groove-shaped grid, improved the switching speed of device, frequency characteristic is also improved.
These are only the preferred embodiments of the present invention, be not intended to limit the present invention.For a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.