CN103579217B - 一种超小封装的电源模块及其封装方法 - Google Patents

一种超小封装的电源模块及其封装方法 Download PDF

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CN103579217B
CN103579217B CN201310550475.3A CN201310550475A CN103579217B CN 103579217 B CN103579217 B CN 103579217B CN 201310550475 A CN201310550475 A CN 201310550475A CN 103579217 B CN103579217 B CN 103579217B
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徐谦刚
李应龙
杨虹
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TIANSHUI TIANGUANG SEMICONDUCTOR CO Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12032Schottky diode
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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Abstract

本发明利用电源管理芯片、肖特基二极管芯片、贴片电感、贴片电容直接粘接在基片上,将电源变换电路固化成电源模块,舍弃当前的陶瓷或铝基片作为载体,而直接采用铜金属框架作为线路载体(基片),该基片的结构应具有屏蔽、降噪的特点,既能保证电源输出具有较小的纹波,又能便于安装,且缩小电源模块的体积。同时采用环氧树脂的灌封,该灌封应保证裸芯片与外界隔绝,防止水汽等进入,且牢固易存,还具有较好的散热性能。

Description

一种超小封装的电源模块及其封装方法
技术领域
本发明涉及电源模块技术领域,具体涉及一种具有较高的功率输出、超小的体积、较小的纹波的电源模块,本发明还涉一种超小封装的电源模块的封装方法。
背景技术
目前,由于普通电源模块采用陶瓷或铝基片作为搭建线路的基本载体(基片),基片上再焊接封装好的成品的元器件,外部再采用金属密封或塑料模封工艺,导致普通电源模块的体积比较大,转换效率低,易发热,且制作成本高,推广应用价值较低。
发明内容
本发明所要解决的技术问题是针对现有技术中的缺点而提供一种具有较高的功率输出、超小的体积、较小的纹波的超小封装的电源模块。
本发明所要解决的另一技术问题是提供一种超小封装的电源模块的封装方法。
为解决本发明的技术问题采用如下技术方案:
一种超小封装的电源模块,包括基片,所述基片为铜质,整个表面镀镍,所述基片分为Ⅰ区和Ⅱ区, 所述Ⅰ区上设有圆孔,所述Ⅰ区基片厚度为1MM±0.1,所述Ⅱ区基片厚度为0.3MM±0.1,所述Ⅰ区和Ⅱ区连接形成0.7MM±0.2的台阶,所述Ⅱ区分为a区、b区、c区,所述c区分为A端、B端、C端和D端,电源管理芯片安装在a区内,肖特基二极管芯片安装在b区内,输入电容一端安装在a区上,输入电容另一端安装在c区的A端上,输出电容一端安装在c区的C端上,输出电容另一端安装在c区的D端上,电感一端安装在c区的B端上,电感另一端安装在c区的D端上,所述电源管理芯片与输入电容和电感分别连通,所述电感与肖特基二极管芯片连通,所述基片上安装电源管理芯片、肖特基二极管芯片、输入电容、输出电容和电感的区域用环氧树脂灌封。
所述电源管理芯片和肖特基二极管芯片的焊接点均镀银。
所述电源管理芯片为LM25XX系列电源管理芯片。
所述肖特基二极管芯片为1N58XX系列肖特基二极管芯片。
所述电感为47UF贴片电感,所述输入电容和输出电容均为220UF贴片电容。
一种超小封装的电源模块的封装方法,其步骤为:
a、基片设计:所述基片为铜质,整个表面镀镍,所述基片分为Ⅰ区和Ⅱ区, 所述Ⅰ区上设有圆孔,所述Ⅰ区基片厚度为1MM±0.1,所述Ⅱ区基片厚度为0.3MM±0.1,所述Ⅰ区和Ⅱ区连接形成0.7MM±0.2的台阶,所述Ⅱ区分为a区、b区、c区,所述c区分为A端、B端、C端和D端;
b、首先采用270度的高温焊膏在基片a区和c区的A端之间粘接输入电容,在基片c区的C端和c区的D端之间粘接输出电容,在基片c区的B端和c区的D端之间粘接电感,再流焊过炉后采用230度的低温焊膏在基片a区上粘接电源管理芯片和在基片b区上粘接肖特基二极管芯片后再一次再流焊过炉;
c、采用金丝对电源管理芯片和肖特二极管进行压焊,先将粘接器件的基片加热到85-90度,然后用金丝焊接电源管理芯片的焊接点和输入电容焊接点,用金丝焊接电源管理芯片的焊接点和电感的焊接点,最后用金丝焊接电感的焊接点和肖特基二极管芯片的焊接点;
d、将压焊好的基片灌封,采用塑封料开模直接灌封,将压焊好的基片放入模具内,然后将环氧树脂加热至180-200度,倒入模具后冷却到常温后,打开模具即可。
所述电源管理芯片和肖特基二极管芯片的焊接点均镀银。
所述金线为25uM金线。
本发明利用电源管理芯片、肖特基二极管芯片、贴片电感、贴片电容直接粘接在基片上,将电源变换电路固化成电源模块,舍弃当前的陶瓷或铝基片作为载体,而直接采用铜金属框架作为线路载体(基片),该基片的结构应具有屏蔽、降噪的特点,既能保证电源输出具有较小的纹波,又能便于安装,且缩小电源模块的体积。采用环氧树脂的灌封,该灌封应保证裸芯片与外界隔绝,防止水汽等进入,且牢固易存,还具有较好的散热性能。
附图说明
图1为本发明的基片结构示意图;
图2为本发明安装示意图;
图3为本发明的T区压焊连线图;
图4为本发明灌封示意图。
具体实施方式
下面结合附图对本发明做进一步的详细说明:
一种超小封装的电源模块,包括基片,所述基片为铜质,整个表面镀镍,基片结构如图1所示,基片分为Ⅰ区1和Ⅱ区,Ⅰ区1上设有圆孔8,Ⅰ区1基片厚度为1MM±0.1,Ⅱ区基片厚度为0.3MM±0.1,Ⅰ区1和Ⅱ区连接形成0.7MM±0.2的台阶,Ⅱ区分为a区21、b区22、c区23,其中c区23分为A端231、B端232、C端233和D端234。如图2、图3所示,电源管理芯片3安装在a区21内,肖特基二极管芯片5安装在b区22内,输入电容4一端安装在a区21上,输入电容4另一端安装在c区23的A端231上,输出电容7一端安装在c区23的C端233上,输出电容7另一端安装在c区23的D端234上,电感6一端安装在c区23的B端232上,电感6另一端安装在c区23的D端234上,所述电源管理芯片3与输入电容4和电感6分别连通,电感6与肖特基二极管芯片5连通,其中电源管理芯片3和肖特基二极管芯片5的焊接点均镀银。电源管理芯片3为LM25XX系列电源管理芯片。肖特基二极管芯片5为1N58XX系列肖特基二极管芯片。电感6为47UF贴片电感,输入电容4和输出电容7均为220UF贴片电容。如图4所示,基片上安装电源管理芯片3、肖特基二极管芯片5、输入电容4、输出电容7和电感6的区域用环氧树脂灌封。
超小封装的电源模块的基本工作原理是,输入电源使得电源管理芯片开始工作,产生功率方波信号,通过电感、输入电容、输出电容以及肖特基二极管芯片形成开关电源的作用,因此,该电源模块具有开关电源的一切特性,其输出由电感和、输入电容、输出电容大小决定,输出为稳定电压的电源。
实施例1
一种超小封装的电源模块的封装方法,其步骤为:
a、基片设计:一种超小封装的电源模块,包括基片,所述基片为铜质,整个表面镀镍,基片结构如图1所示,基片分为Ⅰ区1和Ⅱ区,Ⅰ区1上设有圆孔8,Ⅰ区1基片厚度为1MM,Ⅱ区基片厚度为0.3MM,Ⅰ区1和Ⅱ区连接形成0.7MM的台阶,Ⅱ区分为a区21、b区22、c区23,其中c区23分为A端231、B端232、C端233和D端234。
b、首先采用270度的高温焊膏在基片a区21和c区23的A端231之间粘接输入电容4,输入电容4为220UF贴片电容。在基片c区23的C端233和c区23的D端234之间粘接输出电容7,电容7为220UF贴片电容。在基片c区23的B端232和c区23的D端234之间粘接电感6,电感6为47UF贴片电感,为再流焊过炉后采用230度的低温焊膏在基片a区21上粘接电源管理芯片3和在基片b区22上粘接肖特基二极管芯片5后再一次再流焊过炉;其中电源管理芯片3为LM25XX系列电源管理芯片,肖特基二极管芯片5为1N58XX系列肖特基二极管芯片。电源管理芯片3和肖特基二极管芯片5的焊接点均镀银。
c、采用25uM金线金丝对电源管理芯片和肖特二极管进行压焊,先将粘接器件的基片加热到85度,然后用金丝焊接电源管理芯片3的焊接点和输入电容4焊接点,用金丝焊接电源管理芯片3的焊接点和电感6的焊接点,最后用金丝焊接电感6的焊接点和肖特基二极管芯片5的焊接点。
d、将压焊好的基片灌封,采用塑封料开模直接灌封,将压焊好的基片放入模具内,然后将环氧树脂加热至180度,倒入模具后冷却到常温后,打开模具即可。
实施例2
一种超小封装的电源模块的封装方法,其步骤为:
a、基片设计:一种超小封装的电源模块,包括基片,所述基片为铜质,整个表面镀镍,基片结构如图1所示,基片分为Ⅰ区1和Ⅱ区,Ⅰ区1上设有圆孔8,Ⅰ区1基片厚度为0.9MM,Ⅱ区基片厚度为0.4MM,Ⅰ区1和Ⅱ区连接形成0.5MM的台阶,Ⅱ区分为a区21、b区22、c区23其中c区23分为A端231、B端232、C端233和D端234。
b、首先采用270度的高温焊膏在基片a区21和c区23的A端231之间粘接输入电容4,输入电容4为220UF贴片电容。在基片c区23的C端233和c区23的D端234之间粘接输出电容7,电容7为220UF贴片电容。在基片c区23的B端232和c区23的D端234之间粘接电感6,电感6为47UF贴片电感,为再流焊过炉后采用230度的低温焊膏在基片a区201上粘接电源管理芯片3和在基片b区202上粘接肖特基二极管芯片5后再一次再流焊过炉;其中电源管理芯片3为LM25XX系列电源管理芯片,肖特基二极管芯片5为1N58XX系列肖特基二极管芯片。
c、采用25uM金线金丝对电源管理芯片和肖特二极管进行压焊,先将粘接器件的基片加热到90度,然后用25uM金丝焊接电源管理芯片3的焊接点和输入电容4焊接点,用25uM金丝焊接电源管理芯片3的焊接点和电感6的焊接点,最后用25uM金丝焊接电感6的焊接点和肖特基二极管芯片5的焊接点。
d、将压焊好的基片灌封,采用塑封料开模直接灌封,将压焊好的基片放入模具内,然后将环氧树脂加热至180度,倒入模具后冷却到常温后,打开模具即可。
实施例3
一种超小封装的电源模块的封装方法,其步骤为:
a、基片设计:一种超小封装的电源模块,包括基片,所述基片为铜质,整个表面镀镍,基片结构如图1所示,基片分为Ⅰ区1和Ⅱ区,Ⅰ区1上设有圆孔8,Ⅰ区1基片厚度为1.1MM,Ⅱ区基片厚度为0.2MM,Ⅰ区1和Ⅱ区连接形成0.9MM的台阶,Ⅱ区分为a区21、b区22、c区23,其中c区23分为A端231、B端232、C端233和D端234。
b、首先采用270度的高温焊膏在基片a区21和c区23的A端231之间粘接输入电容4,输入电容4为220UF贴片电容。在基片c区23的C端233和c区23的D端234之间粘接输出电容7,电容7为220UF贴片电容。在基片c区23的B端232和c区23的D端234之间粘接电感6,电感6为47UF贴片电感,为再流焊过炉后采用230度的低温焊膏在基片a区201上粘接电源管理芯片3和在基片b区202上粘接肖特基二极管芯片5后再一次再流焊过炉;其中电源管理芯片3为LM25XX系列电源管理芯片,肖特基二极管芯片5为1N58XX系列肖特基二极管芯片。
c、采用25uM金线金丝对电源管理芯片和肖特二极管进行压焊,先将粘接器件的基片加热到90度,然后用25uM金丝焊接电源管理芯片3的焊接点和输入电容4焊接点,用25uM金丝焊接电源管理芯片3的焊接点和电感6的焊接点,最后用25uM金丝焊接电感6的焊接点和肖特基二极管芯片5的焊接点。
d、将压焊好的基片灌封,采用塑封料开模直接灌封,将压焊好的基片放入模具内,然后将环氧树脂加热至180度,倒入模具后冷却到常温后,打开模具即可。

Claims (3)

1.一种超小封装的电源模块的封装方法,其特征在于步骤为:
a、基片设计:所述基片为铜质,整个表面镀镍,所述基片分为Ⅰ区(1)和Ⅱ区, 所述Ⅰ区(1)上设有圆孔(8),所述Ⅰ区(1)基片厚度为1±0.1 MM,所述Ⅱ区基片厚度为0.3±0.1 MM,所述Ⅰ区(1)和Ⅱ区连接形成0.7±0.2 MM的台阶,所述Ⅱ区分为a区(21)、b区(22)、c区(23),所述c区(23)分为A端(231)、B端(232)、C端(233)和D端(234);
b、首先采用270度的高温焊膏在基片a区(21)和c区(23)的A端(231)之间粘接输入电容(4),在基片c区(23)的C端(233)和c区(23)的D端(234)之间粘接输出电容(7),在基片c区(23)的B端(232)和c区(23)的D端(234)之间粘接电感(6),再流焊过炉后采用230度的低温焊膏在基片a区(21)上粘接电源管理芯片(3)和在基片b区(22)上粘接肖特基二极管芯片(5)后再一次再流焊过炉;
c、采用金丝对电源管理芯片和肖特二极管进行压焊,先将粘接器件的基片加热到85--90度,然后用金丝焊接电源管理芯片(3)的焊接点和输入电容(4)焊接点,用金丝焊接电源管理芯片(3)的焊接点和电感(6)的焊接点,最后用金丝焊接电感(6)的焊接点和肖特基二极管芯片(5)的焊接点;
d、将压焊好的基片灌封,采用塑封料开模直接灌封,将压焊好的基片放入模具内,然后将环氧树脂加热至180-200度,倒入模具后冷却到常温后,打开模具即可。
2.根据权利要求1所述的一种超小封装的电源模块的封装方法,其特征在于:所述电源管理芯片(3)和肖特基二极管芯片(5)的焊接点均镀银。
3.根据权利要求1或2所述的一种超小封装的电源模块的封装方法,其特征在于:所述金丝为25uM金线。
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