CN103560938A - Industrial Ethernet and HART bus protocol conversion board card - Google Patents
Industrial Ethernet and HART bus protocol conversion board card Download PDFInfo
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Abstract
The invention relates to an industrial Ethernet and HART bus protocol conversion board card. The board card comprises a main control module, an Ethernet communication module and power circuits. The main control module comprises an ARM processor containing control programs, a standard JTAG circuit, a clock circuit and a first communication indication circuit. The Ethernet communication module comprises a network chip, a network transformer, a network port and a second communication indication circuit. The power circuits comprise the 24V-5V power supply circuit and the 5V-3.3V power circuit. The main control module is connected with an instrument through a UART port, the ARM processor is connected with the network chip, and the Ethernet communication module is connected with an industrial interchanger through the network port. According to the board card, signals of an HART network on an industrial site are converted into industrial Ethernet signals, the HART instrument becomes a basic component of the industrial Ethernet, a far-end user can conveniently visit and monitor the HART instrument through the Internet, the structure is small and ingenious, and the board card can be used once inserted.
Description
Technical field
The present invention relates to the monitoring technique to HART field bus instrument, relate in particular to a kind of Industrial Ethernet and HART bus protocol conversion board.
Background technology
The eighties in last century, for meeting industrial requirement, total digitalization, full dispersion, interoperable, open internet---fieldbus have been there is.Being developed so far, also there are many bottleneck problems in fieldbus: existing standard for Fieldbus kind is too much, and respectively has oneself advantage and the scope of application; If there is multiple fieldbus to exist in control system simultaneously, because international standard is released slowly, all kinds of fieldbus adopt different technology, lack each other interconnectivity and interoperability, can not realize transparent connection.
Along with the develop rapidly of IT technology and improving constantly of industrial automation requirement, Industrial Ethernet has become the developing direction that industrial control field is new, have and the remarkable advantage such as be widely used, with low cost, technical resource is abundant, reliability is high, transmission speed is fast, user base is extensive, by all programming languages are supported, software and hardware resources is abundant, be easy to be connected with Internet, realize the seamless link of office automation network and industrial control network, the space of sustainable development is large, existing sensor layer development of applying to industry spot gradually.
Because the HART equipment of industry spot cannot be realized Ethernet and controls, how, in the situation that not changing existing control appliance, promote to greatest extent control performance, make HART instrument be incorporated to Ethernet, become current study hotspot.
Summary of the invention
The object of this invention is to provide a kind of Industrial Ethernet and HART bus protocol conversion board, this conversion board converts the HART bus signals of industry spot to Industrial Ethernet signal, HART field bus instrument and Ethernet miscellaneous equipment are coexisted in same system, be convenient to the monitoring to HART instrument.The design is HART network and Industrial Ethernet bus TT&C system intelligent bus protocol conversion module, this module has parsing and the translation function of HART agreement and Industrial Ethernet TCP/IP, UDP/IP agreement, HART equipment and Industrial Ethernet coexistence be can realize, collection and the transmission of data realized.
The technical scheme that the present invention takes is: a kind of Industrial Ethernet and HART bus protocol conversion board, it is characterized in that: comprise main control module, ethernet communication module and power circuit, main control module comprises the ARM Cortex-M3 processor, standard jtag circuit, the clock circuit that the contain control program indicating circuit of communicating by letter with first; Ethernet communication module comprises network chip, network transformer, network interface and second communication indicating circuit; Power circuit comprises 24V-5V power circuit and 5V-3.3V power circuit; Wherein: described ARM Cortex-M3 processor is connected with standard jtag circuit, clock circuit and the first communication indicating circuit respectively; Main control module is by the UART interface of ARM Cortex-M3 processor and connect HART instrument by HART bus protocol; The network transformer of ethernet communication module is connected with network interface with network chip respectively; Network chip is connected with second communication indicating circuit; Ethernet communication module is connected with the ARM Cortex-M3 processor of main control module by network chip; Ethernet communication module connects industrial switch by network interface and by TCP ∕ IP agreement; 24V-5V power circuit is connected respectively main control module and ethernet communication module with 5V-3.3V power circuit.
The invention has the beneficial effects as follows: the signal of the HART network of industry spot is converted to Industrial Ethernet signal, make HART instrument become the basic element of character of Industrial Ethernet, be convenient to realize remote subscriber and by Internet, HART instrument conducted interviews and monitor, its structure is small and exquisite, plug and play.
Accompanying drawing explanation
Fig. 1 is catenation principle block diagram of the present invention;
Fig. 2 is ARM Cortex-M3 processor chips circuit of the present invention, clock circuit and the first communication indicating circuit schematic diagram;
Fig. 3 is network chip circuit of the present invention, network transformer circuit, network interface and second communication indicating circuit schematic diagram;
Fig. 4 is the UART interface principle figure of standard jtag circuit of the present invention and ARM Cortex-M3 processor;
Fig. 5 is 24V-5V power circuit principle figure of the present invention;
Fig. 6 is 5V-3.3V power circuit principle figure of the present invention;
Fig. 7 is control program flow chart of the present invention.
Embodiment
For a more clear understanding of the present invention, below in conjunction with drawings and Examples, the invention will be further described: with reference to Fig. 1, and HART bus protocol conversion board comprises main control module, ethernet communication module and a power circuit, main control module comprises the ARM Cortex-M3 processor, standard jtag circuit, the clock circuit that the contain control program indicating circuit of communicating by letter with first; Ethernet communication module comprises network chip, network transformer, network interface and second communication indicating circuit; Power circuit comprises 24V-5V power circuit and 5V-3.3V power circuit; Wherein: ARM Cortex-M3 processor is connected with standard jtag circuit, clock circuit and the first communication indicating circuit respectively; Main control module is by the UART interface of ARM Cortex-M3 processor and connect HART instrument by HART bus protocol; The network transformer of ethernet communication module is connected with network interface with network chip respectively; Network chip is connected with second communication indicating circuit; Ethernet communication module is connected with the ARM Cortex-M3 processor of main control module by network chip; Ethernet communication module connects industrial switch by network interface and by TCP ∕ IP agreement; 24V-5V power circuit is connected respectively main control module and ethernet communication module with 5V-3.3V power circuit.
With reference to Fig. 2, Fig. 3 and Fig. 4, ARM Cortex-M3 processor adopting STM32F107VCT6 chip in main control module, network chip in ethernet communication module adopts the DM9161BIEP chip of integrated PHY layer, 67 pin of STM32F107VCT6 chip are connected with 24 pin by resistance R 9, and then be connected with 42 pin of DM9161BIEP chip, 48 pin of STM32F107VCT6 chip, 51 pin, 52 pin are connected with 21 pin, 20 pin, 19 pin of DM9161BIEP chip respectively; 16 pin of STM32F107VCT6 chip, 25 pin, 34 pin are connected with 24 pin, 25 pin, 32 pin of DM9161BIEP chip respectively; 25 pin of DM9161BIEP chip, 32 pin connect 3.3V voltage after contact resistance R22, resistance R 23 respectively; 14 pin of STM32F107VCT6 chip are connected with 40 pin of DM9161BIEP chip; 55 pin of STM32F107VCT6 chip, 56 pin, 57 pin are connected with 37 pin, 29 pin, 28 pin of DM9161BIEP chip respectively; 36 pin of DM9161BIEP chip connect 3.3V voltage by resistance R 21; 41 pin of DM9161BIEP chip, 30 pin, 23 pin connect 3.3V voltage after connecting, and ground connection after being connected with 39 pin, 15 pin, 33 pin, 44 pin, 10 pin of DM9161BIEP chip by capacitor C 11, capacitor C 12, capacitor C 13 respectively; 1 pin of DM9161BIEP chip connects one end of capacitor C 16, capacitor C 17 and inductance L 1 after being connected with 2 pin, behind the other end connection capacitor C 18 of inductance L 1 and one end of capacitor C 19, connect 9 pin of DM9161BIEP chip, ground connection after the other end of the other end of capacitor C 16 and capacitor C 17 is connected with one end of resistance R 15, ground connection after the other end of resistance R 15 is connected with the other end of capacitor C 18 and capacitor C 19; 7 pin of DM9161BIEP chip are connected respectively one end of capacitor C 14, the other end ground connection of capacitor C 14 with 8 pin by resistance R 10, resistance R 11; 3 pin of DM9161BIEP chip are connected respectively one end of capacitor C 15, the other end ground connection of capacitor C 15 with 4 pin by resistance R 12, resistance R 13; 47 pin of DM9161BIEP chip are connected by resistance R 14 with 48 pin; 31 pin of DM9161BIEP chip connect 3.3V voltage by resistance R 16; 86 pin of STM32F107VCT6 chip and 87 pin are connected respectively 8 pin and 7 pin of UART interface J3, and STM32F107VCT6 chip connects HART instrument by UART interface J3 and by HART bus protocol.
Clock circuit in Fig. 2 comprises crystal oscillator Y1 and crystal oscillator Y2, and 12 pin of STM32F107VCT6 chip are connected respectively the two ends of crystal oscillator Y1 and the two ends of resistance R 8 with 13 pin, then connect respectively capacitor C 29 and capacitor C 30, then ground connection; 8 pin of STM32F107VCT6 chip are connected respectively the two ends of crystal oscillator Y2 with 9 pin, then connect respectively capacitor C 31 and capacitor C 32, then ground connection.
In Fig. 2 first communication indicating circuit comprises light-emitting diode D1 and light-emitting diode D2, the positive pole of light-emitting diode D1 and light-emitting diode D2 is connected respectively 35 pin and 36 pin of STM32F107VCT6 chip by resistance R 5, resistance R 6, the negative pole of light-emitting diode D1 and light-emitting diode D2 is ground connection respectively.
Second communication indicating circuit in Fig. 3 comprises light-emitting diode D3, light-emitting diode D4 and light-emitting diode D5, the negative pole of light-emitting diode D3, light-emitting diode D4 and light-emitting diode D5 is connected respectively 11 pin, 12 pin and 13 pin of DM9161BIEP chip, and the positive pole of light-emitting diode D3, light-emitting diode D4 and light-emitting diode D5 connects 3.3V voltage by resistance R 17, resistance R 18, resistance R 19 respectively.
STM32F107VCT6 chip is the ARM Cortex-M3 processor of a MAC of being integrated with layer and network controller, has the advantages such as low-power consumption, low cost, high-performance.The operating voltage of whole chip is 3.3V, is kernel, IO part and peripheral controls power supply.Artificial debugging partly adopts the jtag circuit of standard, can debug and download.MHDR2X5 is serial communication converting interface (see figure 4), and for realizing the UART serial ports of protocol conversion board and being connected of HART instrument UART serial ports, STM32F107VCT6 chip utilizes UART serial ports to realize and the communicating by letter of HART instrument, and follows HART agreement.The PB0 of ARM Cortex-M3 processor is connected LED lamp with PB1 interface, realizes UART serial communication indication, when receiving data and sending data, and the flicker of transmitting-receiving lantern festival.The clock of STM32F107VCT6 chip adopts the crystal oscillator of 25MHz, produces the frequency of 50MHz after the PLL controller frequency division frequency multiplication in chip, and for network chip, DM9161BIEP provides clock.STM32F107VCT6 communicates by letter by RMII Interface realization with network chip DM9161BIEP, RMII is the MII interface of simplifying, in the transmitting-receiving of data, the holding wire that it is a half than MII interface, the network data of utilizing DMA interface to realize more than MAC layer by STM32F107VCT6 chip is received and dispatched.
Fig. 3 is the network transmitting portion of protocol conversion board, and wherein DM9161BIEP is the network chip of integrated PHY layer, and ARM Cortex-M3 processor provides the clock frequency of 50MHz for it, and network chip is connected with STM32F107VCT6 by RMII interface.PH163539 is network transformer, and it is connected with DM9161BIEP chip with network interface respectively, plays the effect of signal isolation.LED3, LED4, LED5 are network chip relay indicating light, are used to indicate the mode of operation of network chip: complete/half-duplex, communication efficient and communication speed.6*1chazhen is network interface and power interface, by 6*1 contact pin, realizes the connection of signal and the power supply of power supply between circuit board.
Standard jtag circuit in Fig. 4 adopts 10pin-Jtag chip, and 1 pin of 10pin-Jtag chip connects 3.3V voltage after being connected with 2 pin; 3 pin of 10pin-Jtag chip connect 14 pin of STM32F107VCT6 chip; 4 pin of 10pin-Jtag chip connect 89 pin of STM32F107VCT6 chip, and 4 pin contact resistance R4 of 10pin-Jtag chip, then connect 3.3V voltage simultaneously; 5 pin of 10pin-Jtag chip, 7 pin, 9 pin are contact resistance R3, resistance R 2, resistance R 1 respectively, then connects 3.3V voltage, and 5 pin, 7 pin, 9 pin of 10pin-Jtag chip connect respectively 77 pin, 72 pin, 76 pin of STM32F107VCT6 chip simultaneously; Ground connection after 6 pin of 10pin-Jtag chip, 8 pin, 10 pin connect.
Network transformer in Fig. 3 adopts PH163539 chip, and 1 pin of PH163539 chip, 3 pin are connected with 7 pin, 8 pin of DM9161BIEP chip respectively; After being connected with 9 pin of DM9161BIEP chip, pass through on 5 pin of PH163539 chip capacitor C 23 ground connection; 6 pin of PH163539 chip, 8 pin are connected with 3 pin, 4 pin of DM9161BIEP chip respectively, and distinguish one end of contact resistance R12, resistance R 13 again, after the other end of resistance R 12, resistance R 13 connects, pass through capacitor C 15 ground connection; 13 pin of PH163539 chip connect one end of capacitor C 20, ground connection after the other end of capacitor C 20 is connected with one end of capacitor C 21, capacitor C 22, ground connection after the other end of capacitor C 21 and capacitor C 22 is connected by resistance R 20.
1 pin of network interface J4 in Fig. 3 connects GND end; 2 pin of network interface J4 connect 24V power supply; 3 pin of network interface J4,4 pin, 5 pin and 6 pin are connected respectively 9 pin, 11 pin, 14 pin and 16 pin of PH163539 chip, and ethernet communication module connects industrial switch by network interface J4 and by TCP ∕ IP agreement.
The network interface of protocol conversion board receives the Ethernet pilot signal of WINCC or opc server, send information to ARM Cortex-M3 processor, processor is analyzed ethernet signal, is converted to HART signal, by serial line interface and HART instrument, communicates.
With reference to Fig. 5,24V-5V power circuit adopts EUP3410 chip, 1 pin of EUP3410 chip is connected with 3 pin by capacitor C 41, then connects respectively one end of inductance L 2 and the negative pole of voltage stabilizing didoe D6, ground connection after the positive pole of voltage stabilizing didoe D6 is connected with one end of capacitor C 42, one end of capacitor C 43; Output 5V voltage after one end of the other end of the other end of the other end of inductance L 2, capacitor C 42, capacitor C 43 and resistance R 23 connects; The other end of resistance R 23 is connected with 5 pin of EUP3410 chip, ground connection after being then connected with one end of capacitor C 33 by resistance R 24 again; The other end of capacitor C 33 is connected with 6 pin of EUP3410 chip by resistance R 25; 7 pin of EUP3410 chip connect 24V power supply by resistance R 26; 2 pin of EUP3410 chip connect 24V power supply after being connected with one end of one end of capacitor C 40, capacitor C 39; Ground connection after the other end of the other end of capacitor C 40 and capacitor C 39 is connected.
With reference to Fig. 6,5V-3.3V power circuit adopts SC2001
-3.3 chips, SC2001
-1 pin of 3.3 chips is connected with 3 pin, and then after being connected with one end of capacitor C 35, one end of capacitor C 34, connects 5V power supply, the other end and the SC2001 of the other end of capacitor C 35, capacitor C 34
-ground connection after 2 pin of 3.3 chips connect; SC2001
-output 3.3V voltage after 5 pin of 3.3 chips are connected with one end of one end of capacitor C 37, capacitor C 38, one end of resistance R 21; SC2001
-ground connection after 4 pin of 3.3 chips are connected with the other end of capacitor C 37, the other end of capacitor C 38 by capacitor C 36; Ground connection after the other end connecting luminous diode D7 of resistance R 21.
Power circuit adopts bus 24V power supply, utilize EUP3410 chip that the 24V power supply of bus is converted to 5V, recycling SG2001-3.3V chip is 3.3V fixed voltage by 5V voltage transitions, by connecting the 3.3V voltage (see figure 2) of a serial capacitors (C44-C45) output, be ethernet communication module and main control module power supply.
With reference to Fig. 7, in ARM Cortex-M3 processor, to transplant and have embedded OS uC/OS-II and built-in network Lwip protocol stack, its control program comprises the steps:
Step 1: first change the initialization of board system, the work clock of ARM Cortex-M3 processor and network chip is set, the UART interface of ARM Cortex-M3 processor is carried out to hardware driving with the network interface being connected with ethernet communication module, then initialization embedded OS uC/OS-II and embedded Lwip protocol stack, utilize embedded OS uC/OS-II to create two management thread.
Step 2: send HART data acquisition command to HART instrument by thread 1, gather master variable and the relevant information of HART instrument, and detect whether receive HART data, if do not receive HART data, thread block, if receive HART data, processes according to HART agreement, read HART instrument useful information, and be stored in ARM Cortex-M3 processor memory.
Step 3: first set up TCP/IP communication with host computer by thread 2, after communication is set up, monitor host computer and whether send TCP/IP data, if do not receive TCP/IP data, thread block, if receive TCP/IP data, analyze the command type of TCP/IP data, if TCP/IP data are acquisition, the data of preserving in ARM Cortex-M3 processor memory are sent to request host computer by network interface, if TCP/IP data are instrument control command, control command are sent to and specify HART instrument.
After system powers on, first program carries out the initialization of whole system, the work clock of ARM Cortex-M3 processor and network chip is set, the UART interface of ARM Cortex-M3 processor is carried out to hardware driving with the network interface being connected with ethernet communication module, initialization embedded OS uC/OS-II and embedded Lwip protocol stack, utilize embedded OS uC/OS-II to create two management thread, thread 1 is realized and being communicated by letter with the periodicity UART of HART instrument, board is per second sends HART data acquisition command to HART instrument, the master variable of acquisition instrument and relevant information, detect and whether receive HART data, do not receive, thread blocks always, receive after data, according to HART agreement reading instrument useful information, and be stored in ARM Cortex-M3 processor memory.Thread 2 is realized the data interaction with host computer, first set up TCP/IP communication with host computer, after communication is set up, monitor host computer and whether send TCP/IP data, do not receive, thread block, receives post analysis command type, and communications command is divided into collection and controls two class instructions, if data acquisition command, the data of preserving in ARM Cortex-M3 processor memory are sent to request host computer by network, if instrument control command sends to control command to specify HART instrument.
According to the above description, in conjunction with art technology, can realize the solution of the present invention.
Claims (10)
1. an Industrial Ethernet and HART bus protocol conversion board, it is characterized in that: comprise main control module, ethernet communication module and power circuit, main control module comprises the ARM Cortex-M3 processor, standard jtag circuit, the clock circuit that the contain control program indicating circuit of communicating by letter with first; Ethernet communication module comprises network chip, network transformer, network interface and second communication indicating circuit; Power circuit comprises 24V-5V power circuit and 5V-3.3V power circuit; Wherein: described ARM Cortex-M3 processor is connected with standard jtag circuit, clock circuit and the first communication indicating circuit respectively; Main control module is by the UART interface of ARM Cortex-M3 processor and connect HART instrument by HART bus protocol; The network transformer of ethernet communication module is connected with network interface with network chip respectively; Network chip is connected with second communication indicating circuit; Ethernet communication module is connected with the ARM Cortex-M3 processor of main control module by network chip; Ethernet communication module connects industrial switch by network interface and by TCP ∕ IP agreement; 24V-5V power circuit is connected respectively main control module and ethernet communication module with 5V-3.3V power circuit.
2. a kind of Industrial Ethernet as claimed in claim 1 and HART bus protocol are changed board, it is characterized in that: the ARM Cortex-M3 processor adopting STM32F107VCT6 chip in described main control module, network chip in ethernet communication module adopts the DM9161BIEP chip of integrated PHY layer, 67 pin of STM32F107VCT6 chip are connected with 24 pin by resistance R 9, and then be connected with 42 pin of DM9161BIEP chip, 48 pin of STM32F107VCT6 chip, 51 pin, 52 pin are connected with 21 pin, 20 pin, 19 pin of DM9161BIEP chip respectively; 16 pin of STM32F107VCT6 chip, 25 pin, 34 pin are connected with 24 pin, 25 pin, 32 pin of DM9161BIEP chip respectively; 25 pin of DM9161BIEP chip, 32 pin connect 3.3V voltage after contact resistance R22, resistance R 23 respectively; 14 pin of STM32F107VCT6 chip are connected with 40 pin of DM9161BIEP chip; 55 pin of STM32F107VCT6 chip, 56 pin, 57 pin are connected with 37 pin, 29 pin, 28 pin of DM9161BIEP chip respectively; 36 pin of DM9161BIEP chip connect 3.3V voltage by resistance R 21; 41 pin of DM9161BIEP chip, 30 pin, 23 pin connect 3.3V voltage after connecting, and ground connection after being connected with 39 pin, 15 pin, 33 pin, 44 pin, 10 pin of DM9161BIEP chip by capacitor C 11, capacitor C 12, capacitor C 13 respectively; 1 pin of DM9161BIEP chip connects one end of capacitor C 16, capacitor C 17 and inductance L 1 after being connected with 2 pin, behind the other end connection capacitor C 18 of inductance L 1 and one end of capacitor C 19, connect 9 pin of DM9161BIEP chip, ground connection after the other end of the other end of capacitor C 16 and capacitor C 17 is connected with one end of resistance R 15, ground connection after the other end of resistance R 15 is connected with the other end of capacitor C 18 and capacitor C 19; 7 pin of DM9161BIEP chip are connected respectively one end of capacitor C 14, the other end ground connection of capacitor C 14 with 8 pin by resistance R 10, resistance R 11; 3 pin of DM9161BIEP chip are connected respectively one end of capacitor C 15, the other end ground connection of capacitor C 15 with 4 pin by resistance R 12, resistance R 13; 47 pin of DM9161BIEP chip are connected by resistance R 14 with 48 pin; 31 pin of DM9161BIEP chip connect 3.3V voltage by resistance R 16; 86 pin of STM32F107VCT6 chip and 87 pin are connected respectively 8 pin and 7 pin of UART interface J3, and STM32F107VCT6 chip connects HART instrument by UART interface J3 and by HART bus protocol.
3. a kind of Industrial Ethernet as claimed in claim 2 and HART bus protocol are changed board, it is characterized in that: described clock circuit comprises crystal oscillator Y1 and crystal oscillator Y2,12 pin of STM32F107VCT6 chip are connected respectively the two ends of crystal oscillator Y1 and the two ends of resistance R 8 with 13 pin, connect respectively again capacitor C 29 and capacitor C 30, then ground connection; 8 pin of STM32F107VCT6 chip are connected respectively the two ends of crystal oscillator Y2 with 9 pin, then connect respectively capacitor C 31 and capacitor C 32, then ground connection.
4. a kind of Industrial Ethernet as claimed in claim 2 and HART bus protocol are changed board, it is characterized in that: described the first communication indicating circuit comprises that the positive pole of light-emitting diode D1, light-emitting diode D2, light-emitting diode D1 and light-emitting diode D2 is connected respectively 35 pin and 36 pin of STM32F107VCT6 chip by resistance R 5, resistance R 6, and the negative pole of light-emitting diode D1 and light-emitting diode D2 is ground connection respectively; Described second communication indicating circuit comprises light-emitting diode D3, light-emitting diode D4 and light-emitting diode D5, the negative pole of light-emitting diode D3, light-emitting diode D4 and light-emitting diode D5 is connected respectively 11 pin, 12 pin and 13 pin of DM9161BIEP chip, and the positive pole of light-emitting diode D3, light-emitting diode D4 and light-emitting diode D5 connects 3.3V voltage by resistance R 17, resistance R 18, resistance R 19 respectively.
5. a kind of Industrial Ethernet as claimed in claim 2 and HART bus protocol conversion board, is characterized in that: described standard jtag circuit adopts 10pin-Jtag chip, and 1 pin of 10pin-Jtag chip connects 3.3V voltage after being connected with 2 pin; 3 pin of 10pin-Jtag chip connect 14 pin of STM32F107VCT6 chip; 4 pin of 10pin-Jtag chip connect 89 pin of STM32F107VCT6 chip, and 4 pin contact resistance R4 of 10pin-Jtag chip, then connect 3.3V voltage simultaneously; 5 pin of 10pin-Jtag chip, 7 pin, 9 pin are contact resistance R3, resistance R 2, resistance R 1 respectively, then connects 3.3V voltage, and 5 pin, 7 pin, 9 pin of 10pin-Jtag chip connect respectively 77 pin, 72 pin, 76 pin of STM32F107VCT6 chip simultaneously; Ground connection after 6 pin of 10pin-Jtag chip, 8 pin, 10 pin connect.
6. a kind of Industrial Ethernet as claimed in claim 2 and HART bus protocol conversion board, is characterized in that: described network transformer adopts PH163539 chip, and 1 pin of PH163539 chip, 3 pin are connected with 7 pin, 8 pin of DM9161BIEP chip respectively; After being connected with 9 pin of DM9161BIEP chip, pass through on 5 pin of PH163539 chip capacitor C 23 ground connection; 6 pin of PH163539 chip, 8 pin are connected with 3 pin, 4 pin of DM9161BIEP chip respectively, and distinguish one end of contact resistance R12, resistance R 13 again, after the other end of resistance R 12, resistance R 13 connects, pass through capacitor C 15 ground connection; 13 pin of PH163539 chip connect one end of capacitor C 20, ground connection after the other end of capacitor C 20 is connected with one end of capacitor C 21, capacitor C 22, ground connection after the other end of capacitor C 21 and capacitor C 22 is connected by resistance R 20.
7. a kind of Industrial Ethernet as claimed in claim 6 and HART bus protocol conversion board, is characterized in that: 1 pin of described network interface J4 connects GND end; 2 pin of network interface J4 connect 24V power supply; 3 pin of network interface J4,4 pin, 5 pin and 6 pin are connected respectively 9 pin, 11 pin, 14 pin and 16 pin of PH163539 chip, and ethernet communication module connects industrial switch by network interface J4 and by TCP ∕ IP agreement.
8. a kind of Industrial Ethernet as claimed in claim 1 and HART bus protocol are changed board, it is characterized in that: described 24V-5V power circuit adopts EUP3410 chip, 1 pin of EUP3410 chip is connected with 3 pin by capacitor C 41, connect respectively again one end of inductance L 2 and the negative pole of voltage stabilizing didoe D6, ground connection after the positive pole of voltage stabilizing didoe D6 is connected with one end of capacitor C 42, one end of capacitor C 43; Output 5V voltage after one end of the other end of the other end of the other end of inductance L 2, capacitor C 42, capacitor C 43 and resistance R 23 connects; The other end of resistance R 23 is connected with 5 pin of EUP3410 chip, ground connection after being then connected with one end of capacitor C 33 by resistance R 24 again; The other end of capacitor C 33 is connected with 6 pin of EUP3410 chip by resistance R 25; 7 pin of EUP3410 chip connect 24V power supply by resistance R 26; 2 pin of EUP3410 chip connect 24V power supply after being connected with one end of one end of capacitor C 40, capacitor C 39; Ground connection after the other end of the other end of capacitor C 40 and capacitor C 39 is connected.
9. a kind of Industrial Ethernet as claimed in claim 1 and HART bus protocol conversion board, is characterized in that: described 5V-3.3V power circuit adopts SC2001
-3.3 chips, SC2001
-1 pin of 3.3 chips is connected with 3 pin, and then after being connected with one end of capacitor C 35, one end of capacitor C 34, connects 5V power supply, the other end and the SC2001 of the other end of capacitor C 35, capacitor C 34
-ground connection after 2 pin of 3.3 chips connect; SC2001
-output 3.3V voltage after 5 pin of 3.3 chips are connected with one end of one end of capacitor C 37, capacitor C 38, one end of resistance R 21; SC2001
-ground connection after 4 pin of 3.3 chips are connected with the other end of capacitor C 37, the other end of capacitor C 38 by capacitor C 36; Ground connection after the other end connecting luminous diode D7 of resistance R 21.
10. a kind of Industrial Ethernet as claimed in claim 1 and HART bus protocol are changed board, it is characterized in that: in described ARM Cortex-M3 processor, transplant and have embedded OS uC/OS-II and built-in network Lwip protocol stack, its control program comprises the steps:
Step 1: first change the initialization of board system, the work clock of ARM Cortex-M3 processor and network chip is set, the UART interface of ARM Cortex-M3 processor is carried out to hardware driving with the network interface being connected with ethernet communication module, then initialization embedded OS uC/OS-II and embedded Lwip protocol stack, utilize embedded OS uC/OS-II to create two management thread;
Step 2: send HART data acquisition command to HART instrument by thread 1, gather master variable and the relevant information of HART instrument, and detect whether receive HART data, if do not receive HART data, thread block, if receive HART data, processes according to HART agreement, read HART instrument useful information, and be stored in ARM Cortex-M3 processor memory;
Step 3: first set up TCP/IP communication with host computer by thread 2, after communication is set up, monitor host computer and whether send TCP/IP data, if do not receive TCP/IP data, thread block, if receive TCP/IP data, analyze the command type of TCP/IP data, if TCP/IP data are acquisition, the data of preserving in ARM Cortex-M3 processor memory are sent to request host computer by network interface, if TCP/IP data are instrument control command, control command are sent to and specify HART instrument.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103973416A (en) * | 2014-05-15 | 2014-08-06 | 无锡信捷电气股份有限公司 | Improved-LwIP-based Ethernet anti-congestion method for multiple embedded visual systems |
| CN107391409A (en) * | 2016-05-17 | 2017-11-24 | 新华三技术有限公司 | A kind of PCI-E network controllers, the network equipment and data transmission method |
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| CN107391409B (en) * | 2016-05-17 | 2020-02-18 | 新华三技术有限公司 | PCI-E network controller, network equipment and data transmission method |
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