CN103531642A - Schottky device provided with groove terminal structures and preparation method thereof - Google Patents
Schottky device provided with groove terminal structures and preparation method thereof Download PDFInfo
- Publication number
- CN103531642A CN103531642A CN201210242398.0A CN201210242398A CN103531642A CN 103531642 A CN103531642 A CN 103531642A CN 201210242398 A CN201210242398 A CN 201210242398A CN 103531642 A CN103531642 A CN 103531642A
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- Prior art keywords
- junction
- metal
- schottky
- schottky barrier
- layer
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- 238000002360 preparation method Methods 0.000 title claims description 7
- 239000004065 semiconductor Substances 0.000 claims abstract description 43
- 238000004519 manufacturing process Methods 0.000 claims abstract description 9
- 238000001259 photo etching Methods 0.000 claims abstract description 4
- 230000004888 barrier function Effects 0.000 claims description 48
- 239000002184 metal Substances 0.000 claims description 46
- 229910052751 metal Inorganic materials 0.000 claims description 46
- 239000000758 substrate Substances 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 17
- 238000000151 deposition Methods 0.000 claims description 7
- 238000005260 corrosion Methods 0.000 claims description 6
- 230000007797 corrosion Effects 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 6
- 238000005516 engineering process Methods 0.000 claims description 5
- 230000003628 erosive effect Effects 0.000 claims description 4
- 238000001465 metallisation Methods 0.000 claims description 4
- 238000002161 passivation Methods 0.000 claims description 4
- 238000005245 sintering Methods 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims description 2
- 239000012774 insulation material Substances 0.000 claims 1
- 239000007769 metal material Substances 0.000 claims 1
- 150000004767 nitrides Chemical class 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 7
- 230000005684 electric field Effects 0.000 abstract 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 14
- 239000002210 silicon-based material Substances 0.000 description 8
- 239000000377 silicon dioxide Substances 0.000 description 7
- 235000012239 silicon dioxide Nutrition 0.000 description 7
- 238000001459 lithography Methods 0.000 description 4
- 125000004437 phosphorous atom Chemical group 0.000 description 4
- 229910021332 silicide Inorganic materials 0.000 description 4
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 4
- 239000004020 conductor Substances 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000005530 etching Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/47—Schottky barrier electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The invention discloses a Schottky device provided with groove terminal structures. The semiconductor device provided by the invention comprises a terminal provided with a Schottky structure. In the process of reverse bias, the concentration of the device in a Schottky edge electric field is alleviated through the floated Schottky structure; the manufacturing processes of the device are simplified; and by adopting a photoetching process for two times, production and manufacturing of the device are realized.
Description
Technical field
The present invention relates to a kind of schottky device with Schottky terminal structure, the invention still further relates to a kind of preparation method with the schottky device of Schottky terminal structure.
Background technology
Power semiconductor is by being used in power management and application of power in a large number, and the semiconductor device that specially refers to schottky junction has become the important trend that device develops, and schottky device has the advantages such as the low unlatching turn-off speed of forward cut-in voltage is fast.
Schottky diode can be manufactured by multiple different topology, and the most frequently used is plane figure, and traditional planer schottky diode has comparatively complicated manufacturing process, needs third photo etching etching process to complete the manufacturing of device.
Summary of the invention
The present invention is directed to the problems referred to above and propose, a kind of schottky device with Schottky terminal structure and preparation method thereof is provided.
A schottky device with Schottky terminal structure, is characterized in that: comprising: substrate layer is the first conduction type semi-conducting material; Drift layer, is the semi-conducting material of the first conduction type, is positioned on substrate layer; Main junction Schottky barrier junction, is positioned at drift layer surface, device center, surface coverage electrode metal; One or more secondary junction Schottky barrier junctions, the drift layer that is positioned at main junction Schottky barrier junction edge is surperficial, and surface coverage has floating empty metal, and secondary junction Schottky barrier junction is not connected with main junction Schottky barrier junction, between secondary junction Schottky barrier junction, is not connected; Insulating barrier, is insulating material, on the drift layer surface between main junction Schottky barrier junction and secondary junction Schottky barrier junction and between a plurality of secondary junction Schottky barrier junction; Back metal, is positioned at the substrate layer back side.
A preparation method for the schottky device of Schottky terminal structure, is characterized in that: the semiconductor material layer that comprises the steps: to form by epitaxial growth the first conduction type on substrate layer; On surface, form passivation layer, erosion removal part passivation layer; At device surface deposit barrier metal, carry out sintering and form schottky barrier junction; Upper surface deposition of electrode metal, carries out photoetching corrosion and removes partial electrode metal; Carry out back side metallization technology, at the substrate layer back side, form back metal.
Semiconductor device of the present invention has the terminal of Schottky junction structure, not using the second electric conducting material as schottky device terminal structure, but while slowing down device reverse biased by floating empty Schottky junction structure the concentrating of Schottky fringe field, simplified the manufacturing process of device; Stop traditional devices second electric conducting material when forward conduction simultaneously and to drift region, injected a large amount of few sons, improved device in the performance of frequency applications.
Accompanying drawing explanation
Fig. 1 is a kind of schottky device generalized section with Schottky terminal structure of the present invention;
Fig. 2 is a kind of schottky device generalized section with Schottky terminal structure of the present invention.
Wherein,
1, substrate layer;
2, silicon dioxide;
3, the first conductive semiconductor material;
5, main junction Schottky barrier junction;
6, secondary junction Schottky barrier junction;
10, upper surface metal level;
11, lower surface metal layer.
Embodiment
Fig. 1 is a kind of schottky device profile with Schottky terminal structure of the present invention, below in conjunction with Fig. 1, describes semiconductor device of the present invention in detail.
A schottky device with Schottky terminal structure, comprising: substrate layer 1 is N conductive type semiconductor silicon materials, and the doping content of phosphorus atoms is 1E19/CM
3, at substrate layer 1 lower surface, by lower surface metal layer 11 extraction electrodes; The first conductive semiconductor material 3, is positioned on substrate layer 1, is the semiconductor silicon material of N conduction type, and the doping content of phosphorus atoms is 1E16/CM
3; Main junction Schottky barrier junction 5, is positioned at the surface of the first conductive semiconductor material 3, is the silicide that semiconductor silicon material and barrier metal form, and width is 300um; Secondary junction Schottky barrier junction 6, is positioned at the edge surface of the first conductive semiconductor material 3, is semiconductor silicon material and the silicide of barrier metal formation, and three secondary junction Schottky barrier junction 6 width are 2um, and spacing is 5um; Silicon dioxide 2, is positioned at the first conductive semiconductor material 3 surfaces; Device upper surface is with upper surface metal level 10, for device is drawn another electrode.
Its manufacture craft comprises the steps:
The first step, forms the first conductive semiconductor material layer 3 in the surperficial extension of substrate layer 1;
Second step, surface deposition silicon dioxide 2, carries out lithography corrosion process, and semiconductor material surface is removed part silicon dioxide 2;
The 3rd step, at semiconductor material surface deposit barrier metal, carries out sintering and forms schottky barrier junction 5;
The 4th step, forms upper surface metal level at surface deposition metal, carries out lithography corrosion process erosion removal surface part metals, forms upper surface metal level 10;
The 5th step; Carry out back side metallization technology, form overleaf lower surface metal layer 11, device architecture as shown in Figure 1.
Fig. 2 is a kind of schottky device profile with Schottky terminal structure of the present invention, below in conjunction with Fig. 2, describes semiconductor device of the present invention in detail.
A schottky device with Schottky terminal structure, comprising: substrate layer 1 is N conductive type semiconductor silicon materials, and the doping content of phosphorus atoms is 1E19/CM
3, at substrate layer 1 lower surface, by lower surface metal layer 11 extraction electrodes; The first conductive semiconductor material 3, is positioned on substrate layer 1, is the semiconductor silicon material of N conduction type, and the doping content of phosphorus atoms is 1E16/CM
3; Main junction Schottky barrier junction 5, is positioned at the surface of the first conductive semiconductor material 3, is the silicide that semiconductor silicon material and barrier metal form, and width is 300um; Secondary junction Schottky barrier junction 6, is positioned at the edge surface of the first conductive semiconductor material 3, is semiconductor silicon material and the silicide of barrier metal formation, and five secondary junction Schottky barrier junction 6 width are 3um, and spacing is followed successively by 3um, 4um, 4um, 4um and 4um; Silicon dioxide 2, is positioned at the first conductive semiconductor material 3 surfaces; Device upper surface is with upper surface metal level 10, for device is drawn another electrode.
Its manufacture craft comprises the steps:
The first step, forms the first conductive semiconductor material layer 3 in the surperficial extension of substrate layer 1;
Second step, surface deposition silicon dioxide 2, carries out lithography corrosion process, and semiconductor material surface is removed part silicon dioxide 2;
The 3rd step, at semiconductor material surface deposit barrier metal, carries out sintering and forms schottky barrier junction 5;
The 4th step, forms upper surface metal level at surface deposition metal, carries out lithography corrosion process erosion removal surface part metals, forms upper surface metal level 10;
The 5th step; Carry out back side metallization technology, form overleaf lower surface metal layer 11, device architecture as shown in Figure 2.
By above-mentioned example, set forth the present invention, also can adopt other example to realize the present invention, the present invention is not limited to above-mentioned instantiation, so the present invention is by claims circumscription simultaneously.
Claims (10)
1. a schottky device with Schottky terminal structure, is characterized in that: comprising:
Substrate layer is the first conduction type semi-conducting material;
Drift layer, is the semi-conducting material of the first conduction type, is positioned on substrate layer;
Main junction Schottky barrier junction, is positioned at drift layer surface, device center, surface coverage electrode metal; One or more
Secondary junction Schottky barrier junction, the drift layer that is positioned at main junction Schottky barrier junction edge is surperficial, and surface coverage has floating empty metal, and secondary junction Schottky barrier junction is not connected with main junction Schottky barrier junction, between secondary junction Schottky barrier junction, is not connected;
Insulating barrier, is insulating material, on the drift layer surface between main junction Schottky barrier junction and secondary junction Schottky barrier junction and between a plurality of secondary junction Schottky barrier junction;
Back metal, is positioned at the substrate layer back side.
2. semiconductor device as claimed in claim 1, is characterized in that: described main junction Schottky barrier junction can have identical barrier height with secondary junction Schottky barrier junction.
3. semiconductor device as claimed in claim 1, is characterized in that: described electrode metal can be identical metal material layer with floating empty metal.
4. semiconductor device as claimed in claim 1, is characterized in that: described electrode metal is not connected with floating empty metal.
5. semiconductor device as claimed in claim 1, is characterized in that: described electrode metal can form field plate structure with floating empty metal.
6. semiconductor device as claimed in claim 1, is characterized in that: described insulating barrier can be oxide or nitride insulation material formation.
7. semiconductor device as claimed in claim 1, is characterized in that: the main junction Schottky barrier junction edge at described device center is insulated layer parcel.
8. semiconductor device as claimed in claim 1, is characterized in that: the main junction Schottky barrier junction at described device center is surrounded by one or more secondary junction Schottky barrier junctions.
9. a kind of preparation method with the schottky device of Schottky terminal structure as claimed in claim 1, is characterized in that: comprise the steps:
1) on substrate layer, by epitaxial growth, form the semiconductor material layer of the first conduction type;
2) on surface, form passivation layer, erosion removal part passivation layer;
3), at device surface deposit barrier metal, carry out sintering and form schottky barrier junction;
4) upper surface deposition of electrode metal, carries out photoetching corrosion and removes partial electrode metal;
5) carry out back side metallization technology, at the substrate layer back side, form back metal.
10. the preparation method of semiconductor device claimed in claim 9, is characterized in that: described barrier metal and electrode metal can be identical metal level, realizes the manufacture of device by upper surface metal depositing technics.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210242398.0A CN103531642A (en) | 2012-07-02 | 2012-07-02 | Schottky device provided with groove terminal structures and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210242398.0A CN103531642A (en) | 2012-07-02 | 2012-07-02 | Schottky device provided with groove terminal structures and preparation method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103531642A true CN103531642A (en) | 2014-01-22 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210242398.0A Pending CN103531642A (en) | 2012-07-02 | 2012-07-02 | Schottky device provided with groove terminal structures and preparation method thereof |
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| Country | Link |
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| CN (1) | CN103531642A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115084231A (en) * | 2022-07-19 | 2022-09-20 | 浙江大学 | Diode and manufacturing method thereof |
-
2012
- 2012-07-02 CN CN201210242398.0A patent/CN103531642A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115084231A (en) * | 2022-07-19 | 2022-09-20 | 浙江大学 | Diode and manufacturing method thereof |
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Application publication date: 20140122 |