CN103529339A - Circuit interface and state monitoring IED - Google Patents
Circuit interface and state monitoring IED Download PDFInfo
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- CN103529339A CN103529339A CN201310530170.6A CN201310530170A CN103529339A CN 103529339 A CN103529339 A CN 103529339A CN 201310530170 A CN201310530170 A CN 201310530170A CN 103529339 A CN103529339 A CN 103529339A
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Abstract
The embodiment of the invention provides a circuit interface and a state monitoring IED (Intelligent Electronic Device). The circuit interface comprises a signal control FPGA (Field Programmable Gate Array), a signal conversion module, a power output selection module, a double-power regulating module, a single-power regulating module and a terminal set, wherein one ends of the double-power regulating module and the single-power regulating module are externally connected with a DC (Direct Current) power supply and the other ends of the double-power regulating module and the single-power regulating module are connected with the power output selection module; the terminal set is sequentially connected with the power output selection module, the signal conversion module and the FPGA; the FPGA controls the power output selection module to select the double-power regulating module or the single-power regulating module to receive the direct current input by the DC power supply, and the direct current is output by the terminal set or is transmitted to the FPGA by the signal conversion module; the FPGA receives an analog signal or a digital signal from the terminal set through controlling on/off of an analog input module and a digital input module inside the signal conversion module. The circuit interface enables the state monitoring IED to be flexibly upgraded.
Description
Technical field
The present invention relates to intelligent grid field, relate in particular a kind of circuit interface and status monitoring IED.
Background technology
Intelligent grid be the physics electrical network that comprises various generating sets, transmission and distribution networks, consumer and energy storage device be basis, by modern advanced sensing measurement technology, network technology, mechanics of communication, computing technique, robotization and intelligent control technology etc. and the novel power grid of formation integrated with physics grid height.Therefore, in intelligent grid, the Condition Monitoring Data of various mechanisms, equipment just becomes the foundation that control core sends instruction or takes counter-measure.
The pattern generally adopting is at present exactly by IED(Intelligent Electronic Device, intelligent electronic device) different in equipment, special-purpose circuit interface gathers various alternating current-direct current sensor signals, as current interface gathers current signal, voltage interface gathers voltage signal, signal acquisition range is fixed and can not be obscured use, once the function change of equipment, such as signal amplitude or frequency change, or the character change of signal, or the type change of sensor, the IED equipment of being responsible for so this part status monitoring just needs to eliminate to change, can not upgrade flexibly.
Summary of the invention
In view of this, the defect that can not upgrade flexibly in order to solve existing IED equipment, provides a kind of circuit interface and status monitoring IED, and technical scheme is as follows:
A kind of circuit interface, be applied to status monitoring IED, described status monitoring IED comprises signal controlling programmable gate array FPGA, and described circuit interface comprises signal conversion module, power supply output selection module, dual power supply adjusting module, single supply adjusting module, terminals subgroup;
One end external direct current power supply of described dual power supply adjusting module, the other end selects module to be connected with described power supply output, the external described direct supply in one end of described single supply adjusting module, the other end selects module to be connected with described power supply output, and described terminals subgroup selects module, described signal conversion module, described signal controlling FPGA to be connected with described power supply output successively;
Described power supply output selects module after receiving the power supply steering order of described signal controlling FPGA, according to described power supply steering order, select described dual power supply adjusting module or single supply adjusting module to receive the direct current of described direct supply input, by described terminals subgroup, export, or by described power supply output, select module, described signal conversion module to transfer to described signal controlling FPGA successively;
Described signal conversion module is after the signal controlling instruction that receives described signal controlling FPGA, according to described signal controlling instruction, control the analog input module of described signal conversion module inside and the break-make of digital quantity input module, from described terminals subgroup, receive simulating signal or digital signal.
Preferably, in above-mentioned circuit interface, described terminals subgroup comprises three connection terminals, is respectively the first connection terminal, the second connection terminal, the 3rd connection terminal, described the second connection terminal ground signalling;
Described single supply adjusting module is connected with described the second connection terminal with described the first connection terminal,
Described dual power supply adjusting module is connected with described the first connection terminal, the second connection terminal, the 3rd connection terminal.
Preferably, in above-mentioned circuit interface, described analog input module comprises analog switch, current collection circuit, and/or, voltage collection circuit;
Described current collection circuit comprises and the variable resistor being connected successively, voltage follower, photoelectric coupled circuit;
Described voltage collection circuit comprises and the transition pipe being connected successively, instrument amplifier circuit;
When gathering current signal, described analog switch switches to described current collection circuit, and when gathering voltage signal, described analog switch switches to described voltage collection circuit.
Preferably, in above-mentioned circuit interface, described digital quantity input module comprises:
The dropping resistor circuit connecting successively, high-frequency filter circuit, optocoupler voltage isolation circuit;
Described optocoupler voltage isolation circuit is connected with described signal processing circuit.
Preferably, in above-mentioned circuit interface, described analog input module also comprises:
Between described current collection circuit and described analog switch, the current transformer being connected with described current collection circuit;
Between described voltage collection circuit and described analog switch, the voltage transformer (VT) being connected with described voltage collection circuit.
An IED, comprises signal controlling programmable gate array FPGA, also comprises:
At least one road circuit interface being connected with described programmable gate array FPGA, described circuit interface comprises signal conversion module, power supply output selection module, dual power supply adjusting module, single supply adjusting module, terminals subgroup;
One end external direct current power supply of described dual power supply adjusting module, the other end selects module to be connected with described power supply output, the external described direct supply in one end of described single supply adjusting module, the other end selects module to be connected with described power supply output, and described terminals subgroup selects module, described signal conversion module, described signal controlling FPGA to be connected with described power supply output successively;
Described power supply output selects module after receiving the power supply steering order of described signal controlling FPGA, according to described power supply steering order, select described dual power supply adjusting module or single supply adjusting module to receive the direct current of described direct supply input, by described terminals subgroup, export, or by described power supply output, select module, described signal conversion module to transfer to described signal controlling FPGA successively;
Described signal conversion module is after the signal controlling instruction that receives described signal controlling FPGA, according to described signal controlling instruction, control the analog input module of described signal conversion module inside and the break-make of digital quantity input module, from described terminals subgroup, receive simulating signal or digital signal.
Preferably, in above-mentioned status monitoring IED, described terminals subgroup comprises three connection terminals, is respectively the first connection terminal, the second connection terminal, the 3rd connection terminal, described the second connection terminal ground signalling;
Described single supply adjusting module is connected with described the second connection terminal with described the first connection terminal,
Described dual power supply adjusting module is connected with described the first connection terminal, the second connection terminal, the 3rd connection terminal.
Preferably, in above-mentioned status monitoring IED, described analog input module comprises analog switch, current collection circuit, and/or, voltage collection circuit;
Described current collection circuit comprises and the variable resistor being connected successively, voltage follower, photoelectric coupled circuit;
Described voltage collection circuit comprises and the transition pipe being connected successively, instrument amplifier circuit;
When gathering current signal, described analog switch switches to described current collection circuit, and when gathering voltage signal, described analog switch switches to described voltage collection circuit.
Preferably, in above-mentioned status monitoring IED, described digital quantity input module comprises:
The dropping resistor circuit connecting successively, high-frequency filter circuit, optocoupler voltage isolation circuit;
Described optocoupler voltage isolation circuit is connected with described signal processing circuit.
Preferably, in above-mentioned status monitoring IED, described analog input module also comprises:
Between described current collection circuit and described analog switch, the current transformer being connected with described current collection circuit;
Between described voltage collection circuit and described analog switch, the voltage transformer (VT) being connected with described voltage collection circuit.
Known via above-mentioned technical scheme, compared with prior art, circuit interface in the embodiment of the present invention can external direct current power supply, by dual power supply adjusting module or single supply adjusting module the input or output current signal, can also accept simulation and/or digital signal by signal conversion module, therefore signal controlling FPGA can be according to concrete configuration, realize electric current, the access of analog and digital signal, thereby realize the unitized detection of variety classes signal, if the character change of signal, or the type change of sensor, the IED equipment of being responsible for this part status monitoring so can be upgraded flexibly, do not need to eliminate and change.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only embodiments of the invention, for those of ordinary skills, do not paying under the prerequisite of creative work, other accompanying drawing can also be provided according to the accompanying drawing providing.
A kind of structural representation of the circuit interface that Fig. 1 provides for the embodiment of the present invention;
A kind of structural representation of the analog input module that Fig. 2 provides for the embodiment of the present invention;
A kind of structural representation of the digital quantity input module that Fig. 3 provides for the embodiment of the present invention;
A kind of structural representation of the status monitoring IED that Fig. 4 provides for the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
Referring to Fig. 1, the embodiment of the present invention provides a kind of circuit interface, is applied to status monitoring IED, and status monitoring IED comprises signal controlling programmable gate array FPGA; Circuit interface comprises signal conversion module, power supply output selection module, dual power supply adjusting module, single supply adjusting module, terminals subgroup;
One end external direct current power supply of dual power supply adjusting module, the other end selects module to be connected with power supply output, one end external direct current power supply of single supply adjusting module, the other end selects module to be connected with power supply output, and terminals subgroup is connected with power supply output selection module, signal conversion module successively, signal controlling FPGA connects;
Power supply output selects module after receiving the power supply steering order of signal controlling FPGA, according to power supply steering order, select dual power supply adjusting module or single supply adjusting module to receive the direct current of direct supply input, by terminals subgroup, export, or transfer to signal controlling FPGA by signal conversion module;
Signal conversion module is after the signal controlling instruction that receives signal controlling FPGA, according to the analog input module of signal controlling instruction control signal modular converter inside and the break-make of digital quantity input module, from terminals subgroup, receive simulating signal or digital signal.
Circuit interface in the embodiment of the present invention can external direct current power supply, by dual power supply adjusting module or single supply adjusting module the input or output current signal, can also accept simulation and/or digital signal by signal conversion module, therefore signal controlling FPGA can be according to concrete configuration, realize electric current, the access of analog and digital signal, thereby realize the unitized detection of variety classes signal, if the character change of signal, or the type change of sensor, the IED equipment of being responsible for this part status monitoring so can be upgraded flexibly, do not need to eliminate and change.
Referring to Fig. 1-3, a kind of structural representation of the circuit interface that Fig. 1 provides for the embodiment of the present invention, a kind of structural representation of analog input module in the circuit interface that Fig. 2 provides for the embodiment of the present invention, a kind of structural representation of digital quantity input module in the circuit interface that Fig. 3 provides for the embodiment of the present invention.Circuit interface is applied to status monitoring IED, and status monitoring IED comprises signal controlling programmable gate array FPGA; Circuit interface comprises signal conversion module 110, power supply output selection module 120, dual power supply adjusting module 140, single supply adjusting module 150, terminals subgroup 130.
One end external direct current power supply of dual power supply adjusting module 140, the other end selects module 120 to be connected with power supply output, one end external direct current power supply of single supply adjusting module 150, the other end selects module 120 to be connected with power supply output, and terminals subgroup 130 selects module 120, signal conversion module 110, signal controlling FPGA to be connected with power supply output successively.
Power supply output selects module 120 after receiving the power supply steering order of signal controlling FPGA, according to power supply steering order, select dual power supply adjusting module 140 or single supply adjusting module 150 to receive the direct current of direct supply input, by 130 outputs of terminals subgroup, or by power supply, export and select module 120, signal conversion module 110 to transfer to signal controlling FPGA successively.
Further, terminals subgroup comprises three connection terminals, is respectively the first connection terminal, the second connection terminal, the 3rd connection terminal, the second connection terminal ground signalling; Single supply adjusting module is connected with the second connection terminal with the first connection terminal, and dual power supply adjusting module is connected with the first connection terminal, the second connection terminal, the 3rd connection terminal.Terminals subgroup comprises three connection terminals, different according to the condition of the signal type difference of input and signal generation, can be by signal controlling FPGA be arranged, signal type comprises the various conventional industry standard signal such as 0～50mA, 4～20mA ,+-10V, 0～5V ,+-5V, DC220V, AC220V, is divided into two kinds of patterns: when electric source modes being externally provided and internally providing power supply.When externally providing power supply, signal controlling FPGA controls power supply output and selects module to select dual power supply adjusting module or single supply adjusting module, receives the direct current of direct supply input, and exports by terminals subgroup; When internally providing power supply, signal controlling FPGA controls power supply output and selects module to select dual power supply adjusting module or single supply adjusting module, receives the direct current of direct supply input, and transfers to signal controlling FPGA by signal conversion module.
Further, while externally providing electric source modes, the DC24V coming from Switching Power Supply plate after filtering, deliver to single supply adjusting module and dual power supply adjusting module simultaneously.By signal controlling FPGA, controlled the access of different electrical power adjusting module and different divider resistances or disconnected to realize variety classes voltage as the generation of 24V, 12V, ± 15V, ± 12V etc., different types of voltage is exported by connection terminal.Single supply adjusting module can be connected to the first connection terminal and the second connection terminal, the second connection terminal ground signalling wherein, thus externally and for module below provides power supply, have signal wire function concurrently simultaneously; Dual power supply adjusting module can be connected to the first connection terminal, the second connection terminal and the 3rd connection terminal, the second connection terminal ground signalling wherein, thus externally and for module below provides power supply, have signal wire function concurrently simultaneously.
While internally providing electric source modes, for the loop that does not need externally to provide power supply, now, the power supply of single supply adjusting module and the output of dual power supply adjusting module is not exported from connection terminal, and transfer to signal controlling FPGA by signal conversion module, the first above-mentioned connection terminal, the second connection terminal and the 3rd connection terminal only have signal wire function.
Further, analog input module comprises analog switch, current collection circuit, and/or, voltage collection circuit.Referring to Fig. 2, analog input module comprises analog switch 121, current collection circuit 122, and voltage collection circuit 123.
Signal for input is the magnitude of current, just by analog switch, be transformed into current collection circuit, the current signal of input is sent into high precision variable resistance sampling after filtering afterwards, after sampling resistor, current signal is transformed into voltage signal, sending into the voltage follower consisting of amplifier cushions and impedance transformation, after amplitude limit, send into high-precision linear photoelectric coupled circuit isolation output after filtering again, by adjusting the size of sampling resistor, can realize the collection to different electric currents, as 4～20mA, the output of the electric currents such as 0～50mA; If the signal of input is voltage, just by analog switch, be switched to voltage collection circuit, the voltage signal of input is sent into instrument amplifier circuit AD8226 after the filtering of transition pipe, AD8226 is used is ± the wide region dual power supply of 24V, to adapt to opposed polarity, the voltage input of different range, as ± input of 10V, 0～5V, ± voltages such as 5V.Further, the gain resistor size that can adjust AD8226 realizes different gain needs, as input signal is ± 10V, can adjust gain resistor size for 33K, and gain is 0.5; If input signal is ± 5, just adjust gain resistor for disconnecting, gain is 1 etc., these adjustment can be by determining after signal type and scope, by adjusting the Configuration of signal controlling FPGA in advance.
Referring to Fig. 3, digital quantity input module can comprise the dropping resistor circuit 1321 connecting successively, high-frequency filter circuit 1322, optocoupler voltage isolation circuit 1323; Optocoupler voltage isolation circuit 1323 is connected with above-mentioned signal processing circuit.
In other embodiments of the invention, analog input module also comprises: between current collection circuit and analog switch, and the current transformer being connected with current collection circuit; Between voltage collection circuit and analog switch, the voltage transformer (VT) being connected with voltage collection circuit.For input be the AC signal of 220V time, just by after the corresponding voltage transformer (VT) of access or current transformer, then access voltage collection circuit or current collection circuit.
Referring to Fig. 4, the embodiment of the present invention provides a kind of status monitoring IED, comprise signal controlling programmable gate array FPGA 220, the model of signal controlling programmable gate array FPGA can adopt EP2C50F484I8, status monitoring IED also comprises: at least one road circuit interface 210 being connected with signal controlling programmable gate array FPGA, as comprised by circuit interface ，Mei road, Wei48 road circuit interface:
Module, dual power supply adjusting module, single supply adjusting module, terminals subgroup are selected in signal conversion module, power supply output.
One end external direct current power supply of dual power supply adjusting module, the other end selects module to be connected with power supply output, one end external direct current power supply of single supply adjusting module, the other end selects module to be connected with power supply output, and terminals subgroup selects module, signal conversion module, signal controlling FPGA to be connected with power supply output successively;
Power supply output selects module after receiving the power supply steering order of signal controlling FPGA, according to power supply steering order, select dual power supply adjusting module or single supply adjusting module to receive the direct current of direct supply input, by terminals subgroup, export, or transfer to signal controlling FPGA by signal conversion module;
Signal conversion module is after the signal controlling instruction that receives signal controlling FPGA, according to the analog input module of signal controlling instruction control signal modular converter inside and the break-make of digital quantity input module, from terminals subgroup, receive simulating signal or digital signal.
It should be noted that, in status monitoring IED, also comprise the mechanism operation loop, status indicator lamp, the PowerPC that are connected with programmable gate array FPGA EP2C50F484I8, and the peripheral circuit such as the FLASH being connected with PowerPC, SDRAM and keyboard and liquid crystal display.
Circuit interface in the embodiment of the present invention can external direct current power supply, by dual power supply adjusting module or single supply adjusting module the input or output current signal, can also accept simulation and/or digital signal by signal conversion module, therefore signal controlling FPGA can be according to concrete configuration, realize electric current, the access of analog and digital signal, thereby realize the unitized detection of variety classes signal, if the character change of signal, or the type change of sensor, the IED equipment of being responsible for this part status monitoring so can be upgraded flexibly, do not need to eliminate and change.
Further, in other embodiments of the invention, terminals subgroup comprises three connection terminals, is respectively the first connection terminal, the second connection terminal, the 3rd connection terminal, the second connection terminal ground signalling;
Single supply adjusting module is connected with the second connection terminal with the first connection terminal,
Dual power supply adjusting module is connected with the first connection terminal, the second connection terminal, the 3rd connection terminal.
Further, in other embodiments of the invention, analog input module comprises analog switch, current collection circuit, and/or, voltage collection circuit;
Current collection circuit comprises and the variable resistor being connected successively, voltage follower, photoelectric coupled circuit;
Voltage collection circuit comprises and the transition pipe being connected successively, instrument amplifier circuit;
When gathering current signal, analog switch switches to current collection circuit, and when gathering voltage signal, analog switch switches to voltage collection circuit.
Further, in other embodiments of the invention, digital quantity input module comprises the dropping resistor circuit connecting successively, high-frequency filter circuit, optocoupler voltage isolation circuit;
Described optocoupler voltage isolation circuit is connected with described signal processing circuit.
Further, in other embodiments of the invention, analog input module also comprises:
Between current collection circuit and analog switch, the current transformer being connected with current collection circuit;
Between voltage collection circuit and analog switch, the voltage transformer (VT) being connected with voltage collection circuit.
In this instructions, each embodiment adopts the mode of going forward one by one to describe, and each embodiment stresses is the difference with other embodiment, between each embodiment identical similar part mutually referring to.For the disclosed device of embodiment, because it corresponds to the method disclosed in Example, so description is fairly simple, relevant part partly illustrates referring to method.
Finally, also it should be noted that, in this article, such as first, second, third and the fourth class relational terms be only used for an entity or operation to separate with another entity or operational zone, and not necessarily require or imply and between these entities or operation, have the relation of any this reality or sequentially.And, term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thereby the process, method, article or the equipment that make to comprise a series of key elements not only comprise those key elements, but also comprise other key elements of clearly not listing, or be also included as the intrinsic key element of this process, method, article or equipment.The in the situation that of more restrictions not, the key element being limited by statement " comprising ... ", and be not precluded within process, method, article or the equipment that comprises described key element and also have other identical element.
While for convenience of description, describing above device, with function, being divided into various unit describes respectively.Certainly, when implementing the application, the function of each unit can be realized in same or a plurality of software and/or hardware.
Above-mentioned explanation to the disclosed embodiments, makes professional and technical personnel in the field can realize or use the present invention.To the multiple modification of these embodiment, will be apparent for those skilled in the art, General Principle as defined herein can, in the situation that not departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention will can not be restricted to these embodiment shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (10)
1. a circuit interface, is characterized in that, is applied to status monitoring IED, and described status monitoring IED comprises signal controlling programmable gate array FPGA;
Described circuit interface comprises signal conversion module, power supply output selection module, dual power supply adjusting module, single supply adjusting module, terminals subgroup;
One end external direct current power supply of described dual power supply adjusting module, the other end selects module to be connected with described power supply output, the external described direct supply in one end of described single supply adjusting module, the other end selects module to be connected with described power supply output, and described terminals subgroup selects module, described signal conversion module, described signal controlling FPGA to be connected with described power supply output successively;
Described power supply output selects module after receiving the power supply steering order of described signal controlling FPGA, according to described power supply steering order, select described dual power supply adjusting module or single supply adjusting module to receive the direct current of described direct supply input, by described terminals subgroup, export, or by described power supply output, select module, described signal conversion module to transfer to described signal controlling FPGA successively;
Described signal conversion module is after the signal controlling instruction that receives described signal controlling FPGA, according to described signal controlling instruction, control the analog input module of described signal conversion module inside and the break-make of digital quantity input module, from described terminals subgroup, receive simulating signal or digital signal.
2. circuit interface according to claim 1, is characterized in that, described terminals subgroup comprises three connection terminals, is respectively the first connection terminal, the second connection terminal, the 3rd connection terminal, described the second connection terminal ground signalling;
Described single supply adjusting module is connected with described the second connection terminal with described the first connection terminal;
Described dual power supply adjusting module is connected with described the first connection terminal, the second connection terminal, the 3rd connection terminal.
3. circuit interface according to claim 1, is characterized in that, described analog input module comprises analog switch, current collection circuit, and/or, voltage collection circuit;
Described current collection circuit comprises and the variable resistor being connected successively, voltage follower, photoelectric coupled circuit;
Described voltage collection circuit comprises and the transition pipe being connected successively, instrument amplifier circuit;
When gathering current signal, described analog switch switches to described current collection circuit, and when gathering voltage signal, described analog switch switches to described voltage collection circuit.
4. circuit interface according to claim 1, is characterized in that, described digital quantity input module comprises:
The dropping resistor circuit connecting successively, high-frequency filter circuit, optocoupler voltage isolation circuit;
Described optocoupler voltage isolation circuit is connected with described signal processing circuit.
5. circuit interface according to claim 3, is characterized in that, described analog input module also comprises:
Between described current collection circuit and described analog switch, the current transformer being connected with described current collection circuit;
Between described voltage collection circuit and described analog switch, the voltage transformer (VT) being connected with described voltage collection circuit.
6. a status monitoring IED, is characterized in that, comprises signal controlling programmable gate array FPGA, also comprises:
At least one road circuit interface being connected with described signal controlling FPGA, described circuit interface comprises signal conversion module, power supply output selection module, dual power supply adjusting module, single supply adjusting module, terminals subgroup;
One end external direct current power supply of described dual power supply adjusting module, the other end selects module to be connected with described power supply output, the external described direct supply in one end of described single supply adjusting module, the other end selects module to be connected with described power supply output, and described terminals subgroup selects module, described signal conversion module, described signal controlling FPGA to be connected with described power supply output successively;
Described power supply output selects module after receiving the power supply steering order of described signal controlling FPGA, according to described power supply steering order, select described dual power supply adjusting module or single supply adjusting module to receive the direct current of described direct supply input, by described terminals subgroup, export, or transfer to described signal controlling FPGA by described signal conversion module;
Described signal conversion module is after the signal controlling instruction that receives described signal controlling FPGA, according to described signal controlling instruction, control the analog input module of described signal conversion module inside and the break-make of digital quantity input module, from described terminals subgroup, receive simulating signal or digital signal.
7. status monitoring IED according to claim 6, is characterized in that, described terminals subgroup comprises three connection terminals, is respectively the first connection terminal, the second connection terminal, the 3rd connection terminal, described the second connection terminal ground signalling;
Described single supply adjusting module is connected with described the second connection terminal with described the first connection terminal;
Described dual power supply adjusting module is connected with described the first connection terminal, the second connection terminal, the 3rd connection terminal.
8. status monitoring IED according to claim 6, is characterized in that, described analog input module comprises analog switch, current collection circuit, and/or, voltage collection circuit;
Described current collection circuit comprises and the variable resistor being connected successively, voltage follower, photoelectric coupled circuit;
Described voltage collection circuit comprises and the transition pipe being connected successively, instrument amplifier circuit;
When gathering current signal, described analog switch switches to described current collection circuit, and when gathering voltage signal, described analog switch switches to described voltage collection circuit.
9. status monitoring IED according to claim 6, is characterized in that, described digital quantity input module comprises:
The dropping resistor circuit connecting successively, high-frequency filter circuit, optocoupler voltage isolation circuit;
Described optocoupler voltage isolation circuit is connected with described signal processing circuit.
10. status monitoring IED according to claim 8, is characterized in that, described analog input module also comprises:
Between described current collection circuit and described analog switch, the current transformer being connected with described current collection circuit;
Between described voltage collection circuit and described analog switch, the voltage transformer (VT) being connected with described voltage collection circuit.
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| CN113656342A (en) * | 2021-08-24 | 2021-11-16 | 深圳市康冠商用科技有限公司 | USB interface switching control method and device, all-in-one machine equipment and storage medium |
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| CN103529339B (en) | 2015-11-25 |
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