CN103516371B - Configurable transmitting set - Google Patents
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- CN103516371B CN103516371B CN201310427108.4A CN201310427108A CN103516371B CN 103516371 B CN103516371 B CN 103516371B CN 201310427108 A CN201310427108 A CN 201310427108A CN 103516371 B CN103516371 B CN 103516371B
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Abstract
A kind of configurable transmitting set, comprise digital baseband circuit, D/A converting circuit, analog baseband circuitry, radio-frequency (RF) front-end circuit, frequency synthesizer, band-gap reference source circuit, serial control interface circuit and parallel data grabbing card circuit, described radio-frequency (RF) front-end circuit comprises Pre-power amplifier, power amplifier and feedthrough buffer, described Pre-power amplifier is applied to broadband cluster application, the signal of input is changed into the radiofrequency signal of frequency and bandwidth needed for the cluster application of broadband, described power amplifier is applied to arrowband private network application, the signal of input is changed into the radiofrequency signal of the required frequency of arrowband private network application and bandwidth.This configurable transmitting set is low in energy consumption, integrated level is high.The radiofrequency signal centre frequency that this configurable transmitting set exports covers 100MHz to 5GHz, and bandwidth supports 5kHz to 20MHz, has configurable characteristic flexibly, can meet the requirement of distinct communication standards.
Description
Technical field
The present invention relates to the configurable transmitting set of a kind of software wireless electrical domain Industry-oriented private network application, particularly relate to a kind of configurable transmitting set of the various wireless communication standard that is applicable to adopting circuit of single-chip integrated technology to realize.
Background technology
According to the service object of communication system, communication network is divided into public network and private network.Public network is user towards the public, provides the business such as phone, multimedia.Private network is mainly for dispatch control and the higher industry of security requirement, and information-based private network can provide safeguard for the safe operation of industry-by-industry or large enterprise.Along with the development of wireless communication technology, public network construction is progressively ripe, but construction of professional network relatively lags behind.
Trade Special Network wireless communications application can be divided into two classes: a class applies towards the narrow band communication of the industries such as electric power, public security, railway train, and another kind of is the broadband trunking communication application of High Data Rate.Broadband trunking communication is international study hotspot in recent years, and because relevant criterion is not yet formulated, the exploitation of current broadband cluster communication system relies on existing wireless broad band technology, mostly as 3G, WLAN, WiMAX, LTE etc.
A new generation trade Special Network wireless application demand just growing, but due to trade Special Network wireless application of a great variety, working frequency range disperse, frequency coverage is wider, channel width width differs, and makes the supporting difficulty of radio-frequency devices, is unfavorable for the construction of trade Special Network.For realizing the application of many standards, the configurable radio frequency chip of a bandwidth frequency will become the inexorable trend of development.Just can support different communication services by means of a terminal equipment like this, greatly can meet the application demand of numerous trade Special Network.
Configurable radio frequency chip is from software radio (Software-Defined Radio, SDR) technical development, its basic thought carrys out configure hardware by software, realizes restructural feature flexibly, and Chief technological difficulties are wherein exactly that transceiver circuit realizes.
Configurable transmitting set can be configured to the operating state of any pattern to meet existing distinct communication standards requirement.Common communication standard comprises cellular communications system (2G-2.5G-3G etc.), wireless lan communication system (802.11a/b/g/n etc.), wireless personal local area network communication system (Bluetooth, Zigbee etc.), broadcast communication system (DAB, DVB, DMB etc.) and forth generation mobile communication system (4G) etc.Wherein, each communication standard has centre frequencies different separately, channel width, and linearity index, transmitting power require etc.Therefore, configurable transmitting set must can provide larger dynamic range, and realizes the index request of distinct communication standards.
Configurable transmitting set not only has restructural feature flexibly, and it also has very large potentiality in low-power consumption application.The most rigors of traditional wireless communication transmitter demand fulfillment communication system when designing, therefore will inevitably pay maximum power consumption costs.But configurable transmitting set can be different according to it applied environment, configure its performance index neatly, under the prerequisite meeting practical communication index, reduce ensemble average power consumption.
But, although current configurable transmitting set configurable bandwidth and frequency, or only can support the communication standard in broadband, or only can the communication standard of arrowband, cannot compatible arrowband and broadband application simultaneously.
Summary of the invention
In view of this, necessaryly a kind of configurable transmitting set simultaneously can supporting the application of arrowband private network and broadband cluster application is provided.
A kind of configurable transmitting set, comprise digital baseband circuit, D/A converting circuit, analog baseband circuitry, radio-frequency (RF) front-end circuit, frequency synthesizer, band-gap reference source circuit, serial control interface circuit and parallel data grabbing card circuit, described radio-frequency (RF) front-end circuit comprises Pre-power amplifier, power amplifier and feedthrough buffer, described Pre-power amplifier is applied to broadband cluster application, the signal of input is changed into the radiofrequency signal of frequency and bandwidth needed for the cluster application of broadband, described power amplifier is applied to arrowband private network application, the signal of input is changed into the radiofrequency signal of the required frequency of arrowband private network application and bandwidth, described feedthrough buffer forms feedback control loop between described transmitter and receiver, for to detect and according to the transmitting power of this transmitting set of feedback calibration, digital baseband signal outside described parallel data grabbing card circuit receiving sheet is also input in described digital baseband circuit, described digital baseband circuit is used for the digital baseband signal received to carry out modulating, bandwidth restriction, mixing and up-sampling process, described D/A converting circuit is used for the signal after described digital baseband circuit process to carry out digital-to-analogue conversion, described analog baseband circuitry is for the aliasing signal in signal after filtering digital-to-analogue conversion and noise signal, and described radio-frequency (RF) front-end circuit is carried out up-conversion to the signal after described analog baseband circuitry process and then launched the radiofrequency signal being applicable to arrowband private network application or broadband cluster application as required, described frequency synthesizer provides local oscillation signal for this transmitting set, and described band-gap reference source circuit provides bias voltage and bias current for other circuit in this transmitting set except digital circuit, described serial control interface circuit is connected with the controller of outside and is controlled the mode of operation of each circuit in this transmitting set by peripheral control unit.
Compared with prior art, the configurable transmitting set of the Industry-oriented private network application that the embodiment of the present invention provides is by integrated digital baseband circuit on chip, D/A converting circuit, analog baseband circuitry, radio-frequency (RF) front-end circuit, frequency synthesizer, band-gap reference source circuit and interface circuit, described radio-frequency (RF) front-end circuit Integrated predict model is in the Pre-power amplifier of broadband cluster application simultaneously, be applied to the power amplifier of arrowband private network application and three, feedthrough buffer path arranged side by side, because foregoing circuit is all configurable, thus this transmitting set as one independently chip both can be applicable in the cluster application of broadband, also can be applied in arrowband private network application.The radiofrequency signal centre frequency of this transmitting set covers 100MHz to 5GHz, bandwidth supports 5kHz to 20MHz, by foregoing circuit integrated on sheet, greatly can reduce application cost and the power consumption of this transmitting set, be applicable in various different communications applications environment.
Accompanying drawing explanation
The structure function block diagram of the configurable transmitting set that Fig. 1 provides for first embodiment of the invention.
The circuit structure diagram of analog digital baseband circuit in the configurable transmitting set that Fig. 2 provides for first embodiment of the invention.
The circuit structure diagram of the configurable transmitting set radio-frequency (RF) front-end circuit intermediate power amplifier that Fig. 3 provides for first embodiment of the invention.
Fig. 4 comprises the circuit structure diagram of the power amplifier of power drive level for configurable transmitting set radio-frequency (RF) front-end circuit that first embodiment of the invention provides.
The circuit structure diagram of up-conversion in the configurable transmitting set radio-frequency (RF) front-end circuit that Fig. 5 provides for first embodiment of the invention.
The functional block diagram being applied to the wireless transmitting system of arrowband private network pattern of the configurable transmitting set of use that Fig. 6 provides for first embodiment of the invention.
The functional block diagram being applied to the wireless transmitting system of broadband cluster application pattern of the configurable transmitting set of use that Fig. 7 provides for first embodiment of the invention.
The structure function block diagram of the configurable transmitting set that Fig. 8 provides for second embodiment of the invention.
The circuit structure diagram of IQ mismatch calibration circuit in the configurable transmitting set that Fig. 9 provides for second embodiment of the invention.
Main element symbol description
| Configurable transmitting set | 10，10’ |
| IQ mismatch calibration circuit | 22 |
| I road signal calibration unit | 22a |
| Q road signal calibration unit 22b | 22b |
| Digital baseband circuit | 100 |
| Digital modulator | 110 |
| Base band formed filter | 120 |
| Numerically frequency mixer | 130 |
| Up-sampling circuit | 140 |
| D/A converting circuit | 200 |
| Analog baseband circuitry | 300 |
| Across resistance low pass filter | 310 |
| DC maladjustment calibration module | 3101 |
| Bandwidth tuning calibration module | 3102 |
| Passive low ventilating filter | 320 |
| Radio-frequency (RF) front-end circuit | 400 |
| Upconverter | 410 |
| Passive voltage frequency mixer | 411 |
| Signal generator | 412 |
| Frequency mixer IQ calibration module | 413 |
| Pre-power amplifier | 420 |
| Power amplifier | 430 |
| Duplexer | 440 |
| Feedthrough buffer | 450 |
| Frequency synthesizer | 500 |
| Band-gap reference source circuit | 600 |
| Serial control interface circuit | 710 |
| Parallel data grabbing card circuit | 720 |
Following embodiment will further illustrate the present invention in conjunction with above-mentioned accompanying drawing.
Embodiment
Below in conjunction with the accompanying drawings and the specific embodiments to configurable transmitting set provided by the invention.
Refer to Fig. 1, first embodiment of the invention provides a kind of configurable transmitting set 10, this configurable transmitting set 10 can be used as one independently integrated chip use.This configurable transmitting set 10 comprises digital baseband circuit 100, D/A converting circuit 200, analog baseband circuitry 300, radio-frequency (RF) front-end circuit 400, frequency synthesizer 510, band-gap reference source circuit 600, serial control interface circuit 710 and parallel data grabbing card circuit 720.Described radio-frequency (RF) front-end circuit 400 comprises 450 3, Pre-power amplifier 420, power amplifier 430 and feedthrough buffer path arranged side by side, described Pre-power amplifier 420 is applied in the cluster application of broadband, and radio frequency signal carries out pre-amplification process and then launches.Described power amplifier 430 is applied in arrowband private network application, and radio frequency signal carries out amplifying emission.Described feedthrough buffer 450 forms feedback control loop between described transmitter 10 and receiver, for detecting the transmitting power of this transmitting set 10 and and calibrating circuit.This configurable transmitting set 10 adopts quadrature up-conversion framework, comprises I(homophase, inphase), Q(quadrature phase, quadrature phase) two bars passages.The signal of this two barss passage is produced by the baseband chip outside sheet, signal enters described digital baseband circuit 100 by described parallel data grabbing card circuit 720, the modulation of settling signal, bandwidth limits, mixing and up-sampling process, then the digital-to-analogue conversion that described D/A converting circuit 200 carries out signal is entered, signal after digital-to-analogue conversion enters analog baseband circuitry 300 with the aliasing signal beyond filtering useful signal and noise signal, then radio-frequency (RF) front-end circuit 400 is entered, radio-frequency (RF) front-end circuit 400 is by I, Q two paths of signals is superposed by mixing, then the radiofrequency signal being applicable to arrowband private network application or broadband cluster application is launched as required.
Described digital baseband circuit 100 carries out modulating for the digital baseband signal outer for sheet (arrowband private network digital baseband chip or broadband cluster digital baseband chip) produced, bandwidth restriction, mixing and up-sampling process.This digital baseband circuit 100 comprises digital modulator 110, base band formed filter 120, numerically frequency mixer 130, up-sampling circuit 140.
Described digital baseband circuit 100 can adopt two kinds of modulating modes, and a kind of for sheet is modulated, another kind is sheet external modulation.The process of described upper modulation is: the outer digital baseband signal of sheet is sent into described digital modulator 110 and carried out modulation treatment, then the signal after modulation is sent into base band formed filter 120 and is carried out bandwidth restriction, then by or bypass described in numerically frequency mixer 130 realize intermediate frequency up-conversion and Direct conversion two kinds of frameworks of described transmitter 10 respectively.Described intermediate frequency up-conversion framework can realize the arrowband private network application model of this transmitting set 10.Described Direct conversion framework can realize the broadband cluster application pattern of this transmitting set 10.Signal after frequency conversion makes the sample rate of the digital baseband output data rate of this digital baseband circuit 100 and the D/A converting circuit 200 of rear class be consistent by described up-sampling circuit 140.Described external modulation refers to, described digital baseband signal is modulated on the outer digital baseband chip of sheet, the digital modulator of bypass simultaneously 110, and then is sent in base band formed filter 120 by the signal after modulation.
The modulation system of described digital modulator 110 is configurable, particularly, can realize Different Modulations, comprise FSK, BPSK and DSSS.The selection of this modulation system can be determined according to the needs of communications applications.
It is configurable in 5kHz to 20MHz scope that described base band formed filter 120 can realize bandwidth, thus can realize different bandwidth according to the needs of application by this base band formed filter 120.
Described numerically frequency mixer 130 by bypass or by this numerically frequency mixer 130 realize the configurable of intermediate frequency up-conversion and Direct conversion two kinds of frameworks.The sample rate of described up-sampling circuit 140 is configurable.
Described D/A converting circuit 200 is used for converting the digital signal that described digital baseband circuit 100 exports to analog signal.The sample rate of this D/A converting circuit 200 is configurable, can D/A converting circuit 200 sample rate can according to this transmitting set 10 need cover configurable bandwidth arrange.This D/A converting circuit 200 can adopt full-differential circuits to realize.The precision of this D/A converting circuit 200 can set as required, and precision described in the embodiment of the present invention is 10, and wherein low 4 adopt binary code, and high 6 are realized by thermometer code.Because the sample rate of described D/A converting circuit 200 is configurable, thus exponent number and the power consumption of rear class analog baseband circuitry 300 can be reduced.
See also Fig. 2, described analog baseband circuitry 300 can need to be reconstructed, for the aliasing signal beyond filtering useful signal and noise signal according to different communication.This analog baseband circuitry 300 comprises across resistance low pass filter 310 and passive low ventilating filter 320.The described aliasing signal be used for across resistance low-pass filter circuit in the analog signal that described in filtering, D/A converting circuit 200 exports, then through described passive low ventilating filter 320 filter out-band external noise further, reduces the final noise floor transmitted exported.
Described across the resistance gain of low pass filter 310 and bandwidth all configurable, provide certain dynamic range for the aliasing signal in the analog signal that D/A converting circuit described in filtering 200 exports, thus dynamic range requirement when meeting different application environment.In the embodiment of the present invention, described across resistance low pass filter 310 choose Butterworth LPF, preferably, have second order Butterworth low pass wave property, 1dB bandwidth can be configured to 5MHz and 10MHz, and effect is filtering upper frequency place aliasing signal.Gain can regulate in the scope of 0-26dB, and stepping is 1dB, thus dynamic range requirement when meeting different application environment.
Described across resistance filter 310 adopt difference channel structure, be made up of two-stage calculation amplifier.First order operational amplifier U1 positive output end be connected with load resistance R311 in parallel and load capacitance C312 between inverting input, meanwhile, this first order operational amplifier U1 reversed-phase output be connected with load resistance R311 in parallel and load capacitance C312 between normal phase input end.The reversed-phase output of this first order operational amplifier U1 and positive output end are connected to the input of second level operational amplifier U2 respectively after series resistance R314, between the inverting input of described second level operational amplifier and positive output end and be connected to load capacitance C315 between normal phase input end and reversed-phase output.Resistance R313 is connected between the inverting input of described first order operational amplifier U1 and the reversed-phase output of described second level operational amplifier U2 and between the normal phase input end of first order operational amplifier U1 and the positive output end of described second level operational amplifier U2.
Described first order operational amplifier U1 and second level operational amplifier U2 all adopts configurable structure.As described in first order operational amplifier U1 or second level operational amplifier U2 can adopt that multiple sub-operational amplifier is structurally in parallel to be formed respectively, the number of sub-operational amplifier opened by configuration realizes the configurable of this first order operational amplifier U1 and second level operational amplifier U2 driving force, thus make this be applicable to different bandwidth requirements across resistance filter 310, and then this can be made across the minimizing of amplifier power consumption under different filter bandwidht of resistance filter 310.
Described load resistance R313 can determine that this is across the gain hindering filter 310, and described load resistance R313 and R314 and load capacitance C312 and C315 determines that this is across the bandwidth hindering filter 310 jointly.Described load capacitance and load resistance all adopt configurable structure.Namely the capacitance of described load capacitance and the resistance value of described load resistance can regulate as required, thus achieve this across the resistance gain of filter and the configurable of bandwidth.Multiple identical sub-electric capacity or sub-resistance can be adopted to realize this load capacitance by the mode of multiple parallel connection or series connection for described load capacitance or load resistance or load resistance is structural configurable.
Further, described comprise running off across resistance low pass filter 310 always adjust calibration module 3101 and bandwidth tuning calibration module 3102.Described DC maladjustment calibration module 3101 is connected between the differential input end of described first order operational amplification circuit U1, for eliminating the described DC maladjustment caused due to the deviation of technique and the asymmetric of domain across the difference output end of resistance filter 310, thus the local-oscillator leakage component that can reduce in transmitter output signal, improve quality of output signals.This DC maladjustment calibration module 3101 can adopt a difference current rudder to realize.Described bandwidth tuning calibration module 3102 for calibrating because described load capacitance, load resistance manufacture technics exist the inaccurate bandwidth that filter that deviation causes exports, thus realizes this reliability across resistance filter 310.This bandwidth tuning calibration module 3102 can utilize the circuit structure of the principle design of resistance capacitance discharge and recharge to realize.
Described passive low ventilating filter 320, for further inhibition zone external noise, is connected to the described difference output end across resistance filter 310.Particularly, two resistance R321 are connected between described each output across resistance filter 310 and the output of described passive low ventilating filter 320.Electric capacity C322 and a resistance R323 of two series connection are connected in parallel between the difference output end of passive low ventilating filter 320.Passive low ventilating filter 320 described in the embodiment of the present invention has single order Butterworth filtering characteristic, and gain can regulate at-3dB and-6dB, and 1dB bandwidth is 40MHz.Described gain and the adjustable of bandwidth are realized by conveying the configurable of electric capacity C322 and resistance R321 and R322.
Refer to Fig. 1, described radio-frequency (RF) front-end circuit 400 comprises upconverter 410, Pre-power amplifier 420, power amplifier 430, duplexer 440 and feedthrough buffer 450.The signal that described analog baseband circuitry 300 exports is sent into described upconverter 410 pairs of I, Q two paths of signals and is carried out mixing and be superimposed as a signal.Described Pre-power amplifier 420, power amplifier 430 and duplexer 440 and feedthrough buffer 450 are three side by side and independently paths.Described Pre-power amplifier 420, in the cluster application of broadband, carries out pre-amplification process to the radiofrequency signal exported from described upconverter.The output of power amplifier 430 is connected with described duplexer 440, in the application of arrowband private network.By signal being launched at described duplexer 440 place external antenna.Described feedthrough buffer 450 by described transmitter 10 with to the receiver of transmitter 10 feedback control loop should be formed, be used for detecting this transmitter 10 transmitting power and according to the further calibration circuit of detection power.
The working frequency range of described Pre-power amplifier 420 covers 450MHz to 5GHz, and gain has 5 gears for regulating, can meet the demanded power output under different broadband communication standards, thus the radiofrequency signal be applicable under the cluster application pattern of broadband exports.
The working frequency range of described power amplifier 430 covers 100MHz to 1.5GHz, this power amplifier 430 is configurable, there are linear processes two kinds of configurable mode of operations, thus the optimization of power amplifier 430 linearity and efficiency can be realized in the applied environment of different modulating mode.Described duplexer 440 is integrated on chip, thus can reduce the application cost of arrowband private network.
Refer to Fig. 3, described power amplifier 430 has linear processes two kinds of configurable mode of operations, and these two kinds of mode of operations share same circuit structure, and this power amplifier 430 comprises power-amplifier stage and impedance transformation level.
Described power-amplifier stage can adopt difference cascode type (Cascode) circuit structure.This difference cascode type circuit comprises common source transistors and common gate transistor, differential signal inputs from the grid of the common source transistors of cascade type circuit respectively, and the drain electrode of described altogether gate transistor outputs signal as the difference output end of this difference cascode type circuit.The difference output termination power vd D of this difference cascode type circuit, this power vd D provide bias current for this difference cascode type circuit.The grid of described common source transistors meets bias voltage VB1, and the grid of described gate transistor altogether meets bias voltage VB2.
Described power-amplifier stage has linear processes two kinds of mode of operations, described linear processes mode of operation is switched by the bias voltage VB2 of the bias voltage VB1 and common gate transistor that change described common source transistors, when non-linear process planning, described common source transistors is biased in the on off state of F class A amplifier A, and described gate transistor is altogether biased in supply voltage VDD; When linear model, described common source transistors is biased in the mode of operation of class ab ammplifier, and described gate transistor is altogether biased in minimum Knee voltage.
The structure of power amplification grade circuit described in the embodiment of the present invention is: the first differential input signal Vip meets electric capacity C
0one end, second differential input signal Vin connects one end of electric capacity C ' 0, one end of the other end connecting resistance R1 of electric capacity C0 is connected with the grid of transistor M1 simultaneously, one end of the other end connecting resistance R ' 1 of electric capacity C ' 0 is connected with the grid of transistor M2 simultaneously, the other end of resistance R1 and another termination bias voltage VB1 of resistance R ' 1; The source electrode of transistor M1 and the source electrode of transistor M2 link together and ground connection, the drain electrode of transistor M1 is connected with the source electrode of transistor M3, the drain electrode of transistor M2 is connected with the source electrode of transistor M4, transistor M3 is connected with the grid of transistor M4, the drain electrode of transistor M3 connects one end of inductance L 0, one end of the drain electrode of transistor M4 connects inductance L ' 0, the other end of the other end and inductance L ' 0 of inductance L 0 is connected and meets power vd D.The difference cascode circuit structure (Cascode structure) that transistor M1-M4 is formed, wherein, transistor M1 and M2 common source, transistor M3 and M4 common gate also meet bias voltage VB2.Transistor M1, M3 and transistor M2, M4 form difference channel structure.
Described transistor M1 and M2 of common source can adopt thin gate transistor, has higher mutual conductance efficiency.Described transistor M3 and M4 of common gate can adopt thick gate transistor, thus can have stronger voltage endurance capability and little conducting resistance under can realizing nonlinear model.Described resistance R1 and R ' 1 provides direct current biasing for giving transistor M1 and M2 of described common source.Described inductance L 0 is connected between the drain electrode of transistor M3 and M4 and power vd D, and for providing direct current and opening a way to interchange, described inductance L 0 is preferably choke (Choke) inductance.
The switching of the linear processes mode of operation of described power amplifier 430 is realized by the bias voltage VB2 of the bias voltage VB1 and transistor M3 and M4 that change transistor M1 and M2 of described common source respectively.When linear operation mode, transistor M1 and M2 of described common source is biased in the operating state of category-A, category-B, AB class or C class A amplifier A.Preferably, transistor M1 and M2 of described common source is biased in the operating state of class ab ammplifier.Described transistor M3 and M4 of common gate can be biased in suitable operating voltage, preferably, makes described transistor M3 and M4 of described common gate be biased in minimum Knee voltage by this change described bias voltage VB1.Described Knee voltage refers to input voltage one timing, the numerical value of output voltage when output current reaches 95% of lowest high-current value.When non-linear process planning, transistor M1 and M2 is operated in the on off state of F power-like amplifier, and transistor M3 and M4 of common gate is biased in supply voltage VDD.
Described impedance transformation level can adopt the output loading structure of F power-like amplifier, and this output loading structure comprises the odd series resonant network on more than three rank or three rank.Preferably, three rank series resonant network are selected.This impedance transformation level can comprise three rank series resonant network, first-harmonic resonance network, L-type impedance inverting network and transformer, one end of each difference output termination one or three rank series resonant network of described power-amplifier stage, the two ends of described first-harmonic resonance network are connected with the other end of three rank series resonant network of each road difference output end respectively, after described L-type impedance transformation, then enter described transformer the differential output signal of this impedance transformation level is converted to mono signal output.
The circuit structure of the level of impedance transformation described in the embodiment of the present invention is: electric capacity C1, electric capacity C ' 1, inductance L 1 and inductance L ' 1 forms three rank series resonant network, wherein, one end of electric capacity C1 is connected with one end of inductance L 1 and is connected to the drain electrode of transistor M3, this electric capacity C1 is connected with the other end of inductance L 1 and is connected with one end of inductance L 2 and one end of electric capacity C3, one end of one end and inductance L ' 1 of electric capacity C ' 1 is connected and is connected to the drain electrode of transistor M4, this electric capacity C ' 1 is connected with the other end of inductance L ' 1 and is connected with the other end of inductance L ' 2 and one end of electric capacity C ' 3.Inductance L 2 is in parallel with electric capacity C2 forms first-harmonic resonance network.Electric capacity C3, C ' 3 and inductance L 3 form the impedance transformation of L-type, thus can realize the impedance transformation of output loading to power amplifier optimal load.Wherein, the other end of electric capacity C3 is connected with one end of inductance L 3, and the other end of electric capacity C ' 3 is connected with the other end of inductance L 3, and transformer T is in parallel with inductance L 3, exports, thus form described power amplifier 430 for differential output signal being converted to mono signal.Described transformer can be Ba Lun (Balun) transformer.
Further, described power amplifier 430 can comprise a power drive level circuit, for input range input signal pre-amplification required to power-amplifier stage.Refer to Fig. 4, the embodiment of the present invention provides a kind of power amplifier 430 ' with power drive level further, this power amplifier 430 ' comprises power drive level, power-amplifier stage and impedance transformation level, described power-amplifier stage forms the output stage of this power amplifier together with impedance transformation level, exports for the signal of pre-amplification being enlarged into further power signal.Described differential input signal Vip and Vin inputs from described power drive level circuit and passes through this power drive level circuit conversion and export differential output signal to be input to described transistor M1 and M2 respectively grid as the differential input signal of described power amplification grade circuit.
Described power drive level can adopt wide-band amplifier, adopt wide-band amplifier can in larger frequency range (as 0.1G-1.5GHz of the present invention) can give as described in power-amplifier stage enough gains are provided.Preferably, described power drive level can adopt the wide-band amplifier based on Cherry-Hopper, comprise mutual conductance amplifying stage and across resistance amplifying stage.Described mutual conductance amplifying stage comprises another cascade type circuit and a current loading mirror, as the load of this cascade type circuit after this current loading mirror and a resistor coupled in parallel, described trans-impedance amplifier adopts inverter structure, and this inverter structure of difference output termination of this second difference cascode type circuit forms described wide-band amplifier.
In the embodiment of the present invention, in described mutual conductance amplifying stage, transistor M5-M8 forms cascade (Cascode) structure of difference, wherein, transistor M5 and M6 common source, transistor M7 and M8 common gate, transistor M5, M7 and transistor M5, M8 form difference channel.Transistor M9-M12 is the load current mirror of this cascodes, load as this mutual conductance amplifying stage in parallel with resistance R3, R ' 3.
Particularly, the circuit structure of this mutual conductance amplifying stage is: the first differential input signal Vip meets electric capacity C
0one end, second differential input signal Vin connects one end of electric capacity C ' 0, one end of the other end connecting resistance R2 of electric capacity C0 is connected with the grid of transistor M5 simultaneously, one end of the other end connecting resistance R ' 2 of electric capacity C ' 0 is connected with the grid of transistor M6 simultaneously, the other end of resistance R2 and another termination bias voltage VB of resistance R ' 2; The source electrode of transistor M5 and the source electrode of transistor M6 link together and ground connection, the drain electrode of transistor M5 is connected with the source electrode of transistor M7, the drain electrode of transistor M6 is connected with the source electrode of transistor M8, transistor M7 is connected with the grid of transistor M8, the drain electrode of transistor M7 connects the drain electrode of transistor M9 and is connected with one end of resistance R3, and the drain electrode of transistor M8 connects the drain electrode of transistor M10 and is connected with one end of resistance R ' 3.The source electrode of transistor M9 is connected with the drain electrode of transistor M11, and the source electrode of transistor M10 is connected with the drain electrode of transistor M12, transistor M9 and transistor M10 common gate, transistor M11 and transistor M12 common gate.The other end of the source electrode connecting resistance R3 of transistor M11 meets power vd D simultaneously, and the other end of the source electrode connecting resistance R ' 3 of transistor M12 meets power vd D simultaneously.The drain electrode of transistor M7 and M8 is connected to differential input end across resistance amplifying stage as the output of mutual conductance amplifying stage respectively by holding C4 and C ' 4 every straight-through alternating current.
Described across resistance amplifying stage, the inverter structure of transistor M13-M16 formation difference, resistance R4 and resistance R ' 4 between the symmetrical constrained input end being connected across this inverter, forms automatic biasing respectively.The described circuit structure across resistance amplifying stage is: transistor M13 and M14 common source ground connection, the drain electrode of transistor M13 connects the drain electrode of transistor M15 and the drain electrode by meeting transistor M7 every straight-through alternating current appearance C4, the drain electrode of transistor M14 connects the drain electrode of transistor M16, transistor M13 is connected with the grid of transistor M15, and transistor M14 is connected with the grid of transistor M16.The source electrode of transistor M15 is connected with the source electrode of transistor M16 and meets power vd D.The grid of transistor M16 is by holding every straight-through alternating current the drain electrode that C ' 4 meets transistor M10.Resistance R4 is connected between the grid of described transistor M13 and drain electrode.Resistance R ' 4 is connected between the grid of transistor M14 and drain electrode.The drain electrode of transistor M13 and the drain electrode of transistor M14 are passed through to hold C ' 5 every straight-through alternating current as this difference output end across resistance amplifying stage and are connected with the grid of transistor M1 with M2 in described power-amplifier stage with C5.
The switching of two kinds of mode of operations of this power amplifier 430 ' realizes by the bias voltage VCG of the transistor M3 to M4 of the bias voltage VCS and common gate that change transistor M1 and M2 of common source respectively.This handoff procedure is identical with the work-mode switching process of described power amplifier 430.
Transistor M1-M16 described in each can be realized by a MOS transistor, in addition, refers to the partial enlarged drawing in Fig. 4, multiple MOS transistor parallel with one another also can be adopted to realize.In addition, when described transistor M1-M16 adopts multiple MOS transistor parallel with one another, the size of the MOS transistor of the plurality of parallel connection can be the same or different.The size of described transistor refers to the grid width W of transistor and the ratio (W/L) of grid length.Due to described transistor M1-M16 by aforesaid way carry out difference configuration, thus described power drive level and this power amplifier 430 or 430 can be realized ' gain and bandwidth configurable.In the embodiment of the present invention, each described transistor M13-M16 is made up of three MOS transistor parallel with one another, and the size of these three MOS transistor is than being 1:1:2.Each described transistor M1-M4 is made up of three MOS transistor parallel with one another, and the size of these three MOS transistor is than being 1:2:3.Described transistor M1-M16 can adopt the dark N trap transistor of CMOS technology to realize, and the dark N trap transistor of this employing CMOS technology has good noise isolation performance.
The resistance value of the capacitance of the electric capacity in power amplifier described in the embodiment of the present invention, the inductance value of inductance and resistance is all adjustable, thus the bandwidth of this power amplifier, frequency and gain can be made all adjustable.
In addition, due to described power amplifier 430 or 430 ' adopt difference channel structure, therefore, the resistance that difference channel is corresponding, inductance and capacitance can be equal.As R1=R ' 1, R2=R ' 2, R3=R ' 3, L0=L ' 0, L1=L ' 1, C1=C ' 1, C0=C ' 0, C2=C ' 2, C3=C ' 3, C4=C ' 4.The working frequency range of this power amplifier 430 ' can cover in the scope of 0.1GHz-1.5GHz, thus can meet the application of the distinct communication standards of wider frequency section.
Because the whole circuit of this power amplifier 430 ' adopts difference channel structure, thus even-order harmonic can be reduced and can power output be increased.Described in this power amplifier 430 ' power drive level by mutual conductance amplifying stage and across resistance amplifying stage form, wherein mutual conductance amplifying stage load resistance R3 with across hindering amplifying stage transistor M13-M16 mutual conductance gm
13,14, gm
15,16relational expression (1) need be met:
（1）
Under the prerequisite of (1) formula, gain G ain and the dominant pole ω p1 of described power drive level can be expressed as relational expression (2) and (3), wherein, and gm5
, 6for transistor M
5and M
6mutual conductance, C
x1for the output capacitance of described mutual conductance amplifying stage, C
gg1,2for the grid capacitance of transistor M1 and M2, C
gd13,14, C
gd15,16be respectively the gate leakage capacitance of transistor M13-M14, M15-M16.
（2）
（3）
Described dominant pole reflects the exportable bandwidth of this power drive level, and dominant pole is larger, and the bandwidth of output is wider.Because transistor M13-M16 size 1:1:2 is configurable, according to (2) and (3) formula, gain and the bandwidth of power drive level circuit are all configurable.
Assuming that the Knee voltage of described transistor M1 and M3 is V
k, supply voltage is V
dD, then the maximum fundamental voltage V of the drain electrode of transistor M3 and M4
1formula (4) can be expressed as:
（4）
As can be seen from the above equation, choose less Knee voltage and can produce the maximum fundamental voltage V of larger drain electrode
1.In addition, described power amplifier 430 or 430 ' impedance transformation level adopt the output loading network of F power-like amplifier, thus the drain electrode fundamental voltage of transistor in Cascode structure can be increased to a certain extent.In addition, in this output loading network, utilize three rank series resonant network (also can be five rank, seven rank or odd rank series resonant network higher) to carry out alternative traditional quarter-wave transmission line, because output loading network is opened a way to three order harmonicses, thus this power amplifier has three order harmonics rejections of enhancing under linear operation mode.
The direct current I of the power-amplifier stage of this power amplifier
dCwith fundamental current I
1the function being expressed as angle of flow α refers to formula (5) and (6), wherein I
maxfor the maximum current that transistor in power-amplifier stage can flow through, change described bias voltage VB1 and VB2 or VCS and VCG and namely change described angle of flow α and work under linear and nonlinear model to switch this power amplifier.
（5）
（6）
According to expression formula (4)-(6), the peak power output P of described power-amplifier stage
oUT, drain terminal efficiency eta and optimum impedance R
opt(7), (8) and (9) formula can be expressed as:
（7）
（8）
（9）
In embodiments of the present invention, described power-amplifier stage has two kinds of configurable mode of operations: linear model and nonlinear model.Wherein, linear mode in AB class state, the described angle of flow
between
with
between; Nonlinear model is operated in F class on off state, the angle of flow
equal
.Can be derived by (6) formula, work as the angle of flow
?
with
between when changing, the fundamental current I of power-amplifier stage
1do not have too large change, therefore according to (9) Shi Ke get, the optimum resistance value of AB class and these two kinds of mode of operations of F class will relatively, thus show that power amplifier of the present invention is under linear processes two kinds of mode of operations, can share an impedance transformation level network at same frequency, the value of the element namely in described impedance transformation level does not need to change.
Extreme value is asked to obtain to fundamental current expression formula (6) formula of power-amplifier stage: to work as the angle of flow
time, power-amplifier stage has maximum fundamental current.Therefore, preferably, the linear operation mode of described power-amplifier stage can be biased in the angle of flow
state, non-linear process planning is operated in F class on off state.Two kinds of mode of operations share same impedance transformation level, and its optimum resistance value is all matched shown in following formula (10):
（10）
In addition, because the size 1:2:3 of power-amplifier stage transistor M1-M4 is configurable, the power output of power-amplifier stage can realize regulating more flexibly.
Power amplifier described in the embodiment of the present invention is owing to adopting foregoing circuit structure, thus can when not increasing circuit complexity, linear processes two kinds of mode of operations can be supported simultaneously, and this power amplifier can cover wider frequency range (0.1G-1.5GHz) adapts to different communication standard application, and because each element in this power amplifier is configurable, thus make the power output of this power amplifier can flexible, thus effectively can improve the efficiency of power amplifier, and reduce power consumption, thus the optimization of power amplifier linearity and efficiency can be realized.This power amplifier is applied to the power consumption supporting to reduce application cost and transmitter chip in the radio-frequency (RF) front-end circuit of multiple communication standard largely.This power amplifier 430 or 430 ' not only can be applicable to described in the embodiment of the present invention transmitting set 10 in also can be applied in other communication system.
Refer to Fig. 1, the signal that described upconverter 410 receives the output of described analog baseband circuitry 300 carries out up-conversion.See also Fig. 1 and Fig. 5, upconverter 410 comprises passive voltage frequency mixer 411 and signal generator 412.
Described signal generator 412 provides oscillating driving signal for described passive voltage frequency mixer 411.This signal generator 412 provides square-wave signal.The duty ratio of this square-wave signal can be 25% or 50%.Preferably, described signal generator 412 produces the square-wave signal that duty ratio is 25%, and the square-wave signal that this duty ratio is 25% can provide the gain of many 3dB compared to the square-wave signal that duty ratio is 50%.
Described passive voltage frequency mixer 411 is by the signal up-conversion of I, Q two passages and superpose.Preferably, the whole circuit of this transmitting set 10 adopts difference channel structure, and the differential signal (I+, I-) of each to I, Q passage, (Q+, Q-) are superimposed as new differential signal (OUT+, an OUT-) output through mixing by this passive voltage frequency mixer 411.This passive voltage frequency mixer 411 comprises eight transistor T1-T8, every two of these eight transistors form common source transistors, wherein T1 and T2, T3 and T4, T5 and T6, T7 and T8 form common source transistors respectively, differential signal I+ is input to the source electrode of T1 and T2 common source transistors, differential signal I-is input to the source electrode of T3 and T4 common source transistors, differential signal Q+ is input to the source electrode of T5 and T6 common source transistors, and differential signal Q-is input to the source electrode of T7 and T8 common source transistors.Described signal generator 412 produces four road oscillating driving signal L01, L02, L03 and L04.Signal L01 is input to the grid of described transistor T1 and the grid of transistor T4 respectively, signal L02 is input to the grid of described transistor T5 and transistor T8 respectively, signal L03 is input to the grid of described transistor T2 and T3 respectively, and signal L04 is input to the grid of described transistor T6 and T7 respectively.The drain electrode of the drain electrode of described transistor T1, the drain electrode of T3, the drain electrode of T5 and T7 is connected and outputs signal OUT+, and the drain electrode of transistor T2, the drain electrode of T4, the drain electrode of T6 and the drain electrode of T8 are connected and output signal OUT-.One bias voltage is connected by the grid of biasing resistor with transistor T1-T8.The grid termination bias voltage of the transistor in this I, Q two-way circuit.This passive voltage frequency mixer 411 does not need DC power, and the linearity is good, is applicable to bandwidth applications.
Described passive voltage frequency mixer 411 comprises a frequency mixer IQ calibration module 413 further, this frequency mixer IQ calibration module 413 is connected between the grid end bias voltage of I and the Q two-way transistor of passive voltage frequency mixer 411, adopt the structure of difference current rudder, bidirectional current can be exported, then voltage is converted to by the resistance of output, thus realize carrying out difference control to the passive voltage frequency mixer grid terminal voltage of I and Q two passes, thus the IQ mismatch of calibration frequency mixer.
Refer to Fig. 1, described frequency synthesizer 500 provides local oscillation signal for described configurable transmitting set 10.This frequency synthesizer 500 has two kinds of configurable mode of operations: loop produces local oscillation signal and exports or pour into local oscillation signal output outside sheet.This frequency synthesizer 500 provides the frequency coverage of local oscillation signal to be 100MHz to 5GHz for described configurable transmitting set 10.
Described band-gap reference source circuit 600 provides bias voltage and bias current for other circuit except digital circuit.This band-gap reference source circuit 600 can produce reference voltage and reference current simultaneously.This band-gap reference source circuit 600 can suppress the deviation because the factors such as temperature, supply voltage and process corner fluctuation cause.
Described serial control interface circuit 710 and peripheral control unit (as the control unit in the cluster application of broadband or arrowband private network apply in control unit) be connected, control the mode of operation of the inner modules circuit of this configurable transmitting set 10.The circuit of serial control interface described in the embodiment of the present invention 710 is 4 line Serial Control, comprises SDI, SDO, SCLK and SCS serial line interface.
Described parallel data grabbing card circuit 720 is connected (arrowband private network digital baseband chip or broadband cluster digital baseband chip), for transmission of digital baseband signal with outside digital baseband chip.Adopt parallel data grabbing card circuit 720 can realize the transfer of data of higher rate.In the embodiment of the present invention, described parallel data grabbing card circuit 720 is that 12 parallel-by-bits control, and comprises 12 bit parallel data lines, two clock control lines, the enable control lines of launching and receiving.
This configurable transmitting set 10 as one independently chip can support the multiple communication standard such as private network communication, GSM, WLAN, WiMAX, LTE, the centre frequency that transmits covers 100MHz to 5GHz, thus both can support arrowband private network communication, broadband trunking communication can be supported again.
Refer to Fig. 6, the embodiment of the present invention provides a kind of wireless transmitting system 20 being applied to arrowband private network application model further.This wireless transmitting system 20 comprises arrowband private network digital baseband chip 810, configurable transmitting set 10, antenna 830, crystal oscillator 840 and control unit 850.Described crystal oscillator 840 provides reference frequency for the frequency synthesizer 500 of described configurable transmitting set 10.Described control unit 850, for controlling the serial control interface circuit 710 on described configurable transmitting set 10, configures the mode of operation of described transmitting set 10.
Described transmitting set 10 is configured to intermediate frequency up-conversion framework by described numerically frequency mixer 130 and realizes arrowband private network application model, and radiofrequency signal operating frequency covers 100MHz to 1.5GHz, and bandwidth supports 5kHz-2MHz.Described frequency synthesizer 500 provides local oscillation signal for this transmitting set 10, and described local oscillation signal source selects loop on sheet to produce or outer signal of filling with produces.Specific implementation process is, baseband signal is sent into described transmitting set 10 by arrowband private network digital baseband chip 810, carry out in digital baseband circuit 100 in described transmitting set 10 modulating, carry out digital-to-analogue conversion, filtering in described analog baseband circuitry 300 in D/A converting circuit 200, then carry out amplifying and upconversion process in described radio-frequency (RF) front-end circuit 400, then the signal of output is directly launched by external antenna 830.When arrowband private network is applied, sheet only needs the cooperation of arrowband private network digital baseband chip 810, antenna 830, crystal oscillator 840 and control unit 850 outward, and device for carrying out said is simple, and application cost is low.
As shown in Figure 7, the present invention further provides a kind of wireless transmitting system 30 being applied to broadband cluster application pattern.This wireless transmitting system 30 comprises broadband cluster digital baseband chip 910, configurable transmitting set 10, sheet external power amplifier 930, duplexer 940, antenna 950, crystal oscillator 960 and control unit 970 and forms.Described crystal oscillator 960 provides reference frequency for the frequency synthesizer 500 in described transmitting set 10.Described control unit 970, for controlling the serial control interface circuit 710 in described transmitting set 10, configures the mode of operation of described transmitting set 10.Described transmitting set 10 is configured to Direct conversion framework by described numerically frequency mixer 130 and realizes broadband cluster application pattern, and radiofrequency signal operating frequency covers 450MHz-5GHz, and bandwidth supports 200kHz-20MHz.In this broadband cluster mode of operation, being modulated in described broadband cluster digital baseband chip 910 of baseband signal is carried out, modulated signal is sent into described transmitting set 10 by described broadband cluster digital baseband chip 910, digital-to-analogue conversion, filtering, amplification and upconversion process is carried out in this transmitting set 10, then send into sheet external power amplifier 930 signal is amplified further, launch finally by duplexer 940 and antenna (950).
See also Fig. 8 and Fig. 9, second embodiment of the invention provides a kind of configurable transmitting set 10 ' further, the circuit structure of this transmitting set 10 ' is substantially identical with the circuit structure of described transmitting set 10, difference is, this transmitting set 10 ' comprises an IQ mismatch calibration circuit 22 further.This IQ mismatch calibration circuit 413 is for calibrating amplitude and the phase mismatch of the signal of this transmitter I, Q two paths.This IQ mismatch calibration circuit 22 adopts digital circuit, and after being arranged at the digital circuit of this transmitter, particularly, in the embodiment of the present invention, described IQ mismatch calibration circuit 22 is arranged between described digital baseband circuit 100 and D/A converting circuit 200.This IQ mismatch calibration circuit carries out crossing operation by configurable digital computational logic to the signal of I, Q two passes, convert I, Q input signal (I_in, Q_in) of coupling to unmatched signal (I_cal, Q_cal), thus the I/Q mismatch that precompensation rear class analog baseband circuitry 300 is introduced.
This IQ mismatch calibration circuit 22 comprises an I road signal calibration unit 22a and Q road signal calibration unit 22b.When the interchannel signal of I, Q two of this transmitter 20 exists amplitude mismatch amount α and phase misalignment dosage θ, described I road signal calibration unit 22a is used for I road input signal I_in being multiplied by (1-α/2) times rear addition with (θ/2) Q road input signal Q_in doubly and obtains new I road signal I_cal.Described Q road signal calibration unit 22b is used for Q road input signal Q_in being multiplied by (1+ α/2) times rear addition with (θ/2) I road signal I_in doubly and obtains new Q road signal Q_cal.Utilize and in this IQ mismatch calibration circuit 22, crossing operation is carried out to I, Q road input signal and can calibrate mismatch between I, Q two paths of signals well.In addition, this IQ mismatch digital calibration steps is adopted can to realize higher calibration accuracy.Described I road signal calibration unit 22a and Q road signal calibration unit 22b can utilize displacement and add operation to realize.
The configurable transmitting set of the Industry-oriented private network application that the embodiment of the present invention provides is by integrated digital baseband circuit on chip, D/A converting circuit, analog baseband circuitry, radio-frequency (RF) front-end circuit, frequency synthesizer, band-gap reference source circuit and interface circuit, described radio-frequency (RF) front-end circuit Integrated predict model is in the Pre-power amplifier of broadband cluster application simultaneously, be applied to the power amplifier of arrowband private network application and three, feedthrough buffer path arranged side by side, because foregoing circuit is all configurable, thus this transmitting set as one independently chip both can be applicable in the cluster application of broadband, also can be applied in arrowband private network application.The radiofrequency signal centre frequency of this transmitting set covers 100MHZ to 5GHz, bandwidth supports 5kHz to 20MHz, by foregoing circuit integrated on sheet, greatly can reduce application cost and the power consumption of this transmitting set, be applicable in various different communications applications environment.
In addition, those skilled in the art also can do other changes in spirit of the present invention, and certainly, these changes done according to the present invention's spirit, all should be included within the present invention's scope required for protection.
Claims (12)
1. a configurable transmitting set, it is characterized in that, comprise digital baseband circuit, D/A converting circuit, analog baseband circuitry, radio-frequency (RF) front-end circuit, frequency synthesizer, band-gap reference source circuit, serial control interface circuit and parallel data grabbing card circuit, described radio-frequency (RF) front-end circuit comprises Pre-power amplifier, power amplifier and feedthrough buffer, described Pre-power amplifier is applied to broadband cluster application, the signal of input is changed into the radiofrequency signal of frequency and bandwidth needed for the cluster application of broadband, described power amplifier is applied to arrowband private network application, the signal of input is changed into the radiofrequency signal of the required frequency of arrowband private network application and bandwidth, described feedthrough buffer forms feedback control loop between described transmitter and receiver, for to detect and according to the transmitting power of this transmitting set of feedback calibration, digital baseband signal outside described parallel data grabbing card circuit receiving sheet is also input in described digital baseband circuit, described digital baseband circuit is used for the digital baseband signal received to carry out modulating, bandwidth restriction, mixing and up-sampling process, described D/A converting circuit is used for the signal after described digital baseband circuit process to carry out digital-to-analogue conversion, described analog baseband circuitry is for the aliasing signal in signal after filtering digital-to-analogue conversion and noise signal, and described radio-frequency (RF) front-end circuit is carried out up-conversion to the signal after described analog baseband circuitry process and then launched the radiofrequency signal being applicable to arrowband private network application or broadband cluster application as required, described frequency synthesizer provides local oscillation signal for this transmitting set, and described band-gap reference source circuit provides bias voltage and bias current for other circuit in this transmitting set except digital circuit, described serial control interface circuit is connected with the controller of outside and is controlled the mode of operation of each circuit in this transmitting set by peripheral control unit.
2. configurable transmitting set as claimed in claim 1, it is characterized in that, described digital baseband circuit comprises digital modulator, base band formed filter, numerically frequency mixer and up-sampling circuit, described digital modulator is used for modulating the digital baseband signal outside described, modulation system comprises at least one in FSK, BPSK and DSSS, described transmitting set has intermediate frequency up-conversion and Direct conversion two kinds of frameworks, described intermediate frequency up-convert applications is in the application of described arrowband private network, and described Direct conversion is applied to described broadband cluster application; The signal modulated through described digital modulator enters described base band formed filter and carries out bandwidth restriction, then by through described in described numerically frequency mixer or bypass numerically frequency mixer realize intermediate frequency up-conversion and Direct conversion two kinds of frameworks of this transmitting set respectively, described up-sampling circuit is consistent for the sample rate of the described D/A converting circuit of the data transfer rate that makes this digital baseband circuit and export and rear class.
3. configurable transmitting set as claimed in claim 1, is characterized in that, described D/A converting circuit adopts full-differential circuits to have 10 precision, and wherein low four adopt binary code, and Gao Liuwei is realized by thermometer code.
4. configurable transmitting set as claimed in claim 1, is characterized in that, described analog baseband circuitry comprise across resistance low pass filter and with this across the passive low ventilating filter hindering low pass filter and connect.
5. configurable transmitting set as claimed in claim 4, it is characterized in that, described across resistance low pass filter employing second order Butterworth LPF, described across resistance low pass filter employing difference channel structure, be made up of two-stage calculation amplifier, first order operational amplifier (U1) positive output end be connected with load resistance (R311) in parallel and load capacitance (C312) between inverting input, simultaneously, this first order operational amplifier (U1) reversed-phase output be connected with load resistance (R311) in parallel and load capacitance (C312) between normal phase input end, the normal phase input end of second level operational amplifier (U2) is connected to after the reversed-phase output series resistance (R314) of this first order operational amplifier (U1), the inverting input of second level operational amplifier (U2) is connected to after the positive output end series resistance (R314) of this first order operational amplifier (U1), between the inverting input of described second level operational amplifier (U2) and positive output end and be connected to load capacitance (C315) between normal phase input end and reversed-phase output, resistance (R313) is connected between the inverting input of described first order operational amplifier (U1) and the reversed-phase output of described second level operational amplifier (U2) and between the normal phase input end of first order operational amplifier (U1) and the positive output end of described second level operational amplifier (U2), described passive low ventilating filter is connected to the described positive output end across resistance low pass filter and reversed-phase output.
6. configurable transmitting set as claimed in claim 5, it is characterized in that, described passive low ventilating filter is connected to the described difference output end across resistance low pass filter, there is single order Butterworth aluminium foil characteristic, the circuit structure of this passive low ventilating filter is: one end of two resistance (R321) is connected with the normal phase input end of second level operational amplifier (U2) and inverting input respectively, these two resistance (R321) other ends are as the difference output end of this analog baseband circuitry, after two electric capacity (C322) series connection, two ends connect described difference output end respectively, one resistance (R323) with connect after described two electric capacity (C322) be connected in parallel.
7. configurable transmitting set as claimed in claim 1, is characterized in that, described radio-frequency (RF) front-end circuit comprises a duplexer further and is connected with the output of described power amplifier.
8. configurable transmitting set as claimed in claim 1, is characterized in that, the working frequency range of described Pre-power amplifier covers 450MHz to 5GHz, and the working frequency range of described power amplifier covers 100MHz to 1.5GHz.
9. configurable transmitting set as claimed in claim 1, it is characterized in that, described frequency synthesizer has two kinds of configurable mode of operations: loop produces local oscillation signal and exports or pour into local oscillation signal output outside sheet, and this frequency synthesizer provides the frequency coverage of local oscillation signal to be 100MHz to 5GHz.
10. configurable transmitting set as claimed in claim 1, is characterized in that, described serial control interface circuit is four line Serial Control, comprises SDI, SDO, SCLK and SCS serial line interface.
11. configurable transmitting sets as claimed in claim 1, is characterized in that, parallel data grabbing card circuit is that 12 parallel-by-bits control, and comprises 12 bit parallel data lines, two clock control lines and the enable control line of launching and receiving.
12. configurable transmitting sets as claimed in claim 1, it is characterized in that, described configurable transmitting set adopts quadrature up-conversion framework, there is homophase (I) and quadrature phase (Q) two bars passage, this configurable transmitting set comprises an IQ mismatch calibration circuit further, this IQ mismatch calibration circuit is for calibrating this transmitter I, the amplitude of the signal of Q two paths and phase mismatch, this IQ mismatch calibration circuit is connected between described digital baseband circuit and D/A converting circuit, this IQ mismatch calibration circuit comprises an I road signal calibration unit and Q road signal calibration unit, as the I of this transmitter, when there is amplitude mismatch amount α and phase misalignment dosage θ in the interchannel signal of Q two, for being multiplied by I road input signal (I_in), (1-α/2) are doubly rear is added with (θ/2) Q road input signal (Q_in) doubly I road signal (I_cal) obtained after calibrating to described I road signal calibration unit, for being multiplied by Q road input signal (Q_in), (1+ α/2) are doubly rear is added with (θ/2) I road signal (I_in) doubly Q road signal (Q_cal) obtained after calibrating to described Q road signal calibration unit.
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| US20150280946A1 (en) * | 2014-03-27 | 2015-10-01 | Qualcomm Incorporated | Feedback receive path with low-if mode |
| CN104052407B (en) * | 2014-05-22 | 2018-06-22 | 晨星半导体股份有限公司 | A kind of method and device for inhibiting harmonic signal |
| US9590676B2 (en) * | 2014-11-18 | 2017-03-07 | Mediatek Inc. | Signal receiving apparatus and signal receiving method |
| US9806745B2 (en) * | 2015-02-10 | 2017-10-31 | Marvell World Trade Ltd. | Systems and methods for low pass filter mismatch calibration |
| CN104915540A (en) * | 2015-04-24 | 2015-09-16 | 广西中医药大学 | Western medicine hypertension grading system and method based on traditional Chinese medicine indications |
| JP6011699B1 (en) * | 2015-09-16 | 2016-10-19 | Ｎｔｔエレクトロニクス株式会社 | Digital signal processing apparatus and optical transceiver |
| CN105450178B (en) * | 2015-12-29 | 2018-05-25 | 江苏星宇芯联电子科技有限公司 | A kind of mixer of recoverable IQ mismatches |
| US10256848B2 (en) * | 2016-04-19 | 2019-04-09 | Murata Manufacturing Co., Ltd. | Communication unit |
| CN105720996B (en) * | 2016-05-06 | 2018-12-07 | 电子科技大学 | Direct conversion system and its implementation in a kind of Digital Clustering hand-held set |
| CN106878216B (en) * | 2017-02-14 | 2023-08-08 | 安徽北方微电子研究院集团有限公司 | FPGA-based low-voltage power supply carrier communication modulation-demodulation circuit |
| CN107204785B (en) * | 2017-04-23 | 2019-10-15 | 复旦大学 | A kind of digital transmitter of configurable low-power consumption |
| CN107181494B (en) * | 2017-05-16 | 2019-04-12 | 成都市深思创芯科技有限公司 | A method of based on ANN Control transmitter operating mode |
| CN108259048B (en) * | 2017-12-27 | 2020-08-28 | 无锡中感微电子股份有限公司 | Passive mixer driving power amplifier device and nonlinear compensation method |
| KR102419643B1 (en) * | 2018-03-29 | 2022-07-11 | 삼성전자주식회사 | Current-to-voltage converter providing a variable bandwidth and apparatus including the same |
| CN108494530B (en) * | 2018-05-18 | 2023-05-12 | 福州大学 | Software radio data transmission system and transmission method based on LTE signals |
| CN109067443A (en) * | 2018-09-07 | 2018-12-21 | 东南大学 | A kind of extensive MIMO communication system of miniaturization 5G |
| CN115549703A (en) * | 2022-10-09 | 2022-12-30 | 芯翼信息科技(上海)有限公司 | Integrated CMOS power amplifier wide voltage transmitter and transceiver |
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| CN1964339A (en) * | 2005-11-08 | 2007-05-16 | 北京三星通信技术研究有限公司 | Software radio-based OFDM transmitting and receiving machine able to upgrade |
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