At above problem, the purpose of this invention is to provide the voice automatic calling system device that a kind of general high efficiency and compressible note are deposited voice messaging.
Native system comprises notifies from a phone call main frame and mobile phone, and main frame is deposited Power Generation Road, logic control circuit, information-storing device, speech treatment circuit, frequency synthesizer and radio-frequency power transmitter by wired and wireless speech channel automatic processor, central processing unit, format and formed; Its mobile phone is made up of receiving circuit, encoded control address code initialization circuit, speech memory, the control of logic central authorities, voltage detecting, display driver and information distribution circuit.At the automatic recording playback sound of the control of logic control circuit described in the technical scheme of the present invention voice messaging, when playback, produce the clock frequency of a lifting by the control clock generating circuit, remove control information memory playing speed, shorten the voice transmission time; And in the radio-frequency (RF) power amplification transmitter, frequency synthesis is promoted level separate placement with high-power output stage, high-power output stage and antenna are placed on one, realized the low-consumption high-efficiency wireless radiation.
Wired and wireless speech channel automatic processor of the present invention comprises integrated operational amplifier IC4, decoder AM619, DTMF matrix keyboard circuit AM614, two audio-frequency generator HN9102 and central processing unit IC10; The output of above-mentioned integrated operational amplifier IC4 links to each other with the input of decoder AM619, be connected with ten data lines between decoder AM619 output and the dtmf key dish matrix circuit, dtmf key dish matrix circuit links to each other with two audio-frequency generator HN9102 by eight transmission lines, and the input with the BCD-7 segment decoder of decoder AM619 output (D1, D2, D3, D4) central processing unit IC10 links to each other.
Wired and wireless speech channel automatic processor of the present invention also comprises integrated recording and playing circuit AM610, voice reporting integrated package AM613, AM612; Voice reporting integrated package AM613, AM612 input link to each other with decoder AM619 output, and the secondary M of its output and coupler joins.The input of integrated recording and playing circuit AM610 links to each other with the output (Q2) of counter IC16, the output (Q3) of counter IC8 respectively, central processing unit IC10 links to each other with the input of integrated recording and playing circuit AM610 by control line (TY, KH), and the audio output of integrated recording and playing circuit AM610 (Y1, Y2) links to each other with coupler L5.
Format of the present invention is deposited Power Generation Road and is made up of logic control circuit, information-storing device AM615, central processing unit IC10 and clock generation circuit; Logic control circuit links to each other with information-storing device AM615 by recording playback sound control end (P/ R), work indication end (E), work control end (C), and link to each other with clock generating circuit by control end (F), central processing unit IC10 links to each other with logical circuit by recording control end (KR), playback control end (P) and storage indication end (X), and the input end of clock of clock generating circuit (CIN) links to each other with information-storing device AM615 clock end (CL).
Radio-frequency power transmitter of the present invention is made up of splitter FLQ, 4 thick mould integrated package M57741, mixer HLQ, need the signal of emission to be divided into four the tunnel through splitter FLQ, be tapped on four thick mould integrated package M57741 by feeder line, after power promotes to amplify, after inductance, electric capacity frequency-selecting, input to mixer HLQ, receive antenna by low pass filter again.
Encoded control of the present invention and address code initialization circuit are made up of triode BG1, frequency conversion demodulation integrated package AM617, decoder AM619, microprocessor AM616; The signal of frequency conversion demodulation integrated package after resistance R 9, capacitor C 43 demodulation passes to decoder AM619 decoding, decoder AM619 links to each other with microprocessor AM616, triode BG1 is connected on the economize on electricity pulse output end (46) of microprocessor AM616, and this transistor collector output switching voltage is delivered to receiving unit.
Voltage detecting of the present invention, the control of logic central authorities, display driver circuit and speech memory are made up of crystal oscillator J, microprocessor AM616, speech memory AM618; Crystal oscillator J is connected on the input end of clock (54 of microprocessor AM616,59), 12 lines select control end (30 with five sections sheets of microprocessor respectively, 35,53,51,37), recording playback conversion and control end (28), output terminal of clock (27) and five sections work indication ends (29,34,36,50,52) five sections sheets with speech memory select (1C, 2C, 3C, 4C, 5C), recording playback end of convert (P/ R), input end of clock (CLK) and work indication end (1E, 2E, 3E, 4E, 5E) link together, the playback control end (31) of microprocessor AM616 links to each other with LF power amplifier LN386 respectively with the audio output (12) of speech memory AM618.
Advantage of the present invention is: 1. wireless by central processing unit and the realization of wireless and wired speech channel automatic processor, wireline interface multiple signals are handled automatically, and the bright called number of dialling of voice verification newspaper has overcome the miscellaneous equipment misinformation and exhaled phenomenon.2. promote the speech memory clock frequency, make the frequency conversion voice signal give transmitter, thereby improved single-frequency point user capacity; 3. frequency synthesizer and power are promoted level and separate with the radio-frequency power amplifying stage, power-amplifier stage is placed near the antenna, and reaching low-consumption high-efficiency does not have wire spoke and penetrate, and improves laser propagation effect.
Fig. 1 is the main frame block diagram, and A to C and D are a plurality of cell signal speech channel automatic processors among the figure, and wherein A to C is the speech channel processor of telephone line interface, and D is the processor of wave point, and they mainly finish crier's information processing.E is that central processing unit, logic control circuit, format are deposited Power Generation Road, information-storing device, on-screen display circuit.F is comprehensive detection and operating equipment, finishes programming, shuts down and service function such as to manage, to group busy.G is a native system alternating current-direct current automatic power equipment.H is that frequency synthesizer and radio-frequency power promote equipment, finishes the modulation of notifying from a phone call signal and promotes output.I is a 100W radio-frequency power transmitter.J is a system of transmit antennas, and signal is launched with the form of wireless radiofrequency electric wave.
Fig. 2 is the cell phone system block diagram, the speech calling mobile phone is made up of unit such as receiving circuit, decoding, microprocessor, speech memories, comprise that the radio frequency height puts and the first local oscillator a, secondary mixing device, intermediate frequency amplifier and audio output circuit b, encoded control and address code initialization circuit c, ring and audio-frequency power amplifier g, central control, voltage detecting, display driver and information distribution circuit d, speech memory f and display e.The signal that antenna RX receives is input to next stage, with the first local oscillator mixing, produces frequently, exports after amplifying, and gives c encoded control and address code initialization circuit and f speech memory respectively.Input to logic central authorities control and treatment circuit when receiving decoding information, discern through computing herewith whether the machine address code is consistent, then control the f speech memory and take down in short-hand soon and deposit, drive the e display and show.Send bell signal when storage finishes, then emit a current up-to-date information if trigger playback button.
With reference to figure 3, the high-frequency signal that receives is received into by the antenna resonance circuit that inductance L 1, L2, capacitor C 1, C2, C3 form, by the low pass filter of forming by inductance L 3, L4, capacitor C 4, C6, after filtering out the part interference signal, enter high-frequency tuner, the high-frequency signal of selecting is added in the grid of high frequency amplifier tube BG1.Capacitor C 9, inductance L 5 are formed series resonant circuit, diode D1 conducting when overflow, the choking phenomenon that causes in the time of can preventing overflow effectively, inductance L 6 and capacitor C 13 resonance are on receive frequency, signal after process triode BG1 high frequency amplifies is by capacitor C 15 and inductance L 7 frequency-selectings, through after the band-pass filter of forming by capacitor C 18 and inductance L 8 and capacitor C 20 inductance L 9, be coupled to the signal input part of frequency conversion demodulation ic chip 1 through capacitor C 21 again.In frequency conversion demodulation ic chip 1 (AM617) inside high-frequency signal having been carried out a radio frequency amplifies.The crystal oscillating circuit of forming by fundamental crystal X4, triode BG3 and peripheral cell, the frequency that produces is behind 13 frequency triplings of inductance L, being coupled to triode BG2 through circuit C39 amplifies, and by inductance L 12 once more frequency tripling input to capacitor C 35 and be coupled to the LC resonant network that inductance L 11, capacitor C 36 formed, after frequency-selecting, by the first local oscillation signal source of 11 spoke sine wave freuqencies such as level output of inductance L as frequency conversion demodulation ic chip 1.The radio frequency amplifying signal enters first mixer stage through capacitor C 21, imports first local oscillation signal by 25,26 pin, goes out 10.7MHz first intermediate-freuqncy signal through the mixing difference frequency, and crystal oscillator X3 constitutes (centre frequency is 10.7MHz, and bandwidth is 15Mhz) band pass crystal filter.Filtered intermediate-freuqncy signal is admitted to 21 pin, and carry out the mixing second time (the second mixed signal is shaken by frequency conversion demodulation ic chip 1 inside and enters amplification of second intermediate frequency and phase discriminator through inside.Second intermediate-freuqncy signal is after frequency conversion demodulation ic chip 1 inside is exaggerated filtering, and the orthogonal slot of 13,14 pin by frequency conversion demodulation ic chip 1 produces the phase shifts of 90 degree, and the audio signal that frequency discrimination goes out is from the 16 pin output of frequency conversion demodulation ic chip 1.Owing to adopted the preemphasis measure at transmitting terminal, be distortion through the audio signal behind the frequency discrimination, just restored behind its deaccentuator with the external resistance R 9 of 16 pin, capacitor C 31, C43 composition.
In addition, the squelch circuit in frequency conversion demodulation ic chip 1 inside adopts signal triggering type noise elimination mode, and it is to control the noise elimination silencer switch by received signal field intensity testing circuit output level (13 pin).By adjusting the external noise elimination potentiometer W2 of 12 pin of frequency conversion demodulation ic chip 1,19 pin output low level when receiving no input signal is added on the center head of potentiometer W1, thereby with noise signal short circuit ground connection, 13 pin become high level by low level simultaneously.
Audio signal after the past is heavy is delivered on the potentiometer W1, deciphers and be converted to the output of 16 line time sequential pulses through the inner DTMF of decoder IC2 (AM619).
With reference to figure 4, the logic control part is finished by microprocessor chip IC3 AM616.Produce the positive pulse that resets at 2 pin of microprocessor IC3, so microprocessor IC3 starts working, external crystal J1 starting of oscillation, 3.58MHz signal after chip internal is through 30 grades of frequency divisions be 1: 3 square pulse voltage from economize on electricity pulse output end 46 pin output 0.2MHz duty ratio, be added on the base stage of triode BG1, receiving unit is in the interruption accepting state.The P16-24 of microprocessor IC3 is this machine address code input, changes the decimal system output of decoder IC2 AM619 and the line between the P16-P24, can change the address code of beeper own.After the receiving element that is in the interruption accepting state is received paging station's signal, the upset of triggering squelch circuit, 13 pin of frequency conversion demodulation ic chip 1 (AM617) are exported the P49 pin that a low level adds microprocessor IC3, start decoding circuit work, after first coding of main frame emission is by decoder identification, it by the economize on electricity pulse output end P46 pin of microprocessor IC3 output width 4 seconds negative pulse, control receiving unit work 4 seconds, at this moment, if when main frame signaling and mobile phone address code are inconsistent, then after 4 seconds, microprocessor IC3 control complete machine is in sleep state, after about 20 seconds, circuit reset is in the interruption accepting state again.If the main frame signaling is consistent with the mobile phone address code, then microprocessor IC3 (AM616) internal loop latch triggers upset, and recording control end P28 exports a negative pulse, and the negative pulse time-delays in 4 seconds of economize on electricity pulse output end P46 transfer time-delay in 20 seconds to.P28 exports 7 pin of a negative pulse to speech memory IC4 when the recording control end, and speech memory IC4 (AM616) is activated work, and the audio signal of exporting from receiving unit enters memory, and storage finishes after 20 seconds.Speech memory IC4 (AM616) output one negative pulse is given microprocessor IC3 (AM616), after inter-process, export bell signal to power amplifier, simultaneously by ring back tone output P33, playback control end P31 output low level is opened power amplifier, and the ring up signal promotes loud speaker and sounds.Click the playback button K9 key on the keyboard, control end P48 pin is imported a high level, because internal counter latchs effect, the last sustaining voltage of notifying from a phone call of memory, AM618 is in the playback operating state through gate circuit control speech memory, simultaneously, playback control end P31 output low level, power amplifier is opened, and audio signal enters power amplifier by the audio output P12 pin output of speech memory AM618, amplifies back promotion loud speaker and sounds.Speech memory is subjected to the control of microprocessor IC3 successively to write down five times and notifies from a phone call content, and the user can select to listen to wherein one section or five sections by keyboard switch, and playback capable of circulation.When mobile phone the 6th time is notified from a phone call, primary call content will be washed off and be stored new content, and the like.When the firm connection of power supply, one is detected voltage promptly by the voltage detecting end P60 input of microprocessor IC3 AM616, handles through internal comparator, and control is reported to the police circuit is taken place, and when electric voltage dropping, detects voltage and falls thereupon; When electric voltage dropping during to predetermined threshold voltage, the upset of chip internal trigger, alarm sound generation circuit working, ring back tone output P33 are imported one group of keying audio voltage power amplifier, and power amplifier also powers up work simultaneously, promotes loud speaker generation chimes of doom.
With reference to figure 5, off-hook adopts elements such as optical coupler, counter IC16 and relay to finish.When outside line had bell signal, the optical coupler conducting provided carry signal for counter IC16, during the 2nd bell, counter IC16 exports to triode 5BG1 high level, triode 5BG1 conducting, relay J adhesive, the closed telephone wire of contact J1-K1, ring stops, and has realized automatic off-hook.Triode 5BG1 collector electrode step-down level during off-hook, remove frequency divider IC6, gate circuit IC7 cleared condition, make their starting oscillation frequency divisions, frequency divider IC6 exported a high level when speech finished, and sent a reset signal for circuit for answering counter IC16 reset terminal RST, made the counter IC16 resetting of zero, triode 5BG1 place off state, relay J discharges, and disconnects telephone channel, has realized on-hook in limited time.Triode 5BG1 current collection high level very makes frequency divider IC6 be in zero clearing failure of oscillation state when the counter IC16 resetting of zero.When crier's speech finishes on-hook, telephone wire input busy tone, through single-tone decoder IC9, IC10 twice frequency-selecting busy tone frequency and busy tone spacing frequency, 8 end output low levels at single-tone decoder IC10, through the anti-phase output high level of inverter, to off-hook counters IC16 zero clearing, realize the busy tone on-hook.Behind the signal processor off-hook, counter IC16 output Q2 sends out high impulse for verbal cue circuit voice trigger end, sends prompting " request call number ".Dtmf signal is coupled through coupler, and integrated operational amplifier IC4 amplifies and to input to decoder AM619 input and be converted to binary-coded decimal and exported by conversion times DV.Decoder AM619 also exports 16 line time sequential pulses, and binary-coded decimal and DV are transported to the knowledge decoding circuit and know sign indicating number.DTMF decoding part mainly is made up of decoder IC3, and decoder AM619 output decimal data triggers DTMF matrix keyboard circuit AM614 respectively, realizes the called number storage.The Intelligent Recognition part is mainly by microprocessor, BCD-7 segment decoder, and counter is formed.The DV and the binary-coded decimal of coming by double-tone conversion, translate successively into BCD-7 segment decoder input from data wire D1, D2, D3, D4, whether by display code displaying number, and to be input to that central processing unit discerns be to notify from a phone call useful number and allow to notify from a phone call number, thereby whether control notifies from a phone call.As not being to notify from a phone call number, then control voice warning circuit output " dialing is wrong " " this number stopped using and asked on-hook ".The voice reporting part is made up of language circuit and speech simulation switch, and counter IC8 exports high level, the pronunciation of control count off circuit, the audio signal of being wailed of then quoting the user automatically and being dialled is transferred to coupler, the crier then hear notify from a phone call whether sign indicating number dial correctly.Integrated recording and playing circuit AM610 has been adopted in voice suggestion, records in advance, and the secondary bell automatic off-hook that shakes when dialing is dialled main frame when notifying from a phone call, off hook signal trigger language circuit prompting " request notify from a phone call number ".Notify from a phone call number when having dialed, through knowing decoding circuit identification, trigger the speech trigger end of integrated recording and playing circuit AM610 by control signal TY, KH, the other end prompting of verbal cue circuit " this number stopped using and asked on-hook ", or " the dialing mistake, on-hook redials." correct as dialling, sequence circuit send high level, makes the language circuit send " yor're through 16 seconds ".The program control part mainly is made up of gate circuit IC7 sum counter IC8, and input signal has off hook signal, 1HZ signal and decoding part high level signal.Off hook signal and 1HZ signal are condition of work, being deciphered the part high level and trigger, is right when the crier dials by called number, knows decoding circuit decoding part and exports high impulse, inputing to and making the memory circuit recording with door IC7:D12 pin is high level, diode D14 feedback and door IC7:D self-insurance.Be high level with door IC7:A simultaneously, the 1HZ signal makes counter IC5 work, Q1-Q9 exports in order from output, the following several parts of control: two audio-frequency generator IC3 outages of output Q2 control and language board circuit redial key, output Q5 cuts off audio amplification signal, connects the two-tone diaphone audio frequency, output Q6 control self circuit, the zero clearing self-insurance, output Q3 control language circuit, prompting " yor're through 16 seconds ".After call finished on-hook, this circuit was located standby condition again.
With reference to Figure 11, LEDF is the emission indicator light, and LED1~LED8 is the storage indicator light, if meaningful and when not letting slip sound, the storage indicator light is bright in the memory; When storage indication end X1~X8 was low level, NOR gate Q9A, Q9B, Q end all were high level, with door Q10 output high level control offhooking relay off-hook.K1 is inside and outside running clock change over switch, when using this unit separately, uses internal frequency.Clock pulse makes counter 4017 cycle count successively, difference map interlinking 9 internal counter input CPA, and 0 for allowing recording high level output.When off hook signal was arranged, from recording control end CPB input high level, IN was an audio input end, is used for importing 4 information on the telephone wire respectively, and OUT is an audio output.
The CYB end connection layout 7CYB end of Figure 10.
Fig. 9 is made up of two Fig. 8, a sound recording task allocator, a playback distributor.
Fig. 8 is made up of 4 Fig. 7 and 1 voice memory feature AM615.
With reference to figure 7, E is the work indication; P/ R is a recording playback sound change over switch control end; C is the work control end; CL is an input end of clock; IN is an audio input end; The OUT audio output.1. start shooting zero clearing by time delay resistance R5, at this moment capacitor C 5 is formed delay circuit, with make with door T5 or door T16 or door T3, with door T4 or door T16 (with door T2Q end be 0 level) the latching circuit losing lock formed, promptly export 0 level with door T4.This pulse makes or door T14 (or door T14Q end be 0 level), with the latching circuit losing lock that door T8 or door T7 form, be in wait state.2. recording automatically (the recording condition, with door T11Q end be that the C end is 0 level, recording playback sound conversion and control end P/ R is that 0 level get final product) state at the beginning, work indication E is a high level, with door T5Q end be high level; If to add to control recorded audio signals KR be high level and the recording of permission high impulse is arranged, and then is high level with door T2Q end, through or door T3, become high level with door T4, T4Q end, add to or a door T3 input forms self-locking.Making recording playback sound change over switch control end P/ R with door T4Q end high level through reverser T10 is low level, through making the C point become 0 level with door T11, realizes recording again.Recording finishes, work indication E step-down, through or door T16, become 0 level again with a door T4Q, become high level through reverser T10, recording playback sound conversion and control end P/ R, through with door T11C point be high level, work and indicate E to become high level subsequently.Be 0 level with a door T5Q when work indication E step-down, or a door T16Q becomes 0 level, the delayer of being made up of resistance R 1, capacitor C 4 makes inverter T10 when being low level with door T4Q, can not export high level at once, and then NOR gate TQ6 has high impulse to export; The delayer that resistance R 1, capacitor C 1 are formed, with door T5Q end during for low level or door T14 output low level not, NOR gate TQ6 output this moment high level, or door T7 go out to export high level then or door T7, the latching circuit formed with door T8 or door T14 from latching, be high level with door T8Q end.3. playback automatically, when supposing that playback control end P is high level, recording playback sound conversion and control end P/ R is a high level, with door T8Q end for high level (promptly having recording substance not let slip) then NAND gate T1 output low level control logical circuit among Figure 10 through diode D1, the high level that counter BG4 output Q5 sends here among Figure 10 makes with door T11 output C through Q7 and becomes low level, the beginning playback, after 10 seconds, clock pulse CIN has the 1.79MHz frequency to deliver to playback circuit control playback system end CYB from input end of clock CL to become high level, work control end C is a high level, and playback finishes.
With reference to Figure 11, integrated operational amplifier Q1, Q2 form the oscillator clocking, and frequency divider IC2 output Q0, Q1, Q2, Q3 are connected on the playback control end CPA of four Fig. 9 respectively.When there was the playback process certain unit, emissioning controling signal FK had low level, the blocking of oscillator, and frequency divider is not worked, and playback provides audio signal simultaneously, and emissioning controling signal FK also is used for controlling transmitter.
With reference to Figure 10, when clock control end F becomes low level, (meaningful will the emission) integrated operational amplifier T1, T2, the oscillator that crystal oscillator J forms is through frequency divider BG1, the BG2 frequency division obtains the frequency of 1.79MHz at frequency divider BG1 output Q1, obtain the frequency of 1.7MHz at frequency divider BG2 output Q12,1.7MHz frequency through the clock of T4 as counter BG4, counter BG4 output Q1 Q2 Q3 Q4 when output or a door BG5:A export high level, make boot code key on the analog switch T7:A switch connection two-tone diaphone keyboard, produce double-tone, 13 analog switch T7:B output to transmitter through capacitor C.During counter BG4 output Q5 output, counter BG4 is no longer counted, the playback control end CYB end of counter BG4 output Q5 high level map interlinking 7 through inverter T6 and door T4.1.7MHz go back warp and the clock of door T3 as counter BG3, make BG3 can not continue counting through inverter T5 and door T3 during counter BG3 output Q9 output, counter BG3 output Q9 high level makes with door T8 output has the output of 1.79MHz to remove to control playback circuit, when playback finishes, clock control end F becomes high level, and frequency divider BG2, counter BG3, BG4 reset.
With reference to Figure 13, Figure 14, the speech treatment circuit is made up of preemphasis amplifier, the two-way slicer of diode, the active low pass filter of two utmost point second orders and amplifier.The audio signal of sending here from information row bill unit is added to the upper end of potentiometer W301, after sending into two-way slicer (forming) audio signal limit spoke behind the preemphasis amplifying circuit (forming) by diode D301, D302 and triode BG309 by integrated package JC306 (a), capacitor C 303, resistance R 308, can produce a lot of higher harmonic components, the two-stage second order active low-pass filter that is made of filter JC306 (b), (c) and peripheral Resistor-Capacitor Unit comes filtering again.Slicer and low pass filter have constituted the instantaneous frequency deviation control circuit, with the restriction maximum frequency deviation, prevent to cause when input signal is excessive modulation.The every octave of spoke degree decay 18dB/ when low pass filter makes the relative 1KHz signal of the above audio signal of 3KHz, audio signal after being handled by the instantaneous frequency deviation control circuit is amplified on the variable capacitance diode D305 (2CB11) that is added in the voltage controlled oscillator (VCO) through JC306 (d) again, realizes direct frequency modulation resistance R 322, R323, provides an appropriate bias voltage for variable capacitance diode D305.The frequency synthesizer that produces carrier frequency is made up of following each several part: voltage controlled oscillator BG301 (2SK192AGR), buffer amplifier BG302, BG305 (FDG9016G), dual-mode frequency divider JC304 (uPB571C), low pass filter JC305 (741), phase-locked loop intergrated circuit JC301 (this circuit inside of RSC145152 comprises benchmark vibration/frequency divider, programmable frequency divider, gives the control of frequency division modulus, phase discriminator, out-of-lock detector etc.).Voltage controlled oscillator is operated in the 150MHz frequency range, and output is coupled to through capacitor C 334 that triode BG302 (FDG9016G) buffering is amplified, signal is divided into two parts then.A part is coupled to triode BG305 (FDG9016G) through coupling capacitance C336 and amplifies, be sent to dual-modulus prescaler JC304 (uPB571C) by capacitor C 384 again, according to modulus control signal from phase-locked loop intergrated circuit JC301 (RSC145152), with the signal of 220MHz frequency range divided by 64 or 65, obtain the signal of a lower frequency, be sent to the programmable frequency divider of phase-locked loop intergrated circuit JC301, here according to frequency divider JC302,16 data that JC303 provides are carried out frequency division again, the signal that to obtain a frequency at last be 6.25MHz is sent into phase discriminator, and these two signals carry out phase demodulation in the mirror device.Once the phase deviation steady state value of these two signals, phase discriminator just produces a pulse train, after low pass filter JC305 filtering, be converted to direct-flow error voltage, this voltage is added on the variable capacitance diode D306 (2CB11) in the voltage controlled oscillator, change the electric capacity of oscillation circuit, thereby played the effect of tuning pressuring controlling oscillator frequency.Make the phase difference value of voltage controlled oscillator and benchmark oscillator signal constant, the result makes the pressuring controlling oscillator frequency locking.Another part of triode BG302 output signal is through triode BG303 (3DG302B), the tuning amplification of BG304 (2SC2407) two-stage, obtain a modulated RF power signal greater than 200mW by three joint LC low pass filters, this signal is sent to pushing unit by radio frequency coaxial-cable.JK302, JK303 is two eight bit switches of stirring only, the break-make of switch has determined the output frequency of frequency synthesizer, the setting of switch is that if the loop losing lock, the out-of-lock detection end of phase-locked loop intergrated circuit JC301 (28 pin) output voltage is dropped to below the 2.4V by 4.2V along with the difference of Frequency point changes, make triode BG307 (3DG635B) transfer cut-off state to, triode BG303 can't life's work, does not have power output, prohibits the purpose of sending out thereby play losing lock.When antenna port open circuit or short circuit; the detection voltage of sending here from power amplifier unit raises; this voltage triggered controllable silicon BG308 (3CT01) conducting; triode BG306 (3DG635B) is transferred to by shape; make triode BG303 cisco unity malfunction simultaneously; inactivity output, thus play the effect that short-circuit protection left by antenna.For making circuit working stable, adopted integrated package of pressure-stabilizing JC307 (7808), JC308 (7805) provides required 8V, 5V voltage for circuit, the required 8V power supply in words discharge road often adds, when emissioning controling signal PTT is low level, triode BG310 (3CG6 36B) conducting, the 8V power supply is added on remaining circuit by triode BG310, whole transmitter operate as normal.Promote the level core component and adopt radio frequency integrated thick-film circuit.This circuit working is imported under the promotion of 0.2W signal at the Class A magnifying state, exportable 5W power, and capacitor C 1-C6 plays the low frequency filtering effect.Power supply adopts the 8V power supply, is imported by 3 pin.High-frequency signal after the amplification is coupled to power-amplifier stage through capacitor C 9 again through behind the filter.
With reference to Figure 15, power-amplifier stage adopts thick vlsi die, comprises four splitters and four mixers, and four thick mould integrated package M57741 of four splitter FLQ, 1.2.3.4, four mixer HLQ circuit are formed the radio-frequency power transmitter, by low pass filter, connect antenna load.Every technical indicator is all above the separate piece device specifications.This element and antenna put together use, have saved long feeder line, power attenuation is few, the emission effciency height.