CN103457499A - Grid-connected inverter and compensation method of direct current bus voltage in grid-connected inverter - Google Patents

Grid-connected inverter and compensation method of direct current bus voltage in grid-connected inverter Download PDF

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CN103457499A
CN103457499A CN2013104249841A CN201310424984A CN103457499A CN 103457499 A CN103457499 A CN 103457499A CN 2013104249841 A CN2013104249841 A CN 2013104249841A CN 201310424984 A CN201310424984 A CN 201310424984A CN 103457499 A CN103457499 A CN 103457499A
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inverter bridge
inverter
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罗利文
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Shanghai Jiaotong University
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Abstract

Provided are a grid-connected inverter and a compensation method of direct current bus voltage in the grid-connected inverter in the field of power transformation technologies. The grid-connected inverter comprises a boosted circuit, a bus capacitor, a processor and an inverter bridge. Direct current is input to the input end of the boosted circuit. The bus capacitor is located between the boosted circuit and the inverter bridge. The output end of the boosted circuit is connected with the input end of the inverter bridge. A first module interface of the processor receives a voltage sampling signal of the bus capacitor. The processor is connected with the control end of the inverter bridge and used for comparing the voltage sampling signal of the bus capacitor with preset voltage, when the voltage sampling signal is higher than the preset voltage, the inverter bridge is controlled to improve the output power, and when the voltage sampling signal is lower than the preset voltage, the inverter bridge is controlled to reduce the output power. The voltage fluctuation amplitude of the bus capacitor can be greatly reduced, the circuit stability is improved, and the additional cost is not increased.

Description

The compensation method of DC bus-bar voltage in combining inverter and combining inverter
Technical field
What the present invention relates to is a kind of device and method of electric power power transformation technical field, the specifically compensation method of DC bus-bar voltage in a kind of combining inverter and combining inverter.
Background technology
The general running of photovoltaic combining inverter is as follows, the output of photovoltaic (PV) battery is boosted through booster circuit, obtain sufficiently high DC bus-bar voltage on bus capacitor, micro-control unit (Micro Controller Unit, be called for short " MCU ") or digital signal processor (Digital Signal Processor, abbreviation " DSP ") control inverter bridge and realize sine-converter, Using Sinusoidal Pulse Width Modulation (the Sinusoidal Pulse Width Modulation of inverter bridge output, be abbreviated as SPWM) ripple becomes and the mains frequency sine wave after the LC filter, be connected to the grid.
In order to realize sine-converter, DC bus-bar voltage need keep relative stability on a rational level.The too high withstand voltage properties to device (bus capacitor, inverse switch pipe etc.) of DC bus-bar voltage requires just high, and cost increases greatly; DC bus-bar voltage is too low, may cause the SPWM modulation ratio to be greater than 1, can not realize sine-converter.
For the parallel networking type photovoltaic inverter, the stable balance that depends on PV input electric energy and inversion output electric energy of DC bus-bar voltage.When PV input electric energy is greater than inversion output electric energy, busbar voltage raises, otherwise busbar voltage reduces.But, accomplish that actual PV input power is very difficult with the complete equipilibrium that exchanges power output, this be because:
1.PV input current is the periodically pulsing direct current, A/D interface AD sampling instant difference, and the electric current obtained is also different, and the PV input power calculated according to this sample rate current is also different.
2. when inverter is worked, due to a plurality of power electronic devices being arranged, insulated gate bipolar transistor (Insulated Gate Bipolar Transistor for example, be called for short " IGBT ") or mos field effect transistor (Metal Oxide Semiconductor Field Effect Transistor, be called for short " MOSFET "), more than being operated in thousands of hertz frequencies, measuring circuit easily is subject to the interference of switching noise, and the measurement result of PV input voltage or current signal easily produces error.
3. in circuit, device for power switching can produce loss, and this loss is not definite value, is difficult to determine.
So in fact parallel networking type photovoltaic inverter PV input electric energy and inversion output electric energy are difficult to the assurance rigorous equilibrium, in this case, DC bus-bar voltage just has fluctuation.
Through the retrieval to prior art, find, Chinese patent literature CN102355151, open day 2012-02-15, disclose a kind of combining inverter and parallel network reverse control method with complex function.This combining inverter comprises the DC bus of capacitor, and the generate electricity by way of merging two or more grid systems DC output end of device of distributed power source or energy storage is connected to the dc-link capacitance two ends; The single-phase full bridge inverter circuit that also comprises three groups of common DC bus, the output of each group single-phase full bridge inverter circuit all is connected to filter, and the output of filter is all by the power distribution network of single-phase step-up isolating transformer access 380V electric pressure.But defect and the deficiency of this technology be, it must use isolating transformer in electrical network access link, makes the single unit system volume and weight larger, and cost is higher; The extra power loss of transformer is more simultaneously.Secondly, this technology also can't realize stablizing busbar voltage.
Summary of the invention
The present invention is directed to the prior art above shortcomings, the compensation method of DC bus-bar voltage in a kind of combining inverter and combining inverter is proposed, can greatly reduce the amplitude of bus capacitor voltage fluctuation, improve the stability of circuit, and do not increase extra cost.
The present invention is achieved by the following technical solutions:
The present invention relates to a kind of combining inverter, comprise: booster circuit, bus capacitor, processor and inverter bridge, wherein: the direct current of the input termination input of booster circuit, bus capacitor is between booster circuit and inverter bridge, the output of booster circuit is connected with the input of inverter bridge, the first A/D interface of processor connects the voltage sampling signal of bus capacitor, processor is connected with the control end of inverter bridge, for the voltage sampling signal of bus capacitor and predeterminated voltage are compared, when this voltage sampling signal higher than predeterminated voltage, control inverter bridge and improve power output, when this voltage sampling signal lower than predeterminated voltage, control inverter bridge and reduce power output, can greatly reduce the amplitude of bus capacitor voltage fluctuation, improve the stability of circuit, and do not increase extra cost.
Describedly relatively refer to: processor relatively
Figure BDA0000383477690000021
with to realize described inverter bridge is correspondingly adjusted the control of power output, wherein:
Figure BDA0000383477690000023
for predeterminated voltage, U cfor the voltage of bus capacitor, C is bus capacitor.
Described combining inverter also comprises the LC filter, and the input of this LC filter is connected with the output of described inverter bridge.
Described processor also comprises:
The second A/D interface, connect the galvanic voltage sampling signal of inputting;
The 3rd A/D interface, connect the galvanic current sampling signal of inputting;
The 4th A/D interface, the voltage sampling signal of the alternating current of connection output;
The 5th A/D interface, the current sampling signal of the alternating current of connection output;
The present invention relates to a kind of compensation method of the DC bus-bar voltage based on combining inverter, comprise the following steps:
1) with booster circuit, the direct current to input is boosted;
2) processor is sampled to the voltage of bus capacitor;
3) processor compares the voltage sampling signal of bus capacitor and predeterminated voltage, when this voltage sampling signal higher than predeterminated voltage, control inverter bridge and improve power output, when this voltage sampling signal, lower than predeterminated voltage, control inverter bridge and reduce power output.
The voltage of described processor sampling bus capacitor, itself and predeterminated voltage are compared, when this voltage sampling signal higher than predeterminated voltage, control described inverter bridge and improve power output,, control described inverter bridge and reduce power output lower than predeterminated voltage when this voltage sampling signal, can greatly reduce the amplitude of DC bus-bar voltage fluctuation, improve the stability of circuit, and do not increase extra cost.
Further, all signals between from the processor to the controlled device are all digital forms, use pulse width modulation (Pulse Width Modulation, be abbreviated as PWM) power output of module controls inverter bridge, the duty that can export square wave by change recently changes equivalent output voltage or electric current, without carrying out digital-to-analogue conversion, simple, flexibly again, and the antijamming capability to noise strengthens greatly, improved the reliability of circuit.
Further, at combining inverter electrical network inlet wire, enter to arrange electromagnetic interface filter, suppress the interference that in electrical network, other equipment bring, further improve the reliability of circuit.
Further, processor sample alternating voltage, the alternating current of galvanic voltage, electric current and combining inverter output, the input and output situation of Real-Time Monitoring combining inverter, further improve the accuracy that processor is controlled.
The accompanying drawing explanation
Fig. 1 is the structural representation of the combining inverter in the embodiment of the present invention 1;
Fig. 2 is the structural representation of the combining inverter in the embodiment of the present invention 2;
Fig. 3 is the structural representation of the combining inverter in the embodiment of the present invention 3;
Fig. 4 is the schematic flow sheet of the compensation method of DC bus-bar voltage in the combining inverter in the embodiment of the present invention 4.
Embodiment
Below embodiments of the invention are elaborated, the present embodiment is implemented take technical solution of the present invention under prerequisite, provided detailed execution mode and concrete operating process, but protection scope of the present invention is not limited to following embodiment.
Embodiment 1
As shown in Figure 1, the present embodiment relates to a kind of combining inverter.Described this combining inverter can be half-bridge inverter, full-bridge inverter or three-phase bridge type converter.This combining inverter comprises booster circuit, bus capacitor C, processor and inverter bridge, wherein: the direct current of the input termination input of booster circuit.Bus capacitor C is between booster circuit and inverter bridge.The output of booster circuit is connected with the input of inverter bridge.The first A/D interface AD1 of processor connects the voltage sampling signal of bus capacitor.The voltage of this bus capacitor is the DC bus-bar voltage in Fig. 1.Processor is connected with the control end of inverter bridge, for the voltage sampling signal of bus capacitor and predeterminated voltage are compared, when this voltage sampling signal higher than predeterminated voltage, control inverter bridge and improve power output,, control inverter bridge and reduce power output lower than predeterminated voltage when this voltage sampling signal.
In the present embodiment, preferably, direct current is provided by the PV battery, as shown in Figure 1.Described in other execution modes of the present invention, direct current can also be provided by power supply or the battery of other types.
Described bus capacitor can be an electric capacity, as shown in Figure 1, can be also the capacitor array structure.The circuit network structure that the electric capacity that the capacitor array structure is different sizes or formed objects forms with the connection in series-parallel form, and can be by the analog switch in input binary code control circuit network configuration, thereby adjust the size of whole capacitor array, to meet the electric capacity demand under different situations.
Described processor can be single-chip microcomputer, micro-control unit (Micro Controller Unit, be called for short " MCU "), can be also digital signal processor (Digital Signal Processor, be called for short " DSP "), central processing units (Central Processing Unit is called for short " CPU ") etc., as long as there is the logic control function.
Described processor can be when the ac converter cycle starts or finishes, or the voltage signal of the arbitrary moment sampling bus capacitor of an ac converter in the cycle, and the sampling period can be an ac converter cycle, or the more ac converter cycle.
In each execution mode of the present invention, preferably, predeterminated voltage is
Figure BDA0000383477690000044
the voltage of bus capacitor is U c, bus capacitor is C, processor is according to formula control inverter bridge and correspondingly adjust power output.
In a preferred example, processor is measured the voltage U of the bus capacitor of the zero hour in ac converter cycle c, PV battery (direct current) input power is P pV, do not consider the loss of circuit, the AC power P that inverter should be exported aCshould be:
p AC = P PV + 1 2 CU C 2 - 1 2 CU C 0 2 , Wherein: represent bus capacitor C should discharge (when U C > U C 0 ) or absorb (when
Figure BDA0000383477690000046
) electric energy.
Embodiment 2
The present embodiment relates to a kind of combining inverter.Fig. 2 is the structural representation of this combining inverter.
Embodiment 2 improves on the basis of embodiment 1, main improvements are: all signals between from the processor to the controlled device are all digital forms, use the power output of PWM module controls inverter bridge, the duty that can export square wave by change recently changes equivalent output voltage or electric current, without carrying out again digital-to-analogue conversion, simply, flexibly, and the antijamming capability of noise is strengthened greatly, improved the reliability of circuit.Specifically:
As shown in Figure 2, processor comprises the PWM module, and by the driver of this PWM module controls inverter bridge.
Described pulse width modulation (Pulse Width Modulation, be abbreviated as PWM), be called for short pulse-width modulation, be a kind of technology that is pulse wave by analog signal conversion, after general conversion, the cycle of pulse wave is fixed, and the duty ratio of pulse wave can change according to the size of analog signal.Can analog signal use PWM to carry out coded modulation, only relies on bandwidth, as long as this mean, enough bandwidth arranged, and any analog signal values all can adopt the PWM technology to carry out modulating-coding.
Certainly, in some other execution mode of the present invention, also can pass through the signal controlling inverter bridge of other form, for example, use encoded digital signal to realize controlling, or realize controlling by a digital to analog converter generation analog signal.
In the present embodiment, preferably, the AC signal of inverter bridge output is the SPWM ripple.
Described SPWM (Sinusoidal PWM) method is a kind of comparative maturity, uses at present PWM method more widely.An important conclusion is arranged in sampled-data control theory: when the equal and variform burst pulse of momentum is added on the link with inertia, its effect is basic identical.The SPWM method be take this conclusion exactly as theoretical foundation, by pulse duration, by sinusoidal rule variation, with the PWM waveform of sinusoidal wave equivalence, be the break-make of switching device in SPWM waveform control of inverter circuit, the area of the pulse voltage of its output is equated with the area of sine wave in respective bins of desired output, modulate by change frequency and the amplitude that wave frequency and amplitude can be regulated the inverter circuit output voltage, thereby regulate the power output of inverter circuit.
Embodiment 3
Embodiment 3 relates to a kind of combining inverter.Fig. 3 is the structural representation of this combining inverter.
Embodiment 3 improves on the basis of embodiment 1, embodiment 2.
As shown in Figure 3, combining inverter also comprises the LC filter, and the input of this LC filter is connected with the output of inverter bridge.
This combining inverter also comprises electromagnetic interface filter, and this electromagnetic interface filter is located at the electrical network point of incoming cables, and the input of this electromagnetic interface filter is connected with the output of LC filter, for suppressing the interference of electrical network.In combining inverter electrical network point of incoming cables, electromagnetic interface filter is set, suppresses the interference that in electrical network, other equipment bring, further improve the reliability of circuit
In addition, the processor of this combining inverter comprises:
The second A/D interface AD2, connect the galvanic voltage sampling signal of inputting;
The 3rd A/D interface AD3, connect the galvanic current sampling signal of inputting;
The 4th A/D interface AD4, the voltage sampling signal of the alternating current of connection output;
The 5th A/D interface AD5, the current sampling signal of the alternating current of connection output.
This processor is also monitored for galvanic voltage, electric current to input, and voltage, the electric current of the alternating current that the LC filter is exported are monitored.
Processor sample alternating voltage, the alternating current of galvanic voltage, electric current and combining inverter output, the input and output situation of Real-Time Monitoring combining inverter, further improve the accuracy that processor is controlled
It should be noted that, each unit of mentioning in each equipment execution mode of the present invention is all logical block, physically, a logical block can be a physical location, it can be also the part of a physical location, can also realize with the combination of a plurality of physical locations, the physics realization mode of these logical blocks itself is not most important, and the combination of the function that these logical blocks realize is only the key that solves technical problem proposed by the invention.In addition, for outstanding innovation part of the present invention, the unit that above-mentioned each equipment execution mode of the present invention will be not too not close with solving technical problem relation proposed by the invention is introduced, and this does not show that there is not other unit in the said equipment execution mode.
Embodiment 4
Embodiment 4 relates to the compensation method of DC bus-bar voltage in a kind of combining inverter.Fig. 4 is the schematic flow sheet of the compensation method of DC bus-bar voltage in this combining inverter.This combining inverter comprises booster circuit, bus capacitor C, processor and inverter bridge between this booster circuit and inverter bridge, and the output of this booster circuit is connected with the input of this inverter bridge, as shown in Figure 1.Described this combining inverter can be half-bridge inverter, full-bridge inverter or three-phase bridge type converter.The method comprises the following steps:
In step 401, the direct current with booster circuit to input is boosted.
After this enter step 402, processor is sampled to the voltage of bus capacitor.
Described bus capacitor can be an electric capacity, can be also the capacitor array structure, the circuit network structure that the electric capacity that the capacitor array structure is different sizes or formed objects forms with the connection in series-parallel form.
Described processor can be single-chip microcomputer, micro-control unit (Micro Controller Unit, be called for short " MCU "), can be also digital signal processor (Digital Signal Processor, be called for short " DSP "), central processing units (Central Processing Unit is called for short " CPU ") etc., as long as there is the logic control function.
In addition, described processor can be when the ac converter cycle starts or finishes, or the arbitrary moment sampling actual DC busbar voltage of an ac converter in the cycle, and the sampling period can be an ac converter cycle, or the more ac converter cycle.
After this enter step 403, processor compares the voltage sampling signal of bus capacitor and predeterminated voltage, when this voltage sampling signal, higher than predeterminated voltage, controls inverter bridge and improves power output,, control inverter bridge and reduce power output lower than predeterminated voltage when this voltage sampling signal.
After this process ends.
In each execution mode of the present invention, preferably, predeterminated voltage is
Figure BDA0000383477690000062
the voltage of bus capacitor is U c, bus capacitor is C, processor is according to formula control inverter bridge and correspondingly adjust power output.
The present invention relates to a kind of method of compensating direct current busbar voltage, the voltage of processor sampling bus capacitor, itself and predeterminated voltage are compared,, control inverter bridge and improve power output higher than predeterminated voltage when this voltage sampling signal, when this voltage sampling signal lower than predeterminated voltage, control inverter bridge and reduce power output, can greatly reduce the amplitude of DC bus-bar voltage fluctuation, improve the stability of circuit, and do not increase extra cost.
The present embodiment is the method execution mode corresponding with embodiment 1, the present embodiment can with embodiment 1 enforcement of working in coordination.The correlation technique details of mentioning in embodiment 1 is still effective in the present embodiment, in order to reduce repetition, repeats no more here.Correspondingly, the correlation technique details of mentioning in the present embodiment also can be applicable in embodiment 1.
Embodiment 5
The embodiment of the present invention 5 relates to the compensation method of DC bus-bar voltage in a kind of combining inverter.
Embodiment 5 improves on the basis of embodiment 4, main improvements are: all signals between from the processor to the controlled device are all digital forms, use the power output of PWM module controls inverter bridge, the duty that can export square wave by change recently changes equivalent output voltage or electric current, without carrying out again digital-to-analogue conversion, simply, flexibly, and the antijamming capability of noise is strengthened greatly, improved the reliability of circuit.Specifically:
As shown in Figure 2, processor comprises the PWM module, and in step 403, this processor is by the driver of this PWM module controls inverter bridge.
Certainly, in some other execution mode of the present invention, also can pass through the signal controlling inverter bridge of other form, for example, use encoded digital signal to realize controlling, or realize controlling by a digital to analog converter generation analog signal.
In the present embodiment, preferably, the AC signal of inverter bridge output is the SPWM ripple.
The present embodiment is the method execution mode corresponding with embodiment 2, the present embodiment can with embodiment 2 enforcement of working in coordination.The correlation technique details of mentioning in embodiment 2 is still effective in the present embodiment, in order to reduce repetition, repeats no more here.Correspondingly, the correlation technique details of mentioning in the present embodiment also can be applicable in embodiment 2.
Embodiment 6
Embodiment 6 relates to the compensation method of DC bus-bar voltage in a kind of combining inverter.Fig. 4 is the schematic flow sheet of the compensation method of DC bus-bar voltage in this combining inverter.
Embodiment 6 improves on the basis of embodiment 4, embodiment 5, and main improvements are:
Combining inverter also comprises the electromagnetic interface filter that LC filter that input is connected with the inverter bridge output is connected with the output of this LC filter with input, and as shown in Figure 3, the method is further comprising the steps of:
The LC filter carries out filtering by the AC signal of inverter bridge output;
Electromagnetic interface filter will be connected to the grid after the AC signal filtering of LC filter output.
The present embodiment is the method execution mode corresponding with embodiment 3, the present embodiment can with embodiment 3 enforcement of working in coordination.The correlation technique details of mentioning in embodiment 3 is still effective in the present embodiment, in order to reduce repetition, repeats no more here.Correspondingly, the correlation technique details of mentioning in the present embodiment also can be applicable in embodiment 3.
Each method execution mode of the present invention all can be realized in modes such as software, hardware, firmwares.No matter the present invention realizes with software, hardware or firmware mode, instruction code can be stored in the memory of computer-accessible of any type (for example permanent or revisable, volatibility or non-volatile, solid-state or non-solid-state, fixing or removable medium etc.).Equally, memory can be for example programmable logic array (Programmable Array Logic, be called for short " PAL "), random access memory (Random Access Memory, be called for short " RAM "), programmable read only memory (Programmable Read Only Memory, be called for short " PROM "), read-only memory (Read-Only Memory, be called for short " ROM "), Electrically Erasable Read Only Memory (Electrically Erasable Programmable ROM, be called for short " EEPROM "), disk, CD, digital versatile disc (Digital Versatile Disc, be called for short " DVD ") etc.

Claims (10)

1. a combining inverter, is characterized in that, comprises booster circuit, bus capacitor, processor and inverter bridge;
The direct current of the input termination input of described booster circuit;
Described bus capacitor is between booster circuit and inverter bridge;
The output of described booster circuit is connected with the input of described inverter bridge;
The first A/D interface of described processor connects the voltage sampling signal of described bus capacitor;
Described processor is connected with the control end of inverter bridge, for the voltage sampling signal of described bus capacitor and predeterminated voltage are compared, when this voltage sampling signal higher than predeterminated voltage, control described inverter bridge and improve power output,, control described inverter bridge and reduce power output lower than predeterminated voltage when this voltage sampling signal.
2. combining inverter according to claim 1, is characterized in that, describedly relatively refers to: processor relatively with
Figure FDA0000383477680000012
to realize described inverter bridge is correspondingly adjusted the control of power output, wherein:
Figure FDA0000383477680000013
for predeterminated voltage, U cfor the voltage of bus capacitor, C is bus capacitor.
3. combining inverter according to claim 2, is characterized in that, described processor is built-in with the pulse width modulation (PWM) module, and by the driver of the described inverter bridge of this PWM module controls.
4. combining inverter according to claim 3, is characterized in that, the AC signal of described inverter bridge output is the Using Sinusoidal Pulse Width Modulation signal.
5. combining inverter according to claim 1, is characterized in that, described combining inverter also comprises the LC filter, and the input of this LC filter is connected with the output of described inverter bridge.
6. combining inverter according to claim 5, is characterized in that, the output of described LC filter is provided with electromagnetic interface filter, and the input of electromagnetic interface filter is connected with the output of described LC filter, for suppressing the interference of electrical network.
7. according to the described combining inverter of any one in claim 1 to 6, it is characterized in that, described processor also comprises:
The second A/D interface, connect the galvanic voltage sampling signal of inputting;
The 3rd A/D interface, connect the galvanic current sampling signal of inputting;
The 4th A/D interface, the voltage sampling signal of the alternating current of connection output;
The 5th A/D interface, the current sampling signal of the alternating current of connection output;
Described processor is also monitored for galvanic voltage, electric current to input, and voltage, the electric current of the alternating current that described LC filter is exported are monitored.
8. the compensation method of DC bus-bar voltage in a combining inverter, it is characterized in that, this combining inverter comprises booster circuit, the bus capacitor between booster circuit and inverter bridge, processor and inverter bridge, the output of this booster circuit is connected with the input of this inverter bridge, and the method comprises the following steps:
Direct current with described booster circuit to input is boosted;
Described processor is sampled to the voltage of described bus capacitor;
Described processor compares the voltage sampling signal of described bus capacitor and predeterminated voltage, when this voltage sampling signal higher than predeterminated voltage, control described inverter bridge and improve power output,, control described inverter bridge and reduce power output lower than predeterminated voltage when this voltage sampling signal.
9. the compensation method of DC bus-bar voltage in combining inverter according to claim 8, is characterized in that, in the step voltage sampling signal of described bus capacitor and predeterminated voltage compared at described processor, processor is by relatively
Figure FDA0000383477680000021
with
Figure FDA0000383477680000022
to realize described inverter bridge is correspondingly adjusted the control of power output, wherein:
Figure FDA0000383477680000023
for predeterminated voltage, U cfor the voltage of bus capacitor, C is bus capacitor;
Described processor comprises the pulse width modulation (PWM) module, and by the driver of the described inverter bridge of this PWM module controls;
The AC signal of described inverter bridge output is the sinusoidal pulse width modulation (SPWM) ripple.
10. the compensation method of DC bus-bar voltage in combining inverter according to claim 8 or claim 9, it is characterized in that, described combining inverter also comprises the electromagnetic interface filter that LC filter that input is connected with described inverter bridge output is connected with the output of this LC filter with input, and described method is further comprising the steps of:
Described LC filter carries out filtering by the AC signal of described inverter bridge output;
Described electromagnetic interface filter will be connected to the grid after the AC signal filtering of described LC filter output.
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