CN103456832B - A kind of method of dispersed silicon nano-wire array matte - Google Patents
A kind of method of dispersed silicon nano-wire array matte Download PDFInfo
- Publication number
- CN103456832B CN103456832B CN201210181063.2A CN201210181063A CN103456832B CN 103456832 B CN103456832 B CN 103456832B CN 201210181063 A CN201210181063 A CN 201210181063A CN 103456832 B CN103456832 B CN 103456832B
- Authority
- CN
- China
- Prior art keywords
- matte
- sample
- wire array
- silicon chip
- nano
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
A kind of method of dispersed silicon nano-wire array matte, belongs to chemical attack and prepares photovoltaic matte field, and feature is to prepare the suede structure of high-quality reason in the short period at a lower temperature.Compared with preparing solar energy matte with tradition alkali liquor, improve matte quality, reduce optical reflectivity.Prepare solar energy matte by the present invention, only need some conventional chemical drugss, there is the features such as technique is simple, low cost, matte quality are good, have great application prospect in area of solar cell.
Description
Art
The invention belongs to photovoltaic material technical field, a kind of method relating to dispersed silicon nano-wire array.
Background technology
At present, improve the optical absorption ability of battery by various antireflective technology and film surface texturing techniques to be still and improve an important channel of solar cell performance.The reflectance of silicon chip surface can be dropped to about 10% by conventional alkaline solution anisotropic corrosion technique, so also having the biggest room for promotion in crystal silicon matte technology.Silicon nanowires, except having the special nature that quasiconductor is had, also has optics, electricity and the chemical property of uniqueness, shows good application prospect at aspects such as nanometer electronic device, opto-electronic device and new forms of energy.Test to silicon nanowire array optical absorption spectra finds, the silicon nano-array only needing a few micron thickness the most can realize efficient light and absorb, this means that silicon nano-array photovoltaic cell can greatly be saved in terms of material compared with existing crystal silicon photovoltaic cell (thickness G T.GT.GT 100 microns).The control synthesis of silicon nanowires had made great progress in the more than ten years in past, being prepared silicon nanowire array by the metal catalytic chemical etching method of teacher's Peng Kuiqing research group development and be applied on crystal-silicon solar cell, the feature of this method is to be easy to prepare the homogeneous regularly arranged silicon nanowires of diameter and adapt to the needs of nano-device.But due to the specific surface area that nanostructured tool is bigger, there is Van der Waals force between structure, make silicon nanowire array fasciculation reunite together, the pencil nano wire of this uneven distribution is unfavorable for the absorption of full sunlight.Inventor's based single crystal silicon anisotropic etch characteristic in aqueous slkali, the method proposing to make matte with aqueous slkali dispersed silicon nano-wire array, in Si (100) substrate, the pencil silicon nanowire array aligned is prepared initially with metal catalytic chemical corrosion method, then by alkaline corrosion liquid, pencil nano-wire array is disperseed, the method can make pencil nano-wire array Dispersion on surface uniform, makes the luminous reflectance under full sunlight substantially reduce.
The present invention provides a kind of method of dispersed silicon nano-wire array, comprises the following steps:
(1), silicon chip is cleaned: successively with acetone sonic oscillation, ethanol sonic oscillation, III cleanout fluid V (H2O2)∶(H2SO4Boiling 2-20min in a heating small piece of land surrounded by water is clean by Wafer Cleaning in)=1: 3.
(2), cleaned silicon chip is placed in autoclave, seals and put into baking oven, at suitable temperature, process certain time.Autoclave vessel configures the HF-AgNO of debita spissitudo3Corrosive liquid, and dilute with deionized water.HF and AgNO in etchant solution3Concentration is respectively 0.01-10mol/L, and solution is 80% at the degree of filling up of reactor, and 30-80 DEG C processes 10-60min in an oven.
(3), taking out silicon chip from reactor, sample surfaces is covered with the silver gray metallic cover thing that layer of surface is loose, rinses well with deionized water.
(4) chloroazotic acid V (HCl): (HNO, is used3)=3: 1, heated and boiled removes metallic cover thing and the Argent grain of remaining in sample.
(5), sample deionized water is put into after rinsing well to soak in the solution of 10%HF 1-60 second and is removed natural oxide, with deionized water rinsing, N2Dry up standby.
(6), by prepared sample put in 10w%NaOH+10w%IPA mixed-alkali solution and soak 10-90 second, pencil nano-wire array is disperseed.
(7), the totally rear N of the sample wash after dispersion2Dry up and do optical property and Analysis of Surface Topography.
Accompanying drawing explanation
Accompanying drawing is the silicon nanowire array scanning electron microscope (SEM) photograph reflectance spectrum after the pencil silicon nanowire array prepared of the present invention and dispersion.Fig. 1 is pencil silicon nanowire array surface topography scanning electron microscope (SEM) photograph;Fig. 2 is nano-wire array scanning shape appearance figure after alkali liquor dispersion 30s;Fig. 3 is the reflectance spectrum of silicon nanowire array after aqueous slkali is modified.
Detailed description of the invention
Embodiment
Operating procedure:
(1), silicon chip is cleaned: successively with acetone sonic oscillation (room temperature 10min), ethanol sonic oscillation (room temperature 10min), III cleanout fluid V (H2O2)∶(H2SO4Boiling 10min is clean by Wafer Cleaning in)=1: 3.
(2), cleaned silicon chip is placed in autoclave, seals and put into baking oven, at suitable temperature, process certain time.Autoclave vessel configures the HF-AgNO of debita spissitudo3Corrosive liquid, and dilute with deionized water.HF and AgNO in etchant solution3Concentration is respectively 0.01-5mol/L, and solution is 80% at the degree of filling up of reactor, and 50 DEG C process 30min in an oven.
(3), taking out silicon chip from reactor, sample surfaces is covered with the silver gray metallic cover thing that layer of surface is loose, rinses well with deionized water.
(4) chloroazotic acid V (HCl): (HNO, is used3)=3: 1, heated and boiled removes metallic cover thing remaining in sample and Argent grain in 2 minutes.
(5), sample deionized water is put into after rinsing well to steep in the solution of 10%HF 10 seconds and is removed natural oxide, with deionized water rinsing, N2Dry up standby.
(6), by prepared sample put into immersion different time in 10w%NaOH+10w%IPA mixed-alkali solution, pencil nano-wire array is disperseed.
(7), the totally rear N of the sample wash after dispersion2Dry up, finely dispersed silicon nanowire array.
Prepared silicon nanowire array and reflectance spectrum are shown in accompanying drawing.
Claims (2)
1. a method for dispersed silicon nano-wire array matte, comprises the following steps:
(1), silicon chip is cleaned: successively with acetone sonic oscillation, ethanol sonic oscillation, III cleanout fluid V (H2O2)∶V(H2SO4)=1: 3
Heated and boiled 2-20min is clean by Wafer Cleaning;
(2), cleaned silicon chip is placed in autoclave, seals and put into baking oven, at suitable temperature, process certain time, reaction under high pressure
Still is prepared the HF-AgNO of debita spissitudo3Corrosive liquid, and dilute with deionized water, HF and AgNO in corrosive liquid3Concentration is respectively
0.01-10mol/L, the corrosive liquid after dilution is 80% at the degree of filling up of autoclave, and 30-80 DEG C processes 30min in an oven;
(3), taking out silicon chip from autoclave, sample surfaces is covered with the silver gray metallic cover thing that layer of surface is loose, uses deionized water
Rinse well;
(4) chloroazotic acid V (HCl): V (HNO, is used3)=3: 1, heated and boiled removes metallic cover thing and the Argent grain of remaining in sample;
(5), sample deionized water put into after rinsing well the solution of 10%HF to soak 1-60 second and remove natural oxide, use deionization
Water rinses, N2Dry up standby;
(6), by prepared sample put in 10w%NaOH+10w%IPA mixed-alkali solution and soak 10-60 second, to pencil nano wire
Array disperses;
(7), the totally rear N of the sample wash after dispersion2Dry up and do optical property and Analysis of Surface Topography.
The method of dispersed silicon nano-wire array matte the most according to claim 1, it is characterised in that in regulating step (2), silicon chip is in reaction under high pressure
Temperature in still, reaction temperature is scalable in the range of room temperature to 50 DEG C.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210181063.2A CN103456832B (en) | 2012-05-28 | 2012-05-28 | A kind of method of dispersed silicon nano-wire array matte |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210181063.2A CN103456832B (en) | 2012-05-28 | 2012-05-28 | A kind of method of dispersed silicon nano-wire array matte |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103456832A CN103456832A (en) | 2013-12-18 |
CN103456832B true CN103456832B (en) | 2016-08-31 |
Family
ID=49738998
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201210181063.2A Expired - Fee Related CN103456832B (en) | 2012-05-28 | 2012-05-28 | A kind of method of dispersed silicon nano-wire array matte |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103456832B (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101100282A (en) * | 2006-07-06 | 2008-01-09 | 中国科学院化学研究所 | Method for preparing TTF-TCNQ nano material |
CN102151501A (en) * | 2011-02-24 | 2011-08-17 | 浙江大学 | Preparation method of organic-inorganic nano composite separation membrane |
-
2012
- 2012-05-28 CN CN201210181063.2A patent/CN103456832B/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101100282A (en) * | 2006-07-06 | 2008-01-09 | 中国科学院化学研究所 | Method for preparing TTF-TCNQ nano material |
CN102151501A (en) * | 2011-02-24 | 2011-08-17 | 浙江大学 | Preparation method of organic-inorganic nano composite separation membrane |
Also Published As
Publication number | Publication date |
---|---|
CN103456832A (en) | 2013-12-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Putra et al. | 18.78% hierarchical black silicon solar cells achieved with the balance of light-trapping and interfacial contact | |
JP6392866B2 (en) | Surface texture structure of crystalline silicon solar cell and manufacturing method thereof | |
CN101937946B (en) | Surface texture method of solar battery silicon slice | |
CN102299207B (en) | Method for manufacturing porous pyramid-type silicon surface light trapping structure for solar cell | |
CN101800264B (en) | Process for texturing crystalline silicon solar cell by dry etching | |
Wang et al. | Toward efficient and omnidirectional n-type Si solar cells: concurrent improvement in optical and electrical characteristics by employing microscale hierarchical structures | |
CN101789467B (en) | Polycrystalline silicon solar energy cell wet-method texturing manufacturing process | |
TW201703277A (en) | Preparation method of localized back contact solar cell | |
CN100583465C (en) | Method for preparing silicon solar battery texturing | |
CN102157608A (en) | Method for reducing surface light reflectivity of silicon chip | |
CN104576813B (en) | A kind of nanostructured matte on photoelectric material surface and preparation method thereof | |
CN105633180B (en) | The method of Graphene auxiliary silicon slice wet-method etching | |
CN103956395A (en) | Array structure fabric surface and preparing method and application thereof | |
CN105140343B (en) | A kind of black silicon structure of polycrystalline and its liquid phase preparation process | |
CN106119976A (en) | The additive of polycrystalline black silicon making herbs into wool reaming acid solution and application thereof | |
Gao et al. | Enhanced etching rate of black silicon by Cu/Ni Co-assisted chemical etching process | |
Srivastava et al. | Excellent omnidirectional light trapping properties of inverted micro-pyramid structured silicon by copper catalyzed chemical etching | |
CN102556953A (en) | Method for preparing two-sided silicon nano-wire array | |
CN107268020B (en) | A kind of Ta3N5The preparation method and Ta of film3N5The application of film | |
CN107302040A (en) | The preparation method of Ag nano wire light trapping structures is inlayed based on wet etching silicon face | |
CN102856434B (en) | Preparation method for square silicon nano-porous array | |
CN105839193B (en) | A kind of preparation method of textured mono-crystalline silicon | |
CN103456832B (en) | A kind of method of dispersed silicon nano-wire array matte | |
CN101414641A (en) | Solar cell knap surface structure and preparation method | |
CN107240623B (en) | Surface phasmon and interface cooperate with the preparation method of enhanced monocrystalline silicon battery |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160831 Termination date: 20180528 |