CN103415128B - Circuit for realizing controllable silicon dimming and high-power factor - Google Patents
Circuit for realizing controllable silicon dimming and high-power factor Download PDFInfo
- Publication number
- CN103415128B CN103415128B CN201310391394.3A CN201310391394A CN103415128B CN 103415128 B CN103415128 B CN 103415128B CN 201310391394 A CN201310391394 A CN 201310391394A CN 103415128 B CN103415128 B CN 103415128B
- Authority
- CN
- China
- Prior art keywords
- resistance
- circuit
- transistor
- terminal
- grid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 59
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 59
- 239000010703 silicon Substances 0.000 title claims abstract description 59
- 238000005070 sampling Methods 0.000 claims abstract description 34
- 238000004804 winding Methods 0.000 claims description 48
- 238000013499 data model Methods 0.000 claims description 26
- 230000005669 field effect Effects 0.000 claims description 13
- 230000002745 absorbent Effects 0.000 claims description 6
- 239000002250 absorbent Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 11
- 238000005516 engineering process Methods 0.000 description 3
- 238000001914 filtration Methods 0.000 description 3
- 238000005286 illumination Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
Landscapes
- Dc-Dc Converters (AREA)
Abstract
The invention discloses a circuit for realizing controllable silicon dimming and a high-power factor. The circuit samples a primary voltage signal through a first sampling circuit and a second sampling circuit, thus implementing the fact that average output current and average output voltage of a load LED (light emitting diode) is non-related with a load, obtaining a higher input voltage adjustment rate and a higher load adjustment rate and realizing constant-current output control over the load LED; furthermore, the primary input current can track an alternating current input sine waveform and the average output current of the load LED can be changed along with the change of a controllable silicon triggering angle alpha after the circuit for realizing the controllable silicon dimming and the high-power factor is added into an existing flyback type LED driving circuit based on original boundary feedback; therefore the higher-power factor and the controllable silicon dimming are realized.
Description
Technical field
The present invention relates to a kind of circuit for realizing controllable silicon light modulation and High Power Factor, particularly relating to a kind of circuit for realizing controllable silicon light modulation and High Power Factor fed back based on former limit.
Background technology
Under the background that global energy shortage, environmental requirement improve constantly, green energy conservation illumination is all greatly developed in countries in the world.LED illumination as the revolutionary energy-saving illumination technology of one, just in develop rapidly.But the requirement of LED drive power is also improving constantly.High efficiency, High Power Factor, Secure isolation, meet EMI standard, high current control accuracy, high reliability, volume is little, cost is low etc. is just becoming the crucial standard diagrams of LED drive power.In addition, because needs LED directly substitutes incandescent lamp, LED drive power also must can adapt to traditional controllable silicon dimmer and carry out light modulation.
The existing inverse-excitation type LED drive circuit fed back based on former limit, as shown in Figure 1, comprising: AC power; LC filter; Primary absorbent circuit; The transformer be made up of armature winding, secondary winding and auxiliary winding; Be connected to the secondary circuit of described secondary winding; Be connected to the auxiliary power supply circuit of described auxiliary winding; Power switch pipe M1; Power switch pipe current sampling resistor R4 and LED Drive and Control Circuit.
LED Drive and Control Circuit (claiming this control circuit to be critical conduction mode flyback constant-current control module in the present invention) in Fig. 1 comprising: the first comparator, the second comparator, trigger, raster data model and lead-edge-blanking circuit.This LED Drive and Control Circuit operationally, needs to extract the information relevant with output voltage and peak primary currents, and exports by the GATE signal of GATE port conducting and the cut-off that modulation signal controls power switch pipe M1, carrys out the electric current of constant load LED.In the system shown in figure 1, the above-mentioned information relevant with output voltage and peak primary currents can be extracted by the signal DEMAG of the signal CS of CS port and DEMAG port.The average current can deriving load LED according to correlation theory meets formula below:
Wherein,
for load LED average output current, N is the turn ratio of the main secondary winding of transformer, I
pkfor peak primary currents,
for the ON time of power switch pipe M1,
for the deadline of power switch pipe M1.
The first comparator in Fig. 1 to be compared with benchmark Vref3 by sampling CS signal and realizes peak primary currents I
pkbe a fixed value, the second comparator to be compared with benchmark Vref4 by sampling DEMAG signal and realizes
being a fixed value, like this, is load LED average output current
will be one not with the fixed value of input voltage and load variations, thus realize constant current and drive.But such control mode cannot realize high power factor and controllable silicon light modulation.Because if realize high power factor, primary current waveform must be followed the tracks of and exchange input sine wave shape; If realize inputting controllable silicon light modulation, load LED average output current must change along with the change of SCR Trigger Angle.
In sum, in order to realize high power factor and controllable silicon light modulation, also need to increase extra control circuit on the basis of the existing inverse-excitation type LED drive circuit fed back based on former limit.
Summary of the invention
Technical problem to be solved by this invention is, a kind of circuit for realizing controllable silicon light modulation and High Power Factor is provided, after this circuit adds, the existing inverse-excitation type LED drive circuit fed back based on former limit can be made can to realize high power factor and controllable silicon light modulation.
For solving the problems of the technologies described above, the technical solution used in the present invention is: a kind of circuit for realizing controllable silicon light modulation and High Power Factor, and this circuit comprises: the first sample circuit, second sample circuit, first switch, described first switch comprises first grid, first terminal and the second terminal, second switch, described second switch comprises second grid, third terminal and the 4th terminal, 3rd switch, described 3rd switch comprises the 3rd grid, the 5th terminal and the 6th terminal, transistor seconds, described transistor seconds comprises the 4th grid, the 7th terminal and the 8th terminal, third transistor, described third transistor comprises the 5th grid, the 9th terminal and the tenth terminal, 4th transistor, described 4th transistor comprises the 6th grid, the 11 terminal and the 12 terminal, digital to analog converter, counter, inverter, first operational amplifier, second operational amplifier, 7th resistance, 5th electric capacity, first comparator, first trigger, delay circuit, 5th resistance, 6th resistance, 8th resistance, second comparator, wherein, the voltage signal of described first sampling circuit samples outside inverse-excitation type LED drive circuit armature winding is also sent to the positive input terminal of described second operational amplifier after process, the negative input end of described second operational amplifier is connected to described 12 terminal, the output of described second operational amplifier is connected to described 6th grid, the voltage signal of described second sampling circuit samples outside inverse-excitation type LED drive circuit armature winding is also sent to the positive input terminal of described first operational amplifier after process, the negative input end of described first operational amplifier is connected to described tenth terminal, the output of described first operational amplifier is connected to described 5th grid, described 9th terminal is connected to described second terminal, described 11 terminal is connected to described 4th terminal, described 8th terminal is connected to after described first terminal and third terminal merge, described 7th terminal receives externally fed voltage, described 4th grid is connected to described 8th terminal and described digital to analog converter respectively, described first grid is connected to the input of described inverter respectively, the non-end of Q of the 3rd grid and outside second trigger, described second grid is connected to the output of described inverter, described tenth terminal is connected to the positive input terminal of described second comparator, described tenth terminal and the 12 terminal are respectively by described 5th resistance and the 6th grounding through resistance, described digital to analog converter is connected to described counter respectively, one end of 5th terminal and the 7th resistance, the other end of described 7th resistance is connected to one end of the 8th resistance and the negative input end of outside 3rd comparator respectively, the other end ground connection of described 8th resistance, described 6th terminal is connected to described one end of 5th electric capacity and the negative input end of the first comparator respectively, the other end ground connection of described 5th electric capacity, the positive input terminal of described first comparator is connected to the first reference voltage, the negative input end of described second comparator is connected to the second reference voltage, described first comparator exports described first trigger to, the output of described second comparator is connected to the CLK end of described counter and one end of delay circuit respectively, the D termination of described first trigger receives externally fed voltage, the non-end of Q of described first trigger is connected to the UP/DN end of described counter, the CLR end of described first trigger is connected to the other end of described delay circuit.
Preferably, described for realizing in the circuit of controllable silicon light modulation and High Power Factor, described first sample circuit comprises: the 9th resistance, tenth resistance, 11 resistance, 5th transistor, 6th electric capacity and the second inverter, one end of described tenth resistance is connected to the drain electrode of outside the first transistor, the other end of described tenth resistance is connected to one end of described 11 resistance and one end of the 9th resistance respectively, the other end ground connection of described 11 resistance, the other end of described 9th resistance is connected to one end of described 5th transistor, the other end of described 5th transistor is connected to one end of described 6th electric capacity and the positive input terminal of described second operational amplifier respectively, the grid of described 5th transistor is connected to the output of described second inverter, the input of described second inverter is connected to the grid of outside the first transistor, the other end ground connection of described 6th electric capacity, described second sample circuit comprises: the 12 resistance and the 13 resistance, one end of described 12 resistance is connected to the output of outside LC filter, the other end of described 12 resistance is connected to the positive input terminal of described first operational amplifier and one end of the 13 resistance respectively, the other end ground connection of described 13 resistance.
Preferably, described for realizing in the circuit of controllable silicon light modulation and High Power Factor, described 5th transistor is N-type field effect transistor.
Preferably, described for realizing in the circuit of controllable silicon light modulation and High Power Factor, described first sample circuit comprises: the 9th resistance, tenth resistance, 11 resistance and the 6th electric capacity, one end of described tenth resistance is connected to the drain electrode of outside the first transistor, the other end of described tenth resistance is connected to one end of described 11 resistance and one end of the 9th resistance respectively, the other end ground connection of described 11 resistance, the other end of described 9th resistance is connected to described one end of 6th electric capacity and the positive input terminal of the second operational amplifier respectively, the other end ground connection of described 6th electric capacity, described second sample circuit comprises: the 12 resistance, 13 resistance, 14 resistance, 5th transistor and the 7th electric capacity, one end of described 12 resistance is connected to the output of outside LC filter, the other end of described 12 resistance is connected to one end of described 5th transistor respectively, one end of 13 resistance and one end of the 14 resistance, the other end ground connection of described 13 resistance, the other end ground connection of described 5th transistor, the grid of described 5th transistor is connected to the grid of outside the first transistor, the other end of described 14 resistance is connected to the positive input terminal of described first operational amplifier and one end of the 7th electric capacity respectively, the other end ground connection of described 7th electric capacity.
Preferably, described for realizing in the circuit of controllable silicon light modulation and High Power Factor, described first sample circuit comprises: the tenth resistance and the 11 resistance, one end of described tenth resistance is connected to the output of outside LC filter, the other end of described tenth resistance is connected to described one end of 11 resistance and the positive input terminal of the second operational amplifier respectively, the other end ground connection of described 11 resistance, described second sample circuit comprises: the 12 resistance, 13 resistance, 14 resistance, 5th transistor and the 7th electric capacity, one end of described 12 resistance is connected to the output of outside LC filter, the other end of described 12 resistance is connected to one end of described 5th transistor respectively, one end of 13 resistance and one end of the 14 resistance, the other end ground connection of described 13 resistance, the other end ground connection of described 5th transistor, the grid of described 5th transistor is connected to the grid of outside the first transistor, the other end of described 14 resistance is connected to the positive input terminal of described first operational amplifier and one end of the 7th electric capacity respectively, the other end ground connection of described 7th electric capacity.
Preferably, described for realizing in the circuit of controllable silicon light modulation and High Power Factor, described first sample circuit comprises: the 9th resistance, tenth resistance, 11 resistance, 5th transistor, 6th electric capacity and the second inverter, one end of described tenth resistance is connected to the drain electrode of outside the first transistor, the other end of described tenth resistance is connected to one end of described 11 resistance and one end of the 9th resistance respectively, the other end ground connection of described 11 resistance, the other end of described 9th resistance is connected to one end of described 5th transistor, the other end of described 5th transistor is connected to one end of described 6th electric capacity and the positive input terminal of described second operational amplifier respectively, the grid of described 5th transistor is connected to the output of described second inverter, the input of described second inverter is connected to the grid of outside the first transistor, the other end ground connection of described 6th electric capacity, described second sample circuit comprises: the 12 resistance, the 13 resistance, the 14 resistance and the 7th electric capacity, one end of described 12 resistance is connected to the drain electrode of outside the first transistor, the other end of described 12 resistance connects one end of the 13 resistance and one end of the 14 resistance respectively, the other end ground connection of described 13 resistance, the other end of described 14 resistance is connected to the positive input terminal of described first operational amplifier and one end of the 7th electric capacity respectively, the other end ground connection of described 7th electric capacity.
Preferably, described also comprises for the circuit realizing controllable silicon light modulation and High Power Factor: critical conduction mode flyback constant-current control module, and this module comprises: the 3rd comparator, the second trigger, raster data model, the 4th comparator and lead-edge-blanking circuit, wherein, the negative input end of described 3rd comparator is connected on the junction point of described 7th resistance and the 8th resistance, the positive input terminal of described 3rd comparator is connected to one end of described lead-edge-blanking circuit, the output of described 3rd comparator is connected to the D end of described second trigger, the S end of described second trigger is connected to the output of described 4th comparator, the Q end of described second trigger is connected to the input of described raster data model, the non-end of Q of described second trigger is connected to described first grid, the negative input end of described 4th comparator is for the voltage signal of external auxiliary winding of sampling, the positive input terminal of described 4th comparator receives the 4th reference voltage, the output of described raster data model is connected to the grid of outside the first transistor, the other end of described lead-edge-blanking circuit is connected to the source electrode of described outside the first transistor.
Preferably, describedly also to comprise for the circuit realizing controllable silicon light modulation and High Power Factor: rectifier bridge; LC filter; Primary absorbent circuit; The transformer be made up of armature winding, secondary winding and auxiliary winding; Be connected to the secondary circuit of described secondary winding; Be connected to the auxiliary power supply circuit of described auxiliary winding; The first transistor; 4th resistance; Described rectifier bridge, LC filter, primary absorbent circuit and transformer are sequentially connected in series, and the drain electrode of described the first transistor is connected to described armature winding, and the source electrode of described the first transistor is by the 4th grounding through resistance.
Preferably, described also comprises for the circuit realizing controllable silicon light modulation and High Power Factor: controllable silicon dimmer, and described controllable silicon dimmer is connected to the front end of described rectifier bridge.
Preferably, described also comprises for the circuit realizing controllable silicon light modulation and High Power Factor: AC power, and described AC power is connected to the front end of described controllable silicon dimmer.
Advantage of the present invention is, the present invention to be sampled elementary voltage signal by the first sample circuit and the second sample circuit, the average output current achieved as load LED has nothing to do with output voltage and load, thus obtain good input voltage regulation and load regulation, achieve and the constant current output of load LED is controlled; Simultaneously, after the circuit being used for the present invention to realize controllable silicon light modulation and High Power Factor adds the existing inverse-excitation type LED drive circuit fed back based on former limit, elementary input current can be followed the tracks of and exchange input sine wave shape and can along with SCR Trigger Angle to the average output current of load LED
change and change, thus achieve higher power factor and controllable silicon light modulation.
Accompanying drawing explanation
Fig. 1 is the existing inverse-excitation type LED drive circuit fed back based on former limit;
Fig. 2 is the circuit diagram of the inverse-excitation type LED drive circuit fed back based on former limit comprising first embodiment of the invention;
Fig. 3 is the circuit diagram of the inverse-excitation type LED drive circuit fed back based on former limit comprising the present invention first alternate embodiment;
Fig. 4 is the circuit diagram of the inverse-excitation type LED drive circuit fed back based on former limit comprising the present invention second alternate embodiment;
Fig. 5 is the circuit diagram of the inverse-excitation type LED drive circuit fed back based on former limit comprising the present invention the 3rd alternate embodiment;
Fig. 6 is the circuit diagram of the inverse-excitation type LED drive circuit fed back based on former limit comprising the present invention the 4th alternate embodiment.
Embodiment
For disclosing technical scheme of the present invention further, be hereby described with reference to the accompanying drawings embodiments of the present invention:
Basic conception of the present invention is as follows: Fig. 2 is the circuit diagram of the inverse-excitation type LED drive circuit fed back based on former limit comprising first embodiment of the invention, and figure comprises: AC power 116; Controllable silicon dimmer 117; Rectifier bridge; LC filter; Primary absorbent circuit; The transformer be made up of armature winding, secondary winding and auxiliary winding; Be connected to the secondary circuit of described secondary winding; Be connected to the auxiliary power supply circuit of described auxiliary winding; Power switch pipe M1 and the first transistor M1; Power switch pipe M1 current sampling resistor R4 and LED Drive and Control Circuit, the grid of described power switch pipe M1 is connected with the GATE port of LED Drive and Control Circuit, the drain electrode of described power switch pipe M1 is connected with described armature winding, and the source electrode of described power switch pipe M1 is by described power switch pipe M1 current sampling resistor R4 ground connection.Wherein, described LED Drive and Control Circuit comprises peak current reference generator module and critical conduction mode flyback constant-current control module, described peak current reference generator module is the circuit for realizing controllable silicon light modulation and High Power Factor of the present invention, input VC1 and VC2 of described peak current reference generator module is for elementary voltage signal of sampling, and the output Vref3 of this circuit is supplied to the peak current benchmark of critical conduction mode flyback constant-current control module needs.The input DEMAG of described critical conduction mode flyback constant-current control module and existing LED Drive and Control Circuit is for the voltage signal of described auxiliary winding of sampling, the voltage signal of input CS on sampled power switching tube M1 current sampling resistor R4 of described critical conduction mode flyback constant-current control module, the output GATE of described critical conduction mode flyback constant-current control module is used for driving power switching tube M1.
[the first embodiment] particularly, as shown in Figure 2, described peak current reference generator module and the present invention comprise for the circuit realizing controllable silicon light modulation and High Power Factor: a kind of circuit for realizing controllable silicon light modulation and High Power Factor, it is characterized in that, this circuit comprises: the first sample circuit 101, second sample circuit 118, first interrupteur SW 1, described first interrupteur SW 1 comprises first grid, first terminal and the second terminal, second switch SW2, described second switch SW2 comprise second grid, third terminal and the 4th terminal, 3rd interrupteur SW 3, described 3rd interrupteur SW 3 comprises the 3rd grid, the 5th terminal and the 6th terminal, transistor seconds M2, described transistor seconds M2 comprise the 4th grid, the 7th terminal and the 8th terminal, third transistor M3, described third transistor M3 comprise the 5th grid, the 9th terminal and the tenth terminal, 4th transistor M4, described 4th transistor M4 comprises the 6th grid, the 11 terminal and the 12 terminal, digital to analog converter 103, counter 104, inverter 102, first operational amplifier 105, second operational amplifier 106, 7th resistance R7, 5th electric capacity C5, first comparator 107, first trigger 110, delay circuit 109, 5th resistance R5, 6th resistance R6, 8th resistance R8, second comparator 108, wherein, described first sample circuit 101 sample outside inverse-excitation type LED drive circuit armature winding voltage signal and be sent to the positive input terminal of described second operational amplifier 106 after process, the negative input end of described second operational amplifier 106 is connected to described 12 terminal, the output of described second operational amplifier 106 is connected to described 6th grid, described second sample circuit 118 sample outside inverse-excitation type LED drive circuit armature winding voltage signal and be sent to the positive input terminal of described first operational amplifier 105 after process, the negative input end of described first operational amplifier 105 is connected to described tenth terminal, the output of described first operational amplifier 105 is connected to described 5th grid, described 9th terminal is connected to described second terminal, described 11 terminal is connected to described 4th terminal, described 8th terminal is connected to after described first terminal and third terminal merge, described 7th terminal receives externally fed voltage, described 4th grid is connected to described 8th terminal and described digital to analog converter 103 respectively, described first grid is connected to the input of described inverter 102 respectively, the non-end of Q of the 3rd grid and outside second trigger 112, described second grid is connected to the output of described inverter 102, described tenth terminal is connected to the positive input terminal of described second comparator 108, described tenth terminal and the 12 terminal are respectively by described 5th resistance R5 and the 6th resistance R6 ground connection, described digital to analog converter 103 is connected to described counter 104 respectively, one end of 5th terminal and the 7th resistance R7, the other end of described 7th resistance R7 is connected to one end of the 8th resistance R8 and the negative input end of outside 3rd comparator 111 respectively, the other end ground connection of described 8th resistance R8, namely the tie point place of described 7th resistance R7 and the 8th resistance R8 exports the negative input end of the 3rd reference voltage V ref3 to outside 3rd comparator 111, described 6th terminal is connected to one end of described 5th electric capacity C5 and the negative input end of the first comparator 107 respectively, the other end ground connection of described 5th electric capacity C5, the positive input terminal of described first comparator 107 is connected to the first reference voltage V ref1, the negative input end of described second comparator 108 is connected to the second reference voltage V ref2, described first comparator 107 exports described first trigger 110 to, the output of described second comparator 108 is connected to the CLK end of described counter 104 and one end of delay circuit 109 respectively, the D termination of described first trigger 110 receives externally fed voltage, the non-end of Q of described first trigger 110 is connected to the UP/DN end of described counter 104, the CLR end of described first trigger 110 is connected to the other end of described delay circuit 109.
In addition, described critical conduction mode flyback constant-current control module comprises: the 3rd comparator 111, second trigger 112, raster data model 113, the 4th comparator 114 and lead-edge-blanking circuit 115, wherein, on the junction point that the negative input end of described 3rd comparator 111 is connected to described 7th resistance R7 and the 8th resistance R8, namely the negative input end of described 3rd comparator 111 is connected to the output of described peak current reference generator module to receive the 3rd reference voltage V ref3, , the positive input terminal of described 3rd comparator 111 is connected to one end of described lead-edge-blanking circuit 115, the output of described 3rd comparator 111 is connected to the D end of described second trigger 112, the S end of described second trigger 112 is connected to the output of described 4th comparator 114, the Q end of described second trigger 112 is connected to the input of described raster data model 113, the non-end of Q of described second trigger 112 is connected to described first grid, the negative input end of described 4th comparator 114 is for the voltage signal of external auxiliary winding of sampling, the positive input terminal of described 4th comparator 114 receives the 4th reference voltage V ref4, the output of described raster data model 113 is connected to the grid of outside the first transistor M1, the other end of described lead-edge-blanking circuit 115 is connected to the source electrode of described outside the first transistor M1.
[the first alternate embodiment] Fig. 3 is the circuit diagram of the inverse-excitation type LED drive circuit fed back based on former limit comprising the present invention first alternate embodiment; this figure is only the present invention for realizing an example of the first sample circuit 101 in the circuit of controllable silicon light modulation and High Power Factor and the second sample circuit 118, and it does not limit the protection range of claim.In Fig. 3, described first sample circuit 101 comprises: the 9th resistance R9, tenth resistance R10, 11 resistance R11, 5th transistor M5, 6th electric capacity C6 and the second inverter, one end of described tenth resistance R10 is connected to the drain electrode of outside the first transistor M1, the other end of described tenth resistance R10 is connected to one end of described 11 resistance R11 and one end of the 9th resistance R9 respectively, the other end ground connection of described 11 resistance R11, the other end of described 9th resistance R9 is connected to one end of described 5th transistor M5, the other end of described 5th transistor M5 is connected to one end of described 6th electric capacity C6 and the positive input terminal of described second operational amplifier 106 respectively, the grid of described 5th transistor M5 is connected to the output of described second inverter, the input of described second inverter is connected to the grid of outside the first transistor M1, the other end ground connection of described 6th electric capacity C6, described second sample circuit 118 comprises: the 12 resistance R12 and the 13 resistance R13, one end of described 12 resistance R12 is connected to the output of outside LC filter, the other end of described 12 resistance R12 is connected to the described positive input terminal of the first operational amplifier 105 and one end of the 13 resistance R13 respectively, the other end ground connection of described 13 resistance R13.
As shown in Figure 3, the present invention is as follows for the course of work of the circuit realizing controllable silicon light modulation and High Power Factor: carry out the reference voltage V ref3 that division arithmetic obtains system needs again after sampling primary voltage VC2 and VC1.In Fig. 3: the sample circuit being constituted VC2 by the 9th resistance R9, the tenth resistance R10, the 11 resistance R11, the 5th transistor M5 and N-type field effect transistor M5, the 6th electric capacity C6 and the second inverter, this circuit role is envelope detected, the signal sampled is the voltage signal (being denoted as: Vdrain) that prime power switching tube M1 drains, and its Output rusults is:
, wherein, k is constant herein,
for armature winding input voltage,
for alternating current phases, N is the turn ratio of the main secondary winding of transformer,
for the output voltage at secondary LED two ends.The VC1 sample circuit be made up of the 12 resistance R12 and the 13 resistance R13, this circuit role is that dividing potential drop detects, and the signal of sampling is that elementary input voltage signal (is denoted as V
in), its Output rusults is:
.First operational amplifier 105, third transistor M3 and the 5th resistance R5 composition circuit function be by voltage-dividing detection circuit export voltage signal convert current signal I to
3, the second operational amplifier 106, the 4th transistor M4 and the 6th resistance R6 composition circuit function be by envelope detected circuit export voltage signal convert current signal I to
4.Visible in figure, when the first interrupteur SW 1 and the 3rd interrupteur SW 3 conducting, second switch SW2 closes, and vice versa.First, when the first interrupteur SW 1 and the 3rd beginning SW3 conducting, when second switch SW2 closes, transistor seconds M2 and P type field effect transistor M2 is by electric current I
3copy is to digital to analog converter 103, and the output current of digital to analog converter 103 is:
.
Wherein,
for the gain of digital to analog converter 103, its value changes from 0 to 255/256 by the control of counter 104.
electric current flows through the 7th resistance R7 and the 8th resistance R8 coating-forming voltage (is denoted as
):
, due to now the 3rd interrupteur SW 3 also conducting,
be sampled and remain on the 5th electric capacity C5, if
then:
。
compare clocking CLK by the second comparator 108 with reference voltage V ref2, the output of counter 104 can be upgraded by the trailing edge of UP/DN port in each CLK clock signal, when
when voltage is higher than Vref1, the first comparator 107 outputs to UP/DN port that the first trigger 110, first trigger 110 outputs to counter 104 and counter 104 is counted increase, otherwise counter 104 counts and reduces.Counter 104 exports domination number weighted-voltage D/A converter 103.When digital to analog converter 103,
, first this feedback loop of comparator 107, first trigger 110 sum counter 104 is when reaching balance,
.
When the first interrupteur SW 1 and the 3rd interrupteur SW 3 are closed, second switch SW2 conducting, transistor seconds M2 and P type field effect transistor M2 is by electric current I
4copy is to digital to analog converter 103, and the output current of digital to analog converter 103 is:
,
Here, herein
,
.
As Fig. 3, the peak current of prime power switching tube M1 is formed feedback voltage by sampling the 4th resistance R4 and is entered by CS port, compare with reference voltage V ref3 after lead-edge-blanking circuit 115, when this voltage is higher than Vref3,3rd comparator 111 exports the D port of high signal to the second trigger 112, second trigger 112 exports low signal to raster data model 113, and raster data model 113 exports low signal and closes prime power switching tube M1.The output voltage of sampling when auxiliary winding by the second resistance R2 and the 3rd resistance R3 dividing potential drop after be input to DEMAG port, this voltage is compared with reference voltage V ref4 by the 4th comparator 114, when this voltage is higher than reference voltage V ref4,4th comparator 114 exports the D port of high signal to the second trigger 112, second trigger 112 exports high signal to raster data model 113, raster data model 113 exports high signal and opens prime power switching tube M1, and each cycle goes round and begins again afterwards.Obtain load LED average output current thus can be expressed as:
。
[the second alternate embodiment] Fig. 4 is the circuit diagram of the inverse-excitation type LED drive circuit fed back based on former limit comprising the present invention second alternate embodiment; this figure is only the present invention for realizing the first sample circuit 101 in the circuit of controllable silicon light modulation and High Power Factor and the second sample circuit 118 1 examples, and it does not limit the protection range of claim.In Fig. 4, described first sample circuit 101 comprises: the 9th resistance R9, tenth resistance R10, 11 resistance R11 and the 6th electric capacity C6, one end of described tenth resistance R10 is connected to the drain electrode of outside the first transistor M1, the other end of described tenth resistance R10 is connected to one end of described 11 resistance R11 and one end of the 9th resistance R9 respectively, the other end ground connection of described 11 resistance R11, the other end of described 9th resistance R9 is connected to one end of described 6th electric capacity C6 and the positive input terminal of the second operational amplifier 106 respectively, the other end ground connection of described 6th electric capacity C6, described second sample circuit 118 comprises: the 12 resistance R12, 13 resistance R13, 14 resistance R14, 5th transistor M5 and the 7th electric capacity C7, one end of described 12 resistance R12 is connected to the output of outside LC filter, the other end of described 12 resistance R12 is connected to one end of described 5th transistor M5 respectively, one end of 13 resistance R13 and one end of the 14 resistance R14, the other end ground connection of described 13 resistance R13, the other end ground connection of described 5th transistor M5, the grid of described 5th transistor M5 is connected to the grid of outside the first transistor M1, the other end of described 14 resistance R14 is connected to the positive input terminal of described first operational amplifier 105 and one end of the 7th electric capacity C7 respectively, the other end ground connection of described 7th electric capacity C7.
As shown in Figure 4, the present invention is as follows for the course of work of the circuit realizing controllable silicon light modulation and High Power Factor: sampling primary voltage VC2 and VC1 after carry out division arithmetic obtain system need reference voltage V ref3.In Fig. 4: the sample circuit being constituted VC2 by the 9th resistance R9, the tenth resistance R10, the 11 resistance R11, the 6th electric capacity C6, this circuit role is low-pass filtering, the signal sampled is the voltage signal (being denoted as: Vdrain) that prime power switching tube M1 drains, and its Output rusults is:
, wherein, k is constant herein,
for armature winding input voltage, N is the turn ratio of the main secondary winding of transformer,
for the output voltage at secondary LED two ends, d gets its a certain section after quadraturing.The VC1 sample circuit be made up of the 12 resistance R12, the 13 resistance R13, the 14 resistance R14, the 7th electric capacity C7 and the 5th transistor M5 and N-type field effect transistor M5, this circuit role is copped wave, and the signal of sampling is that elementary input voltage signal (is denoted as V
in), its Output rusults is:
.First operational amplifier 105, third transistor M3 and the 5th resistance R5 composition circuit function be by chopper circuit export voltage signal convert current signal I to
3, the second operational amplifier 106, the 4th transistor M4 and the 6th resistance R6 composition circuit function be by low-pass filter circuit export voltage signal convert current signal I to
4.Visible in figure, when the first interrupteur SW 1 and the 3rd interrupteur SW 3 conducting, second switch SW2 closes, and vice versa.First, when the first interrupteur SW 1 and the 3rd beginning SW3 conducting, when second switch SW2 closes, transistor seconds M2 and P type field effect transistor M2 is by electric current I
3copy is to digital to analog converter 103, and the output current of digital to analog converter 103 is:
.
Wherein
for the gain of digital to analog converter, its value changes from 0 to 255/256 by the control of counter 104.
electric current flows through the 7th resistance R7 and the 8th resistance R8 coating-forming voltage (is denoted as V
dAC):
, due to now the 3rd interrupteur SW 3 also conducting,
be sampled and remain on the 5th electric capacity C5, if
then:
。
compare clocking CLK by the second comparator 108 with reference voltage V ref2, the output of counter 104 can be upgraded by the trailing edge of UP/DN port in each CLK clock signal, when
when voltage is higher than Vref1, the first comparator 107 outputs to UP/DN port that the first trigger 110, first trigger 110 outputs to counter 104 and counter 104 is counted increase, otherwise counter 104 counts and reduces.Counter 104 exports domination number weighted-voltage D/A converter 103 to.When digital to analog converter 103,
, first this feedback loop of comparator 107, first trigger 110 sum counter 104 is when reaching balance,
.
When the first interrupteur SW 1 and the 3rd interrupteur SW 3 are closed, second switch SW2 conducting, transistor seconds M2 and P type field effect transistor M2 is by electric current I
4copy is to digital to analog converter 103, and the output current of digital to analog converter 103 is:
,
Here,
,
.
As Fig. 4, the peak current of prime power switching tube M1 is formed feedback voltage by sampling the 4th resistance R4 and is entered by CS port, compare with reference voltage V ref3 after lead-edge-blanking circuit 115, when this voltage is higher than reference voltage V ref3,3rd comparator 111 exports the D port of high signal to the second trigger 112, second trigger 112 exports low signal to raster data model 113, and raster data model 113 exports low signal and closes prime power switching tube M1.The output voltage of sampling when auxiliary winding by the second resistance R2 and the 3rd resistance R3 dividing potential drop after be input to DEMAG port, this voltage is compared with reference voltage V ref4 by the 4th comparator 114, when this voltage is higher than reference voltage V ref4,4th comparator 114 exports the D port of high signal to the second trigger 112, second trigger 112 exports high signal to raster data model 113, raster data model 113 exports high signal and opens prime power switching tube M1, and each cycle goes round and begins again afterwards.Obtain load LED average output current thus can be expressed as:
。
[the 3rd alternate embodiment] Fig. 5 is the circuit diagram of the inverse-excitation type LED drive circuit fed back based on former limit comprising the present invention the 3rd alternate embodiment; this figure is only the present invention for realizing the first sample circuit 101 in the circuit of controllable silicon light modulation and High Power Factor and the second sample circuit 118 1 examples, and it does not limit the protection range of claim.In Fig. 5, described first sample circuit 101 comprises: the tenth resistance R10 and the 11 resistance R11, one end of described tenth resistance R10 is connected to the output of outside LC filter, the other end of described tenth resistance R10 is connected to one end of described 11 resistance R11 and the positive input terminal of the second operational amplifier 106, the other end ground connection of described 11 resistance R11 respectively, described second sample circuit 118 comprises: the 12 resistance R12, 13 resistance R13, 14 resistance R14, 5th transistor M5 and the 7th electric capacity C7, one end of described 12 resistance R12 is connected to the output of outside LC filter, the other end of described 12 resistance R12 is connected to one end of described 5th transistor M5 respectively, one end of 13 resistance R13 and one end of the 14 resistance R14, the other end ground connection of described 13 resistance R13, the other end ground connection of described 5th transistor M5, the grid of described 5th transistor M5 is connected to the grid of outside the first transistor M1, the other end of described 14 resistance R14 is connected to the positive input terminal of described first operational amplifier 105 and one end of the 7th electric capacity C7 respectively, the other end ground connection of described 7th electric capacity C7.
As shown in Figure 5, the present invention is as follows for the course of work of the circuit realizing controllable silicon light modulation and High Power Factor: sampling primary voltage VC2 and VC1 after carry out division arithmetic obtain system need reference voltage V ref3.In Fig. 5: the sample circuit being constituted VC2 by the 9th resistance R9 and the tenth resistance R10, this circuit role is that dividing potential drop detects, and the signal of sampling is elementary input voltage signal (being denoted as: Vin), and its Output rusults is:
, wherein k is constant,
for armature winding input voltage.The VC1 sample circuit be made up of the 12 resistance R12, the 13 resistance R13, the 14 resistance R14, the 7th electric capacity C7 and the 5th transistor M5 and N-type field effect transistor M5, this circuit role is copped wave, and the signal of sampling is that elementary input voltage signal (is denoted as V
in), its Output rusults is:
.First operational amplifier 105, third transistor M3 and the 5th resistance R5 composition circuit function be by chopper circuit export voltage signal convert current signal I to
3, the second operational amplifier 106, the 4th transistor M4 and the 6th resistance R6 composition circuit function be by voltage-dividing detection circuit export voltage signal convert current signal I to
4.Visible in figure, when the first interrupteur SW 1 and the 3rd interrupteur SW 3 conducting, second switch SW2 closes, and vice versa.First, when the first interrupteur SW 1 and the 3rd beginning SW3 conducting, when second switch SW2 closes, transistor seconds M2 and P type field effect transistor M2 is by electric current I
3copy is to digital to analog converter 103, and the output current of digital to analog converter 103 is:
Wherein
for the gain of digital to analog converter, its value changes from 0 to 255/256 by the control of counter 104.
electric current flows through the 7th resistance R7 and the 8th resistance R8 coating-forming voltage (is denoted as V
dAC):
, due to now the 3rd interrupteur SW 3 also conducting,
be sampled and remain on the 5th electric capacity C5, if
then:
。
compare clocking CLK by the second comparator 108 with reference voltage V ref2, the output of counter 104 can be upgraded by the trailing edge of UP/DN port in each CLK clock signal, when
when voltage is higher than Vref1, the first comparator 107 outputs to UP/DN port that the first trigger 110, first trigger 110 outputs to counter 104 and counter 104 is counted increase, otherwise counter 104 counts and reduces.Counter 104 exports domination number weighted-voltage D/A converter 103 to.When digital to analog converter 103,
, first this feedback loop of comparator 107, first trigger 110 sum counter 104 is when reaching balance,
.
When the first interrupteur SW 1 and the 3rd interrupteur SW 3 are closed, second switch SW2 conducting, transistor seconds M2 and P type field effect transistor M2 is by electric current I
4copy is to digital to analog converter 103, and the output current of digital to analog converter 103 is:
.
Here,
,
.
As Fig. 5, the peak current of prime power switching tube M1 is formed feedback voltage by sampling the 4th resistance R4 and is entered by CS port, compare with reference voltage V ref3 after lead-edge-blanking circuit 115, when this voltage is higher than reference voltage V ref3,3rd comparator 111 exports the D port of high signal to the second trigger 112, second trigger 112 exports low signal to raster data model 113, and raster data model 113 exports low signal and closes prime power switching tube M1.The output voltage of sampling when auxiliary winding by the second resistance R2 and the 3rd resistance R3 dividing potential drop after be input to DEMAG port, this voltage is compared with reference voltage V ref4 by the 4th comparator 114, when this voltage is higher than reference voltage V ref4,4th comparator 114 exports the D port of high signal to the second trigger 112, second trigger 112 exports high signal to raster data model 113, raster data model 113 exports high signal and opens prime power switching tube M1, and each cycle goes round and begins again afterwards.Obtain load LED average output current thus can be expressed as:
。
[the 4th alternate embodiment] Fig. 6 is the circuit diagram of the inverse-excitation type LED drive circuit fed back based on former limit comprising the present invention the 4th alternate embodiment; this figure is only the present invention for realizing the first sample circuit 101 in the circuit of controllable silicon light modulation and High Power Factor and the second sample circuit 118 1 examples, and it does not limit the protection range of claim.In Fig. 6, described first sample circuit 101 comprises: the 9th resistance R9, tenth resistance R10, 11 resistance R11, 5th transistor M5, 6th electric capacity C6 and the second inverter, one end of described tenth resistance R10 is connected to the drain electrode of outside the first transistor M1, the other end of described tenth resistance R10 is connected to one end of described 11 resistance R11 and one end of the 9th resistance R9 respectively, the other end ground connection of described 11 resistance R11, the other end of described 9th resistance R9 is connected to one end of described 5th transistor M5, the other end of described 5th transistor M5 is connected to one end of described 6th electric capacity C6 and the positive input terminal of described second operational amplifier 106 respectively, the grid of described 5th transistor M5 is connected to the output of described second inverter, the input of described second inverter is connected to the grid of outside the first transistor M1, the other end ground connection of described 6th electric capacity C6, described second sample circuit 118 comprises: the 12 resistance R12, 13 resistance R13, 14 resistance R14 and the 7th electric capacity C7, one end of described 12 resistance R12 is connected to the drain electrode of outside the first transistor M1, the other end of described 12 resistance R12 connects one end of the 13 resistance R13 and one end of the 14 resistance R14 respectively, the other end ground connection of described 13 resistance R13, the other end of described 14 resistance R14 is connected to the positive input terminal of described first operational amplifier 105 and one end of the 7th electric capacity C7 respectively, the other end ground connection of described 7th electric capacity C7.
As shown in Figure 6, the present invention is as follows for the course of work of the circuit realizing controllable silicon light modulation and High Power Factor: sampling primary voltage VC2 and VC1 after carry out division arithmetic obtain system need reference voltage V ref3.In Fig. 6: sampling primary voltage VC2 and VC1 after carry out division arithmetic obtain system need reference voltage V ref3.In Fig. 6: the sample circuit being constituted VC2 by the 9th resistance R9, the tenth resistance R10, the 11 resistance R11, the 5th transistor M5, the 6th electric capacity C6 and the second inverter, this circuit role is envelope detected, the signal sampled is the voltage signal (being denoted as: Vdrain) that prime power switching tube M1 drains, and its Output rusults is:
, wherein k is constant,
for armature winding input voltage, N is the turn ratio of the main secondary winding of transformer,
for the output voltage at secondary LED two ends.The VC1 sample circuit be made up of the 12 resistance R12, the 13 resistance R13, the 14 resistance R14 and the 7th electric capacity C7, this circuit role is low-pass filtering, the signal sampled is the voltage signal (being denoted as: Vdrain) that prime power switching tube M1 drains, and its Output rusults is:
, wherein k is constant,
for armature winding input voltage, N is the turn ratio of the main secondary winding of transformer,
for the output voltage at secondary LED two ends.First operational amplifier 105, third transistor M3 and the 5th resistance R5 composition circuit function be by low-pass filter circuit export voltage signal convert current signal I to
3, the second operational amplifier 106, the 4th transistor M4 and the 6th resistance R6 composition circuit function be by envelope detected circuit export voltage signal convert current signal I to
4.Visible in figure, when the first interrupteur SW 1 and the 3rd interrupteur SW 3 conducting, second switch SW2 closes, and vice versa.First, when the first interrupteur SW 1 and the 3rd beginning SW3 conducting, when second switch SW2 closes, transistor seconds M2 and P type field effect transistor M2 is by electric current I
3copy is to digital to analog converter 103, and the output current of digital to analog converter 103 is:
Wherein
for the gain of digital to analog converter, its value changes from 0 to 255/256 by the control of counter 104.
electric current flows through the 7th resistance R7 and the 8th resistance R8 coating-forming voltage (is denoted as V
dAC):
, due to now the 3rd interrupteur SW 3 also conducting,
be sampled and remain on the 5th electric capacity C5, if
then:
。
compare clocking CLK by the second comparator 108 with reference voltage V ref2, the output of counter 104 can be upgraded by the trailing edge of UP/DN port in each CLK clock signal, when
when voltage is higher than Vref1, the first comparator 107 outputs to UP/DN port that the first trigger 110, first trigger 110 outputs to counter 104 and counter 104 is counted increase, otherwise counter 104 counts and reduces.Counter 104 exports domination number weighted-voltage D/A converter 103 to.When digital to analog converter 103,
, first this feedback loop of comparator 107, first trigger 110 sum counter 104 is when reaching balance,
.
When the first interrupteur SW 1 and the 3rd interrupteur SW 3 are closed, second switch SW2 conducting, transistor seconds M2 and P type field effect transistor M2 is by electric current I
4copy is to digital to analog converter 103, and the output current of digital to analog converter 103 is:
.
Here,
,
.
As Fig. 6, the peak current of prime power switching tube M1 is formed feedback voltage by sampling the 4th resistance R4 and is entered by CS port, compare with reference voltage V ref3 after lead-edge-blanking circuit 115, when this voltage is higher than reference voltage V ref3,3rd comparator 111 exports the D port of high signal to the second trigger 112, second trigger 112 exports low signal to raster data model 113, and raster data model 113 exports low signal and closes prime power switching tube M1.The output voltage of sampling when auxiliary winding by the second resistance R2 and the 3rd resistance R3 dividing potential drop after be input to DEMAG port, this voltage is compared with reference voltage V ref4 by the 4th comparator 114, when this voltage is higher than reference voltage V ref4,4th comparator 114 exports the D port of high signal to the second trigger 112, second trigger 112 exports high signal to raster data model 113, raster data model 113 exports high signal and opens prime power switching tube M1, and each cycle goes round and begins again afterwards.Obtain load LED average output current thus can be expressed as:
。
Known based on above analysis, compared with the existing inverse-excitation type LED drive circuit fed back based on former limit, add described peak current reference generator module and the present invention for realize controllable silicon light modulation and High Power Factor circuit after, as shown in Figure 2, the output of described rectifier bridge does not need the electric capacity that capacitance is larger to carry out filtering, the output Vin of described rectifier bridge follows the tracks of and exchanges input sine wave shape, can be expressed as:
(1)
Therefore, load LED average output current can be expressed as:
（2）
Wherein,
for load LED average output current, N is the turn ratio of the main secondary winding of transformer, I
pkfor peak primary currents.
The effect of the described peak current reference generator module in Fig. 2 is sampled VC1 and VC2 signal carry out division arithmetic exactly, and the sampled voltage signal of the Vref3 signal after division arithmetic and switching tube current sampling resistor R4 compares, and object draws:
（3）
K is constant, draws like this:
（4）
Can find from above-mentioned: load LED average output current has nothing to do with output voltage and load, can obtain good input voltage regulation and load regulation like this, realize exporting LED constant current and control.
By formula (3), elementary sample rate current can be expressed as:
（5）
If that VC2 sampling is output signal Vin after rectifier, substituting into formula (5) by formula (1) can obtain:
(6)
Wherein,
for constant, find that elementary input current can be followed the tracks of by formula (6) and exchange input sine wave shape, high power factor can be realized like this.
Suppose that controllable silicon dimmer can be from
arrive
adjust its Trigger Angle, formula (4) can obtain:
(7)
Can find out that load LED average output current must along with SCR Trigger Angle from formula (7)
change and change, thus can realize input controllable silicon light modulation.
In sum, the existing inverse-excitation type LED drive circuit fed back based on former limit add the present invention for realize controllable silicon light modulation and High Power Factor circuit after, while meeting good input voltage Adjustment Performance and adjustment of load characteristic, high power factor and controllable silicon light modulation can be shown.
More than by description of listed embodiment, the basic ideas and basic principles of the present invention are set forth.But the present invention is never limited to above-mentioned listed execution mode, every equivalent variations, the improvement done based on technical scheme of the present invention and deliberately become of inferior quality behavior, all should belong to protection scope of the present invention.
Claims (10)
1. for realizing a circuit for controllable silicon light modulation and High Power Factor, it is characterized in that, this circuit comprises: the first sample circuit (101), second sample circuit (118), first switch (SW1), described first switch (SW1) comprises first grid, first terminal and the second terminal, second switch (SW2), described second switch (SW2) comprises second grid, third terminal and the 4th terminal, 3rd switch (SW3), described 3rd switch (SW3) comprises the 3rd grid, the 5th terminal and the 6th terminal, transistor seconds (M2), described transistor seconds (M2) comprises the 4th grid, the 7th terminal and the 8th terminal, third transistor (M3), described third transistor (M3) comprises the 5th grid, the 9th terminal and the tenth terminal, 4th transistor (M4), described 4th transistor (M4) comprises the 6th grid, the 11 terminal and the 12 terminal, digital to analog converter (103), counter (104), inverter (102), first operational amplifier (105), second operational amplifier (106), 7th resistance (R7), 5th electric capacity (C5), first comparator (107), first trigger (110), delay circuit (109), 5th resistance (R5), 6th resistance (R6), 8th resistance (R8), second comparator (108), wherein, described first sample circuit (101) sample outside inverse-excitation type LED drive circuit armature winding voltage signal and be sent to the positive input terminal of described second operational amplifier (106) after process, the negative input end of described second operational amplifier (106) is connected to described 12 terminal, the output of described second operational amplifier (106) is connected to described 6th grid, described second sample circuit (118) sample outside inverse-excitation type LED drive circuit armature winding voltage signal and be sent to the positive input terminal of described first operational amplifier (105) after process, the negative input end of described first operational amplifier (105) is connected to described tenth terminal, the output of described first operational amplifier (105) is connected to described 5th grid, described 9th terminal is connected to described second terminal, described 11 terminal is connected to described 4th terminal, described 8th terminal is connected to after described first terminal and third terminal merge, described 7th terminal receives externally fed voltage, described 4th grid is connected to described 8th terminal and described digital to analog converter (103) respectively, described first grid is connected to the input of described inverter (102) respectively, the non-end of Q of the 3rd grid and outside second trigger (112), described second grid is connected to the output of described inverter (102), described tenth terminal is connected to the positive input terminal of described second comparator (108), described tenth terminal and the 12 terminal are respectively by described 5th resistance (R5) and the 6th resistance (R6) ground connection, described digital to analog converter (103) is connected to described counter (104) respectively, one end of 5th terminal and the 7th resistance (R7), the other end of described 7th resistance (R7) is connected to one end of the 8th resistance (R8) and the negative input end of outside 3rd comparator (111) respectively, the other end ground connection of described 8th resistance (R8), described 6th terminal is connected to described one end of 5th electric capacity (C5) and the negative input end of the first comparator (107) respectively, the other end ground connection of described 5th electric capacity (C5), the positive input terminal of described first comparator (107) is connected to the first reference voltage (Vref1), the negative input end of described second comparator (108) is connected to the second reference voltage (Vref2), described first comparator (107) exports described first trigger (110) to, the output of described second comparator (108) is connected to the CLK end of described counter (104) and one end of delay circuit (109) respectively, the D termination of described first trigger (110) receives externally fed voltage, the non-end of Q of described first trigger (110) is connected to the UP/DN end of described counter (104), the CLR end of described first trigger (110) is connected to the other end of described delay circuit (109).
2. the circuit for realizing controllable silicon light modulation and High Power Factor according to claim 1, it is characterized in that, described first sample circuit (101) comprising: the 9th resistance (R9), tenth resistance (R10), 11 resistance (R11), 5th transistor (M5), 6th electric capacity (C6) and the second inverter, one end of described tenth resistance (R10) is connected to the drain electrode of outside the first transistor (M1), the other end of described tenth resistance (R10) is connected to one end of described 11 resistance (R11) and one end of the 9th resistance (R9) respectively, the other end ground connection of described 11 resistance (R11), the other end of described 9th resistance (R9) is connected to one end of described 5th transistor (M5), the other end of described 5th transistor (M5) is connected to described one end of 6th electric capacity (C6) and the positive input terminal of described second operational amplifier (106) respectively, the grid of described 5th transistor (M5) is connected to the output of described second inverter, the input of described second inverter is connected to the grid of outside the first transistor (M1), the other end ground connection of described 6th electric capacity (C6), described second sample circuit (118) comprising: the 12 resistance (R12) and the 13 resistance (R13), one end of described 12 resistance (R12) is connected to the output of outside LC filter, the other end of described 12 resistance (R12) is connected to the positive input terminal of described first operational amplifier (105) and one end of the 13 resistance (R13) respectively, the other end ground connection of described 13 resistance (R13).
3. the circuit for realizing controllable silicon light modulation and High Power Factor according to claim 2, is characterized in that, described 5th transistor (M5) is N-type field effect transistor.
4. the circuit for realizing controllable silicon light modulation and High Power Factor according to claim 1, it is characterized in that, described first sample circuit (101) comprising: the 9th resistance (R9), tenth resistance (R10), 11 resistance (R11) and the 6th electric capacity (C6), one end of described tenth resistance (R10) is connected to the drain electrode of outside the first transistor (M1), the other end of described tenth resistance (R10) is connected to one end of described 11 resistance (R11) and one end of the 9th resistance (R9) respectively, the other end ground connection of described 11 resistance (R11), the other end of described 9th resistance (R9) is connected to described one end of 6th electric capacity (C6) and the positive input terminal of the second operational amplifier (106) respectively, the other end ground connection of described 6th electric capacity (C6), described second sample circuit (118) comprising: the 12 resistance (R12), 13 resistance (R13), 14 resistance (R14), 5th transistor (M5) and the 7th electric capacity (C7), one end of described 12 resistance (R12) is connected to the output of outside LC filter, the other end of described 12 resistance (R12) is connected to one end of described 5th transistor (M5) respectively, one end of 13 resistance (R13) and one end of the 14 resistance (R14), the other end ground connection of described 13 resistance (R13), the other end ground connection of described 5th transistor (M5), the grid of described 5th transistor (M5) is connected to the grid of outside the first transistor (M1), the other end of described 14 resistance (R14) is connected to the positive input terminal of described first operational amplifier (105) and one end of the 7th electric capacity (C7) respectively, the other end ground connection of described 7th electric capacity (C7).
5. the circuit for realizing controllable silicon light modulation and High Power Factor according to claim 1, it is characterized in that, described first sample circuit (101) comprising: the tenth resistance (R10) and the 11 resistance (R11), one end of described tenth resistance (R10) is connected to the output of outside LC filter, the other end of described tenth resistance (R10) is connected to described one end of 11 resistance (R11) and the positive input terminal of the second operational amplifier (106) respectively, the other end ground connection of described 11 resistance (R11), described second sample circuit (118) comprising: the 12 resistance (R12), 13 resistance (R13), 14 resistance (R14), 5th transistor (M5) and the 7th electric capacity (C7), one end of described 12 resistance (R12) is connected to the output of outside LC filter, the other end of described 12 resistance (R12) is connected to one end of described 5th transistor (M5) respectively, one end of 13 resistance (R13) and one end of the 14 resistance (R14), the other end ground connection of described 13 resistance (R13), the other end ground connection of described 5th transistor (M5), the grid of described 5th transistor (M5) is connected to the grid of outside the first transistor (M1), the other end of described 14 resistance (R14) is connected to the positive input terminal of described first operational amplifier (105) and one end of the 7th electric capacity (C7) respectively, the other end ground connection of described 7th electric capacity (C7).
6. the circuit for realizing controllable silicon light modulation and High Power Factor according to claim 1, it is characterized in that, described first sample circuit (101) comprising: the 9th resistance (R9), tenth resistance (R10), 11 resistance (R11), 5th transistor (M5), 6th electric capacity (C6) and the second inverter, one end of described tenth resistance (R10) is connected to the drain electrode of outside the first transistor (M1), the other end of described tenth resistance (R10) is connected to one end of described 11 resistance (R11) and one end of the 9th resistance (R9) respectively, the other end ground connection of described 11 resistance (R11), the other end of described 9th resistance (R9) is connected to one end of described 5th transistor (M5), the other end of described 5th transistor (M5) is connected to described one end of 6th electric capacity (C6) and the positive input terminal of described second operational amplifier (106) respectively, the grid of described 5th transistor (M5) is connected to the output of described second inverter, the input of described second inverter is connected to the grid of outside the first transistor (M1), the other end ground connection of described 6th electric capacity (C6), described second sample circuit (118) comprising: the 12 resistance (R12), 13 resistance (R13), 14 resistance (R14) and the 7th electric capacity (C7), one end of described 12 resistance (R12) is connected to the drain electrode of outside the first transistor (M1), the other end of described 12 resistance (R12) connects one end of the 13 resistance (R13) and one end of the 14 resistance (R14) respectively, the other end ground connection of described 13 resistance (R13), the other end of described 14 resistance (R14) is connected to the positive input terminal of described first operational amplifier (105) and one end of the 7th electric capacity (C7) respectively, the other end ground connection of described 7th electric capacity (C7).
7. the circuit for realizing controllable silicon light modulation and High Power Factor according to claim 1, it is characterized in that, this circuit also comprises: critical conduction mode flyback constant-current control module, and this module comprises: the 3rd comparator (111), the second trigger (112), raster data model (113), the 4th comparator (114) and lead-edge-blanking circuit (115); wherein, the negative input end of described 3rd comparator (111) is connected on the junction point of described 7th resistance (R7) and the 8th resistance (R8), the positive input terminal of described 3rd comparator (111) is connected to one end of described lead-edge-blanking circuit (115), the output of described 3rd comparator (111) is connected to the D end of described second trigger (112), the S end of described second trigger (112) is connected to the output of described 4th comparator (114), the Q end of described second trigger (112) is connected to the input of described raster data model (113), the non-end of Q of described second trigger (112) is connected to described first grid, the negative input end of described 4th comparator (114) is for the voltage signal of external auxiliary winding of sampling, the positive input terminal of described 4th comparator (114) receives the 4th reference voltage (Vref4), the output of described raster data model (113) is connected to the grid of outside the first transistor (M1), the other end of described lead-edge-blanking circuit (115) is connected to the source electrode of described outside the first transistor (M1).
8. the circuit for realizing controllable silicon light modulation and High Power Factor according to claim 7, is characterized in that, this circuit also comprises: rectifier bridge; LC filter; Primary absorbent circuit; The transformer be made up of armature winding, secondary winding and auxiliary winding; Be connected to the secondary circuit of described secondary winding; Be connected to the auxiliary power supply circuit of described auxiliary winding; The first transistor (M1); 4th resistance (R4); Described rectifier bridge, LC filter, primary absorbent circuit and transformer are sequentially connected in series, and the drain electrode of described the first transistor (M1) is connected to described armature winding, and the source electrode of described the first transistor (M1) is by the 4th resistance (R4) ground connection.
9. the circuit for realizing controllable silicon light modulation and High Power Factor according to claim 8, is characterized in that, this circuit also comprises: controllable silicon dimmer (117), and described controllable silicon dimmer (117) is connected to the front end of described rectifier bridge.
10. the circuit for realizing controllable silicon light modulation and High Power Factor according to claim 9, is characterized in that, this circuit also comprises: AC power (116), and described AC power (116) is connected to the front end of described controllable silicon dimmer (117).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310391394.3A CN103415128B (en) | 2013-09-02 | 2013-09-02 | Circuit for realizing controllable silicon dimming and high-power factor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310391394.3A CN103415128B (en) | 2013-09-02 | 2013-09-02 | Circuit for realizing controllable silicon dimming and high-power factor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103415128A CN103415128A (en) | 2013-11-27 |
| CN103415128B true CN103415128B (en) | 2015-04-22 |
Family
ID=49608104
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310391394.3A Active CN103415128B (en) | 2013-09-02 | 2013-09-02 | Circuit for realizing controllable silicon dimming and high-power factor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103415128B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104682707A (en) * | 2013-11-28 | 2015-06-03 | 深圳市海洋王照明工程有限公司 | Switching power supply for selectable output of voltage |
| CN104159357B (en) * | 2014-06-20 | 2016-03-30 | 东南大学 | The control method of a kind of LED illumination circuit output current effective value and power factor and control system thereof |
| CN105792433B (en) * | 2016-04-19 | 2017-08-25 | 深圳市明微电子股份有限公司 | Switching Power Supply driving chip and controllable silicon light modulation LED drive circuit |
| CN108770132B (en) * | 2018-07-23 | 2023-11-03 | 深圳市明微电子股份有限公司 | LED full-voltage high-efficiency linear driving circuit |
| CN111511074B (en) * | 2020-05-04 | 2021-11-23 | 陕西亚成微电子股份有限公司 | LED driving circuit and control method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201438773U (en) * | 2009-07-31 | 2010-04-14 | 深圳市通普科技有限公司 | LED dimming device |
| CN103248207A (en) * | 2013-05-21 | 2013-08-14 | 苏州智浦芯联电子科技有限公司 | Constant-current and constant-voltage fly-back converter based on primary side feedback |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103314639B (en) * | 2010-08-24 | 2016-10-12 | 皇家飞利浦有限公司 | Prevent the apparatus and method that dimmer resets in advance |
| CN203467027U (en) * | 2013-09-02 | 2014-03-05 | 陈畅 | Circuit used for realizing controllable silicon dimming and high power factor |
-
2013
- 2013-09-02 CN CN201310391394.3A patent/CN103415128B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201438773U (en) * | 2009-07-31 | 2010-04-14 | 深圳市通普科技有限公司 | LED dimming device |
| CN103248207A (en) * | 2013-05-21 | 2013-08-14 | 苏州智浦芯联电子科技有限公司 | Constant-current and constant-voltage fly-back converter based on primary side feedback |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103415128A (en) | 2013-11-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103415128B (en) | Circuit for realizing controllable silicon dimming and high-power factor | |
| CN102523650B (en) | Light-emitting diode (LED) current detection and control circuit | |
| CN106455216B (en) | A kind of thyristor regulating Optimizing Control System for LED luminance regulation | |
| CN103412181B (en) | For the inductive current zero cross detection circuit that boost power factor corrects | |
| CN101227780A (en) | LED lamp set drive power supply device | |
| CN107809830B (en) | Buck-boost LED drive circuit | |
| CN108449831B (en) | A kind of High Power Factor long-life LED drive power and control method | |
| CN103680174B (en) | Low dash current high power factor energy storage type countdown display circuit | |
| CN106954313B (en) | A kind of LED linear constant-current drive circuit of adaptive network voltage | |
| CN102917511A (en) | Anti-lightning type LED (Light Emitting Diode) power supply | |
| CN101969727A (en) | High power LED driving power supply | |
| CN102843844A (en) | LED (Light Emitting Diode) control circuit and LED illumination device | |
| CN106961768A (en) | A kind of LED linear constant-current drive circuit of active valley fill circuit pattern | |
| CN203467027U (en) | Circuit used for realizing controllable silicon dimming and high power factor | |
| CN103547041B (en) | Led drive circuit | |
| CN102711337B (en) | Light-emitting diode (LED) driving system | |
| CN103889123B (en) | A kind of LED light adjusting circuit and LED lamp | |
| CN103533710A (en) | LED (light emitting diode) driver | |
| CN201182026Y (en) | Driving power supply device of LED lamp group | |
| CN206894947U (en) | A kind of LED linear constant-current drive circuit of adaptive line voltage | |
| CN103904895B (en) | Method, circuit and switching power supply for limiting valley frequency | |
| CN203934080U (en) | With the LED lamp driving power source of timing function | |
| CN203734885U (en) | LED driving device and control circuit and output current detection circuit thereof | |
| CN102821520A (en) | LED (light-emitting diode) driving circuit and control method thereof | |
| CN103068096A (en) | Light-emitting diode (LED) lamp, current sampling circuit and drive circuit of LED lamp |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20151208 Address after: Suzhou City, Jiangsu province 215000 Industrial Park Suzhou Xinping Street No. 388 Suzhou innovation park off the 23 building 3 layer 09, 10 unit Patentee after: Suzhou Zhipu Xinlian Electronic Technology Co., Ltd. Address before: 210019, No. 1, Tongjiang Road, Jianye District, Jiangsu, Nanjing, China today, room 12, Dan GUI, 604 Patentee before: Chen Chang |
|
| C56 | Change in the name or address of the patentee | ||
| CP01 | Change in the name or title of a patent holder |
Address after: Suzhou City, Jiangsu province 215000 Industrial Park Suzhou Xinping Street No. 388 Suzhou innovation park off the 23 building 3 layer 09, 10 unit Patentee after: SUZHOU INTELLI-CHIPLINK ELECTRONICS TECHNOLOGY CO., LTD. Address before: Suzhou City, Jiangsu province 215000 Industrial Park Suzhou Xinping Street No. 388 Suzhou innovation park off the 23 building 3 layer 09, 10 unit Patentee before: Suzhou Zhipu Xinlian Electronic Technology Co., Ltd. |