CN103413825A - Flat type insulated gate bipolar transistor and manufacturing method thereof - Google Patents
Flat type insulated gate bipolar transistor and manufacturing method thereof Download PDFInfo
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- CN103413825A CN103413825A CN2013103477291A CN201310347729A CN103413825A CN 103413825 A CN103413825 A CN 103413825A CN 2013103477291 A CN2013103477291 A CN 2013103477291A CN 201310347729 A CN201310347729 A CN 201310347729A CN 103413825 A CN103413825 A CN 103413825A
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Abstract
The invention relates to the field of semiconductor appliances, and discloses a flat type insulated gate bipolar transistor and a manufacturing method of the flat type insulated gate bipolar transistor. The flat type insulated gate bipolar transistor comprises at least one unit, and the front face of each unit is provided with at least three corners; each unit comprises a second semiconductor type trap, a first semiconductor type doped region and a second semiconductor type doped region, wherein the second semiconductor type trap, the first semiconductor type doped region and the second semiconductor type doped region are arranged in a first semiconductor type substrate; the first semiconductor type doped region and the second semiconductor type doped region are arranged in the trap, and the dosage concentration of the first semiconductor type doped region and the second semiconductor type doped region is higher than the dosage concentration of the trap; at least one corner of each unit is provided with a corner area, and each corner area comprises the vertex of the corner, and the corner areas and the semiconductor type doped region have overlapped area; the first semiconductor type doped region does not comprise corner areas. The flat type insulated gate bipolar transistor can effectively avoid the locking phenomenon happened at all the corner positions of the appliance units, greatly increase the safe working area of the appliances and improve the performance of the appliances.
Description
Technical field
The present invention relates to field of semiconductor devices, particularly a kind of plane insulated gate bipolar transistor technology.
Background technology
Insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT) is the representative platform device of Novel power semiconductor device, is mainly used in the fields such as new forms of energy, locomotive traction, intelligent grid, high voltage converter.By power semiconductor device, electric energy is carried out to conversion and control, energy-saving effect can reach 10%-40%.Under the background of global warming, IGBT device application technology is one of comprehensive method of the best of the global efficiency of putative realization and carbon dioxide discharge-reduction target.
As shown in Figure 1, in the zone in figure between grid and emitter via, solid arrow means the passage of electronic current to the front plan view of conventional plane IGBT device cell, and dotted arrow means the passage of hole current.The profile of the plane IGBT device cell cut along the A-A ' position meaned in Fig. 1 as shown in Figure 2, it comprises N-type substrate 1, grid 6, emitter 5, the collector electrode of P+ collector electrode 8(heavy doping P type ion), P type trap 2, heavily doped N-type district 3, the heavy doping p type island region 4 of raising bolt-lock (Latch-up).
When the IGBT device was worked, the passage of electronic current and hole current as shown in Figure 2.Wherein hole current 3 belows, heavily doped N-type district of flowing through, be launched the utmost point and absorb.Because emitter and heavily doped N-type district 3 are in zero potential all the time, therefore, the existence of hole current and 3 p type island region territories, below, heavily doped N-type district (jointly being comprised of P type trap 2 and heavy doping p type island region 4) doped resistor, can cause the p type island region territory of regional 3 DeNXing districts, position 3 shown in Figure 2 and its below to have a potential difference.When hole current increased, when particularly the IGBT device turn-offed, this potential difference may be greater than 0.7V, caused the P/N joint to be opened, and device bolt-lock, thereby thermal breakdown, cause the IGBT component failure.
The present inventor finds, according to IGBT device bolt-lock inefficacy principle, from front plan view (Fig. 1), finding out, due to the hole current passage of the position, four angles of IGBT device cell long (than four parallel edges), so bolt-lock lost efficacy and the most easily occurred.And although the heavy doping p type island region 4 in Fig. 2 can be alleviated the generation of device bolt-lock to a certain extent, along with the increase of IGBT device current capability demand, its help is more and more less.The SOA of IGBT device is more and more limited.
Summary of the invention
The object of the present invention is to provide a kind of plane insulated gate bipolar transistor and manufacture method thereof, the latch phenomenon that can effectively suppress the position generation at all angles, plane insulated gate bipolar transistor unit, thereby the safety operation area of boost device significantly, improve the performance of device.
For solving the problems of the technologies described above, embodiments of the present invention disclose a kind of plane insulated gate bipolar transistor, comprise at least one unit, and the front of each this unit has at least three angles;
Each this unit comprises the second semiconductor type trap, the first semiconductor type doped region and the second semiconductor type doped region that is arranged in the first semiconductor type substrate;
This first semiconductor type doped region and this second semiconductor type doped region are arranged in above-mentioned trap, and the doping content of this first semiconductor type doped region and this second semiconductor type doped region is higher than the concentration of this trap;
In each this unit, have at least an above-mentioned angle to comprise an angular zone, this angular zone comprises the summit at this angle, and this angular zone and above-mentioned the second semiconductor type doped region have overlapping region;
Above-mentioned the first semiconductor type doped region does not comprise this angular zone.
Embodiments of the present invention also disclose a kind of manufacture method of plane insulated gate bipolar transistor, the plane insulated gate bipolar transistor comprises at least one unit, the front of each this unit has at least three angles, and the manufacture method of each this unit comprises the following steps:
First kind Semiconductor substrate is provided;
Generation is arranged in the second semiconductor type trap of this substrate;
Generate the first semiconductor type doped region and the second semiconductor type doped region, wherein,
This first semiconductor type doped region and this second semiconductor type doped region are arranged in above-mentioned trap, and the doping content of this first semiconductor type doped region and this second semiconductor type doped region is higher than the concentration of this trap, and
In each unit, have at least an above-mentioned angle to comprise an angular zone, this angular zone comprises the summit at this angle, and this angular zone and above-mentioned the second semiconductor type doped region have overlapping region, and
Above-mentioned the first semiconductor type doped region does not comprise this angular zone.
Compared with prior art, the main distinction and effect thereof are embodiment of the present invention:
In plane IGBT, heavily doped the first semiconductor type doped region is the source of IGBT, all influential to cut-in voltage, the saturation voltage of device, therefore, is the indispensable part of IGBT device.But the hole current passage of the position, all angles of conventional planar type IGBT unit is grown (comparing with limit), lost efficacy and the most easily occurred at these position breech locks.And in the present invention, in the position at all angles, do not carry out heavily doped the first semiconductor type Implantation, manufacturing process is simple, easily realization and cost are not high, can make the surface at all angles there is no the first semiconductor type doped region, and then the volume of the second semiconductor type doped region in the position at each angle of device cell of the first semiconductor type doped region below increased, and the dead resistance of hole current passage descends, and hole current is assembled alleviation.Therefore, there is no the first semiconductor type doped region on surface, latch phenomenon can't occur in the position at all angles of plane IGBT unit, and the performance of device is improved in the safety operation area of boost device significantly.Simultaneously, because heavily doped the first semiconductor type Implantation does not only adulterate in the position at plane IGBT angle, other positions still have heavily doped the first semiconductor type doped region, thereby the effect of its cut-in voltage to device and saturation voltage can not be affected.
Further, above-mentioned angular zone is connected with emitter, make heavily doped N-type doped region comprise the longest electronic current or the passage of hole current in plain zone in De Jiao position, plane IGBT unit, thereby make heavily doped P type doped region in the space of position, angle maximum, can more effectively suppress the generation of position, angle latch phenomenon.
The accompanying drawing explanation
Fig. 1 is the front plan view of a kind of plane IGBT device cell in prior art;
Fig. 2 is the angle sections figure of a kind of plane IGBT device cell in prior art;
Fig. 3 is the front plan view of a kind of plane IGBT device cell in second embodiment of the invention;
Fig. 4 is the angle sections figure of a kind of plane IGBT device cell in second embodiment of the invention;
Fig. 5 is the schematic flow sheet of the manufacture method of a kind of plane IGBT in third embodiment of the invention.
Embodiment
In the following description, in order to make the reader understand the application better, many ins and outs have been proposed.But, persons of ordinary skill in the art may appreciate that even without these ins and outs with based on many variations and the modification of following each execution mode, also can realize each claim of the application technical scheme required for protection.
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing, embodiments of the present invention are described in further detail.Wherein, similar reference numerals is indicated like in various accompanying drawings except describing in detail
First embodiment of the invention relates to a kind of plane IGBT.
Specifically, this plane IGBT comprises at least one unit, and the front of each this unit has at least three angles.
Each said units comprises the second semiconductor type trap, the first semiconductor type doped region and the second semiconductor type doped region that is arranged in the first semiconductor type substrate.
This first semiconductor type doped region and this second semiconductor type doped region are arranged in above-mentioned trap, and the doping content of this first semiconductor type doped region and this second semiconductor type doped region is higher than the concentration of this trap.
In each this unit, have at least an above-mentioned angle to comprise an angular zone, this angular zone comprises the summit at this angle, and this angular zone and above-mentioned the second semiconductor type doped region have overlapping region.
Above-mentioned the first semiconductor type doped region does not comprise this angular zone.
In the present embodiment, each said units also comprises emitter, grid and collector electrode.
In the present embodiment, above-mentioned angular zone is connected with emitter.
In addition, be appreciated that angular zone can not be connected with emitter in other execution modes of the present invention.
Angular zone is connected with emitter, make heavily doped N-type doped region at the longest electronic current of the plain district inclusion in De Jiao position, plane IGBT unit or the passage of hole current, thereby make heavily doped P type doped region in the space of position, angle maximum, more effectively suppress the generation of position, angle latch phenomenon.
In the present embodiment, the front of said units is rectangle.
In addition, be appreciated that in other execution modes of the present invention, the front of IGBT unit can be other shapes, such as being triangle, hexagon, octangle etc.
In addition, the front that is appreciated that plane IGBT refers to the face with emitter.
In the present embodiment, preferably, the first semiconductor type is N-type.
In addition, be appreciated that in other execution modes of the present invention, the first semiconductor type can be also the P type.
Fig. 3 is in present embodiment, and preferably, a kind of front is rectangle, and the first semiconductor type is the front plan view of the IGBT unit of N-type.
As shown in Figure 3, the grid zone at four angles of this rectangle IGBT unit is the zone of not carrying out the injection of heavy doping N-type, namely in the zone of this grid, there is no N-type doped region (i.e. the first semiconductor type doped region).In zone in figure between grid and emitter via, solid arrow means the passage of electronic current, and dotted arrow means the passage of hole current
Fig. 4 cuts along the B-B ' position marked in Fig. 3, the angle sections figure of this plane IGBT unit.
As shown in Figure 4, this front is that rectangular plane IGBT unit comprises: emitter 5, grid 6, P type trap 2, heavily doped P type doped region 4(are above-mentioned the second semiconductor type doped region), N-type substrate 1 and P+ collector electrode 8.In figure, marked the passage of hole current.Because heavily doped N-type injection is not carried out in the position at four angles, this front be rectangular plane IGBT unit in the grid zone at four angles, do not have electronic current to produce, the latch-up at these four angles is effectively suppressed.
In plane IGBT, heavily doped the first semiconductor type doped region is the source of IGBT, all influential to cut-in voltage, the saturation voltage of device, therefore, is the indispensable part of IGBT device.But the hole current passage of the position, all angles of conventional planar type IGBT unit is grown (comparing with limit), lost efficacy and the most easily occurred at these position breech locks.And in the present invention, in the position at all angles, do not carry out heavily doped the first semiconductor type Implantation, manufacturing process is simple, easily realization and cost are not high, can make the surface at all angles there is no the first semiconductor type doped region, and then the volume of the second semiconductor type doped region in the position at each angle of device cell of the first semiconductor type doped region below increased, and the dead resistance of hole current passage descends, and hole current is assembled alleviation.Therefore, there is no the first semiconductor type doped region on surface, latch phenomenon can't occur in the position at all angles of plane IGBT unit, and the performance of device is improved in the safety operation area of boost device significantly.Simultaneously, because heavily doped the first semiconductor type Implantation does not only adulterate in the position at plane IGBT angle, other positions still have heavily doped the first semiconductor type doped region, thereby the effect of its cut-in voltage to device and saturation voltage can not be affected.
Second embodiment of the invention relates to a kind of manufacture method of plane insulated gate bipolar transistor.Fig. 5 is the schematic flow sheet of the manufacture method of this plane insulated gate bipolar transistor.
Specifically, the exhausted IGBT of this plane comprises at least one unit, and the front of each this unit has at least three angles.The manufacture method of each this unit as shown in Figure 5, comprises the following steps:
In step 101, provide first kind Semiconductor substrate.
In step 102, generate the second semiconductor type trap that is arranged in above-mentioned substrate.
In step 103, generate the first semiconductor type doped region and the second semiconductor type doped region, wherein, this the first semiconductor type doped region and this second semiconductor type doped region are arranged in above-mentioned trap, the doping content of this first semiconductor type doped region and this second semiconductor type doped region is higher than the concentration of this trap, and in each this unit, have at least an above-mentioned angle to comprise an angular zone, this angular zone comprises the summit at this angle, and this angular zone and above-mentioned the second semiconductor type doped region have overlapping region, and above-mentioned the first semiconductor type doped region does not comprise this angular zone.
This step also comprises following sub-step:
By light mask image, change and photoetching process, do not carry out heavily doped the first semiconductor type Implantation at above-mentioned angular zone.
After this step, further comprising the steps of:
Generate emitter, grid and collector electrode.
In the present embodiment, the front of this plane IGBT unit is rectangle, and the first semiconductor type is N-type.
In addition, be appreciated that in other execution modes of the present invention, the front of this plane IGBT unit can be other shapes, and as triangle, hexagon, octangle etc., and the first semiconductor type can be the P type.
After this, process ends,
Present embodiment is the method execution mode corresponding with the first execution mode, present embodiment can with the enforcement of working in coordination of the first execution mode.The correlation technique details of mentioning in the first execution mode is still effective in the present embodiment, in order to reduce repetition, repeats no more here.Correspondingly, the correlation technique details of mentioning in present embodiment also can be applicable in the first execution mode.
It should be noted that, in the claim and specification of this patent, relational terms such as the first and second grades only is used for an entity or operation are separated with another entity or operating space, and not necessarily requires or imply between these entities or operation the relation of any this reality or sequentially of existing.And, term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thereby make the process, method, article or the equipment that comprise a series of key elements not only comprise those key elements, but also comprise other key elements of clearly not listing, or also be included as the intrinsic key element of this process, method, article or equipment.In the situation that not more restrictions, the key element that " comprises " and limit by statement, and be not precluded within process, method, article or the equipment that comprises described key element and also have other identical element.
Although pass through with reference to some of the preferred embodiment of the invention, the present invention is illustrated and describes, but those of ordinary skill in the art should be understood that and can to it, do various changes in the form and details, and without departing from the spirit and scope of the present invention.
Claims (10)
1. a plane insulated gate bipolar transistor, is characterized in that, comprises at least one unit, and the front of each this unit has at least three angles;
Each described unit comprises the second semiconductor type trap, the first semiconductor type doped region and the second semiconductor type doped region that is arranged in the first semiconductor type substrate;
Described the first semiconductor type doped region and described the second semiconductor type doped region are arranged in described trap, and the doping content of this first semiconductor type doped region and this second semiconductor type doped region is higher than the concentration of this trap;
In each described unit, have at least a described angle to comprise an angular zone, this angular zone comprises the summit at described angle, and this angular zone and described the second semiconductor type doped region have overlapping region;
Described the first semiconductor type doped region does not comprise described angular zone.
2. plane insulated gate bipolar transistor according to claim 1, is characterized in that, also comprises emitter, grid and collector electrode.
3. plane insulated gate bipolar transistor according to claim 1, is characterized in that, described angular zone is connected with emitter.
4. plane insulated gate bipolar transistor according to claim 3, is characterized in that, the front of described unit is rectangle.
5. according to the described plane insulated gate bipolar transistor of any one in claim 1 to 5, it is characterized in that, described the first semiconductor type is N-type.
6. the manufacture method of a plane insulated gate bipolar transistor, it is characterized in that, described plane insulated gate bipolar transistor comprises at least one unit, and the front of each this unit has at least three angles, and the manufacture method of each this unit comprises the following steps:
First kind Semiconductor substrate is provided;
Generation is arranged in the second semiconductor type trap of described substrate;
Generate the first semiconductor type doped region and the second semiconductor type doped region, wherein,
Described the first semiconductor type doped region and described the second semiconductor type doped region are arranged in described trap, and the doping content of this first semiconductor type doped region and this second semiconductor type doped region is higher than the concentration of this trap, and
In each described unit, have at least a described angle to comprise an angular zone, this angular zone comprises the summit at described angle, and this angular zone and described the second semiconductor type doped region have overlapping region, and
Described the first semiconductor type doped region does not comprise this angular zone.
7. the manufacture method of plane insulated gate bipolar transistor according to claim 6, is characterized in that, further comprising the steps of:
Generate emitter, grid and collector electrode.
8. the manufacture method of plane insulated gate bipolar transistor according to claim 7, is characterized in that, the step of described generation the first semiconductor type doped region, the second semiconductor type doped region and emitter also comprises following sub-step:
By light mask image, change and photoetching process, do not carry out heavily doped the first semiconductor type Implantation at described angular zone.
9. the manufacture method of plane insulated gate bipolar transistor according to claim 8, is characterized in that, the front of described unit is rectangle.
10. according to the manufacture method of the described plane insulated gate bipolar transistor of any one in claim 6 to 9, it is characterized in that, described the first semiconductor type is N-type.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110444594A (en) * | 2019-08-02 | 2019-11-12 | 扬州国扬电子有限公司 | A kind of the grid-controlled type power device and its manufacturing method of low dead resistance |
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|---|---|---|---|---|
| US5168331A (en) * | 1991-01-31 | 1992-12-01 | Siliconix Incorporated | Power metal-oxide-semiconductor field effect transistor |
| JP2004055976A (en) * | 2002-07-23 | 2004-02-19 | Toyota Industries Corp | Semiconductor device having trench structure |
| CN1890813A (en) * | 2003-12-24 | 2007-01-03 | 丰田自动车株式会社 | Trench gate field effect devices |
| WO2012120359A2 (en) * | 2011-03-09 | 2012-09-13 | Toyota Jidosha Kabushiki Kaisha | Insulated-gate bipolar transistor |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5168331A (en) * | 1991-01-31 | 1992-12-01 | Siliconix Incorporated | Power metal-oxide-semiconductor field effect transistor |
| JP2004055976A (en) * | 2002-07-23 | 2004-02-19 | Toyota Industries Corp | Semiconductor device having trench structure |
| CN1890813A (en) * | 2003-12-24 | 2007-01-03 | 丰田自动车株式会社 | Trench gate field effect devices |
| WO2012120359A2 (en) * | 2011-03-09 | 2012-09-13 | Toyota Jidosha Kabushiki Kaisha | Insulated-gate bipolar transistor |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110444594A (en) * | 2019-08-02 | 2019-11-12 | 扬州国扬电子有限公司 | A kind of the grid-controlled type power device and its manufacturing method of low dead resistance |
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