Background technology
The solar battery array simulator utilizes Circuits System to simulate the output characteristics that actual institute wants the solar battery array that obtains, and the simulated behavior of high-power complex illumination situation adopts numeric type solar battery array simulator, and its basic circuit topology is seen Fig. 1.Because following the variation of output voltage, the output current of solar cell changes, therefore the design of solar battery array simulator is voltage-controlled current source of design in essence, take output current as controlled quentity controlled variable, power circuit is carried out closed-loop control, thereby the characteristic that realizes complexity is simulated accurately.As shown in Figure 1, system is take power converter 1 as hardware platform, in the output characteristics of the solar battery array of output simulation under various varying environment conditions that makes power converter under the effect of dsp controller.The core control function of system is finished by dsp controller, makes up voltage controlled current signal generator 2 with A/D converter, D/A converter and dsp controller, realizes simulator programming simulation function by the programmable features of reference signal Ir.For realizing good output accuracy and real time and dynamic energy, require reference signal to have dynamic property and the stable state accuracy of real-Time Tracking Control.The design of the voltage controlled current signal generator of the reference signal that as seen, produce high precision, responds fast is the key link in the numeric type solar battery array Simulator design.
The design of tradition voltage controlled current signal generator adopts lookup table mode to realize that whole control procedure is finished by dsp controller.For improving real-time control performance, the numerically controlled algorithm of simplification that must be to a certain degree reduces the calculated amount in the controller, but will certainly reduce the tracking control accuracy like this, thereby need the operand of reasonable distribution primary controller, can weigh design at output accuracy and dynamic real-time.The solar battery array simulator will be realized good closed-loop control and real-time analog functuion, accurate sampling, good filtering and complicated control mode need to be arranged, adopt above-mentioned method for designing, the operand of dsp controller is excessive, system response time is slow, real-time is lower, can't satisfy the fast dynamic response requirement of the high precision output of solar battery array simulator, needs to adopt new implementation.
Summary of the invention
The object of the present invention is to provide a kind of voltage controlled current signal generator of solar battery array simulator of the reference signal that can export high precision, respond fast.
For achieving the above object, the present invention has adopted following technical scheme: a kind of voltage controlled current signal generator of solar battery array simulator, comprise the FPGA controller, its input/output terminal links to each other with the input/output terminal of dsp controller, its output terminal links to each other with the input end of D/A converter, the output terminal of D/A converter links to each other with the input end of power adjusting circuit by signal processing circuit, the output terminal of power adjusting circuit respectively with current sampling circuit, the input end of address generator links to each other, the output terminal of current sampling circuit links to each other with the input end of signal processing circuit, and the output terminal of address generator links to each other with the input end of FPGA controller.
The input/output terminal of described dsp controller has the PC of user-defined solar battery array I/V curve tables to link to each other by interface circuit and internal memory.
Described address generator is comprised of voltage sample circuit and A/D converter, the input end of voltage sample circuit links to each other with the output terminal of power adjusting circuit, the output terminal of voltage sample circuit links to each other with the input end of A/D converter, and the output terminal of A/D converter links to each other with the input end of FPGA controller.
Described FPGA controller adopts the XC2V250 chip, the FPGA controller is comprised of time-sequence control module, A/D control module, wave memorizer RAM, D/A control module and control bus interface module, the output terminal of described control bus interface module links to each other with the input end of time-sequence control module, A/D control module, D/A control module respectively, and the output terminal of described time-sequence control module links to each other with the input end of A/D control module, wave memorizer RAM, D/A control module respectively.
The input/output terminal of described control bus interface module links to each other with the input/output terminal of dsp controller.
The input end of described A/D control module links to each other with the output terminal of A/D converter, and described A/D converter adopts the AD7666 chip.
The output terminal of described D/A control module links to each other with the input end of D/A converter, and described D/A converter adopts the AD5551 chip.
As shown from the above technical solution, the present invention adopts the FPGA controller as main control chip, compares the very high frequency of FPGA controller with dsp controller with single-chip microcomputer, in control circuit, almost do not have the signal delay link, Effective Raise the dynamic responding speed of system; In addition, the present invention directly changes Voltage-output through A/D converter, obtains numeral output, as the address of current reference table, carries out meter reading.With the data of reading, through the D/A converter conversion, obtain current reference, adjust constant-current control circuit, significantly reduced the complicacy of control.Therefore, the present invention has good using value in the design of solar battery array simulator.
Embodiment
A kind of voltage controlled current signal generator of solar battery array simulator, comprise FPGA controller 3, its input/output terminal links to each other with the input/output terminal of dsp controller, its output terminal links to each other with the input end of D/A converter, the output terminal of D/A converter links to each other with the input end of power adjusting circuit by signal processing circuit, the output terminal of power adjusting circuit respectively with current sampling circuit, the input end of address generator 4 links to each other, the output terminal of current sampling circuit links to each other with the input end of signal processing circuit, and the output terminal of address generator 4 links to each other with the input end of FPGA controller 3.As shown in Figure 2.Current reference value is processed by signal processing circuit, carry out the error comparison process with output current, regulate electric current output through power adjusting circuit, realize closed-loop control, the working point of simulator is dropped on the solar battery array output I/V family curve that will simulate.
As shown in Figure 2, the input/output terminal of described dsp controller has the PC of user-defined solar battery array I/V curve tables to link to each other by interface circuit and internal memory.Described address generator 4 is comprised of voltage sample circuit and A/D converter, the input end of voltage sample circuit links to each other with the output terminal of power adjusting circuit, the output terminal of voltage sample circuit links to each other with the input end of A/D converter, and the output terminal of A/D converter links to each other with the input end of FPGA controller 3.The solar battery array I/V curve tables of dsp controller download user definition, the solar battery array output I/V family curve of simulating is carried out discretize, contrast relationship according to voltage and current is made form, and current value is transferred to FPGA controller 3, be stored among the wave memorizer RAM.Voltage sample circuit and A/D converter form address generator 4, after voltage sample circuit collects voltage signal, send into A/D converter and be converted to corresponding digital quantity signal, contact potential series is sent among the wave memorizer RAM after will quantizing, wave memorizer RAM is carried out addressing, this sequence corresponds to corresponding address, and the corresponding data in address are exactly the quantized sequences of current reference signal.Because these data are digital quantity, so be converted into current reference value through the D/A converter again.When output voltage changes, address generator 4 get the corresponding change of location data, can from wave memorizer RAM, take out thus corresponding current reference value.
As shown in Figure 3, described FPGA controller 3 adopts the XC2V250 chip, FPGA controller 3 is comprised of time-sequence control module, A/D control module, wave memorizer RAM, D/A control module and control bus interface module, the output terminal of described control bus interface module links to each other with the input end of time-sequence control module, A/D control module, D/A control module respectively, and the output terminal of described time-sequence control module links to each other with the input end of A/D control module, wave memorizer RAM, D/A control module respectively.The input/output terminal of described control bus interface module links to each other with the input/output terminal of dsp controller, and the input end of described A/D control module links to each other with the output terminal of A/D converter, and the output terminal of described D/A control module links to each other with the input end of D/A converter.Described A/D converter adopts the AD7666 chip, and described D/A converter adopts the AD5551 chip.
As shown in Figure 3, the control bus interface module be responsible for that communication, data between FPGA controller 3 and the dsp controller connects and dsp controller to the control of FPGA controller 3, dsp controller by the control bus interface module to FPGA controller 3 internal modules inputs reading and writing, initialization, begin the control signal such as collection, and I/V family curve table is transferred to FPGA controller 3.Sequential logic and the sample frequency of time-sequence control module control FPGA controller 3 inside, sampling clock is got by FPGA controller 3 major clock frequency divisions, and sampling clock can carry out corresponding modify according to the instruction that dsp controller sends in the native system simultaneously.A/D control module control A/D converter, can select different sample modes according to the control signal that dsp controller sends, under the continuous sampling pattern, the voltage data that collects is tabled look-up as the address, take out corresponding current reference amount from wave memorizer RAM, under the control of D/A control module, finish the D/A conversion.Be to reduce the control to FPGA controller 3 external resources, wave memorizer RAM uses the RAM that carries in 3 of the FPGA controllers.Because the processing speed of FPGA controller 3 from the speed of ram in slice reading out data much larger than dsp controller, so the system transients performance greatly improves.
Below in conjunction with Fig. 2,3 the present invention is further illustrated.
The present invention take require the Current Control precision as 0.1%, the highest switching frequency of system's adjustment is that 50kHz is example:
Adopt the VHDL language to design, take full advantage of the memory resource of FPGA controller 3 inside, select the wave memorizer RAM of FPGA controller 3 inside as data-carrier store, the storaging current reference data can realize quick table lookup function.
FPGA controller 3 is finished the control to A/D converter in whole system, to the processing of its digital signal that collects, and the buffer memory of data and serial output.FPGA controller 3 of the present invention adopts the XC2V250 chip of the Virtex-II series of XIlINS, and this chip provides the 432kb block RAM is provided in the sheet, the highest 420MHz internal clock speed.
The figure place of A/D converter and slewing rate have determined solar battery array simulator Control of Voltage precision and control rate to a certain extent.The present invention adopts 16 A/D converter AD7666 of ANALOG DEVICES company, and its switching rate is 500kSPS.For 16 A/D, quantize 65536 grades of progression, as seen, the voltage measurement precision of system can reach very high.
The figure place of D/A converter and slewing rate determine Current Control precision and control rate.The present invention adopts the input of 14 bit serial, the Voltage-output D/A converter AD5551 of ANALOG DEVICES company, and its maximum clock speed is 25MHz.
Model machine circuit stable state output current test data the results are shown in Table 1 among the present invention:
Table 1 stable state output current test data
As can be seen from Table 1, the maximum error of Current Control is 0.077%, illustrates that circuit has preferably control accuracy.
Be the adjustment characteristic of test macro at the 50kHz switching frequency, adopt the transient response of switching frequency test circuit test macro as shown in Figure 4, Fig. 5 is test result, and wherein passage 2 is power tube V1 control signal, and passage 1 is the model machine output voltage waveforms.
As seen, circuit can be realized the rapid adjustment of 50kHz, adopts the present invention, can make the solar battery array simulator have good transient state adjustment capability.