CN103344660A - Electron microscope analysis method for defect detection according to circuit pattern - Google Patents
Electron microscope analysis method for defect detection according to circuit pattern Download PDFInfo
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- CN103344660A CN103344660A CN2013102647740A CN201310264774A CN103344660A CN 103344660 A CN103344660 A CN 103344660A CN 2013102647740 A CN2013102647740 A CN 2013102647740A CN 201310264774 A CN201310264774 A CN 201310264774A CN 103344660 A CN103344660 A CN 103344660A
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Abstract
The invention discloses an electron microscope analysis method for defect detection according to a circuit pattern. The method comprises the following steps: selecting the characteristic circuit pattern of a chip design circuit pattern; inputting a defect location file scanned by defect detection equipment into a server, and converting the defect location file into a defect file with the characteristic circuit pattern through the server; guiding the defect file into an electron microscope; and comparing the characteristic circuit pattern of the defect file to determine a defect location through the electron microscope. According to the technology of the method, the electron microscope compares the characteristic circuit pattern of the defect file to determine the defect location and take photos, the step of constantly taking photos at adjacent chips is removed, the effective operation efficiency of the equipment is greatly increased, and meanwhile the capture failure of repeat defects of the adjacent chips can be avoided.
Description
Technical field
The present invention relates to the ic manufacturing technology field, relate in particular to the method for defective on the wafer being carried out electron microscopic analysis, specifically a kind of electron microscopic analysis method of carrying out defects detection according to circuitous pattern.
Background technology
The manufacturing process of integrated circuit complexity very briefly, is exactly on backing material (as silicon substrate), use the whole bag of tricks to form difference " layer ", and mix ion in selected zone, to change the electric conductivity of semiconductor material, form the process of semiconductor devices.The many steps of this process need just can be finished, approximately need be through the operations in hundreds of roads from wafer to the integrated circuit finished product, and the related operation of special advanced technology is just more many.By this complicated a lot of operation, just can be on a small chip integrated thousands of even more than one hundred million transistors, Here it is ic manufacturing process.The manufacturing process of integrated circuit is formed by multiple individual event process combination, and main in simple terms individual event technology comprises three classes usually: thin film preparation process, figure shifting process and doping process.Requirement for the computing that can satisfy the chip sophisticated functions, the critical size of on-chip circuitry figure constantly dwindles, advanced integrated circuit fabrication process photoetching technique has begun to adopt EUV lithography, electron beam projection lithography and ion beam projection lithography and X-ray lithography etc., particularly work as the circuitous pattern critical size and enter into 20nm technology node once, traditional optical detection apparatus is because the restriction ratio of resolution is difficult to capture the tiny defect of some key graphic, and this is a huge difficult problem for the exploitation of various new technologies and the lifting of chip yield.
All must utilize the observation of electron microscope the pattern of defective could be seen clearly for the minimum defective of these sizes, and the defective of existing electron microscope seizure principle is, the defective locations file that will obtain in the defective scanning device imports to electron microscope, be the distribution plan of defective on wafer as Fig. 1, electron microscope the position of defective take pictures and carry out with adjacent chips on the figure comparison of same position, if find that signal has difference, equipment just is judged as the position at defective place and carries out discrepant point placed in the middle and take pictures as shown in Figure 2, Fig. 2 (b) is the chip that has defective, Fig. 2 (a) is the adjacent chip in the left side of the defective chip of Fig. 2 (b), and Fig. 2 (c) is the adjacent chip in the right of the defective chip of Fig. 2 (b).This work principle since in seeking the process of defective equipment need constantly on wafer different chip to carry out taking pictures and comparing repeatedly, cause effective running efficiency of equipment low, also have the failure that also has the defective of repetition also will cause defective to catch when adjacent chips.
Chinese invention patent (publication number: CN102435629A) disclose a kind of detection method of scanning electron microscope, be used for the wafer that has a plurality of chips on it is carried out defects detection, having comprised: the file that imports defective wafer; Wafer to be measured is positioned on the plummer of scanning electron microscope; A certain chip turning on the wafer to be measured is set at reference position; This wafer to be measured is carried out position correction; Obtain other deviate of wafer scale of two kinds of type cavity centers; Select a chip to be measured, the coordinate that utilizes its chip turning of other deviate correction of wafer scale in this defective scanning machine, to draw, under the state of enlarged image, make its chip turning move to the display image center, obtain the deviate of the chip level of two kinds of type cavity centers; Deviate based on other deviate of this wafer scale and this chip level obtains revised defect coordinate; According to this revised defect coordinate, make defective to be measured be positioned at the electron gun below of this defective scanning machine, thereby catch the pattern of defective fast accurately.
Chinese invention patent (publication number: CN101022075) disclose a kind of scanning electron microscope, wherein, apply be used to the positive voltage that once electron beam is accelerated, and at the top of object lens configuration electric field shielding plate or magnetic field shielding plate or electromagnetic-field-shielded plate.The scanning electron microscope that utilization has such structure obtains the sample picture.The scanning electron microscope of the feature of the concavo-convex picture with the high resolving power that obtains specimen surface and high-contrast can be provided thus.
Above-mentioned two patents of invention all disclose and have adopted electron microscope to the method for defects detection, but all different with the technological means of method employing of the present invention.
Summary of the invention
Problem at above-mentioned existence, the present invention discloses a kind of electron microscopic analysis method of carrying out defects detection according to circuitous pattern, different chips are taken pictures repeatedly and contrast to overcome in the prior art electron microscope, cause effective running efficiency of equipment low, and when adjacent chips also has the defective of repetition, will cause defective to catch the problem of failure.
To achieve these goals, the present invention adopts following technical scheme:
A kind of electron microscopic analysis method of carrying out defects detection according to circuitous pattern, be applied in the defects detection and analytic process to wafer, chip design circuitous pattern in the described wafer is deposited in the server, wherein, comprise the steps: to choose feature circuitous pattern in the described chip design circuitous pattern; The defective locations file that the defects detection device scan is obtained is input in the described server, and described server is the defect file that has described feature circuitous pattern with described defective locations file conversion; Described defect file is imported in the electron microscope; Described electron microscope is determined defective locations by the feature circuitous pattern of comparing in the described defect file.
Above-mentioned electron microscopic analysis method of carrying out defects detection according to circuitous pattern, wherein, choose the feature circuitous pattern in the described chip design circuitous pattern, be specially: when described server is created the defects detection program of described defects detection equipment, described chip design circuitous pattern is distributed according to coordinate, and graphic feature and the coordinate position of choosing described feature circuitous pattern then are recorded in the described defects detection program.
Above-mentioned electron microscopic analysis method of carrying out defects detection according to circuitous pattern, wherein, the defective locations file that the defects detection device scan is obtained is input in the described server, described server is the defect file that has described feature circuitous pattern with described defective locations file conversion, be specially: the defective locations file that the defects detection device scan is obtained is input in the described server, wherein, to be described defects detection equipment obtain when described wafer being carried out defective scanning described defective locations file comprises file based on the defect coordinate of defects detection equipment; Described server is to comprise the graphic feature of described feature circuitous pattern and coordinate position with described defective locations file conversion, and the defect file of described defect coordinate based on defects detection equipment.
Above-mentioned electron microscopic analysis method of carrying out defects detection according to circuitous pattern, wherein, described electron microscope is determined defective locations by the feature circuitous pattern of comparing in the described defect file, be specially: described electron microscope finds described feature circuitous pattern by graphic feature and the coordinate position of described feature circuitous pattern, generates the coordinate position based on electron microscope of described feature circuitous pattern simultaneously; Compare coordinate position and the described coordinate position based on electron microscope of described feature circuitous pattern, obtain the coordinate difference; According to the described defect coordinate based on defects detection equipment of described coordinate difference correction, obtain the defect coordinate based on electron microscope, to determine defective locations.
Above-mentioned carry out the electron microscopic analysis method of defects detection according to circuitous pattern, wherein, described feature circuitous pattern is not have the circuitous pattern with obvious characteristic that repeats in the described chip design circuitous pattern.
Above-mentioned carry out the electron microscopic analysis method of defects detection according to circuitous pattern, wherein, described feature circuitous pattern is chosen 1～3.
Above-mentioned carry out the electron microscopic analysis method of defects detection according to circuitous pattern, wherein, also comprise: described electron microscope is taken pictures at described defective locations, to obtain the defective photo.
The present invention has following advantage or beneficial effect:
Utilize technology of the present invention, adopt electron microscope by comparing feature circuitous pattern in the described defect file and determine defective locations and taking pictures, saved the step of constantly taking pictures in adjacent chips, improve effective operational paradigm of equipment greatly, also can avoid the adjacent chips repeated defects to catch failure simultaneously.
Concrete description of drawings
Fig. 1 is the distribution schematic diagram of defective on wafer in the prior art;
Fig. 2 (a-c) is the synoptic diagram that electron microscope is compared and taken pictures adjacent chips in the prior art;
Fig. 3 is the synoptic diagram that has the defect file of feature circuitous pattern in the embodiment of the invention;
Fig. 4 (a-d) is the defective photo that electron microscope photographed after comparing according to the defect file that has the feature circuitous pattern in the embodiment of the invention.
Embodiment
The present invention is further illustrated below in conjunction with accompanying drawing and specific embodiment, but not as restriction of the present invention.
In the prior art, defect inspection equipment is carrying out defective when scanning to wafer, and the coordinate of the defective that can obtain producing in the technological process according to the data of chip comparison is as, first defective: (x1, y1); Second defective: (x2, y2) etc., still, when the coordinates transmission of these defectives was observed under the electron microscope, (x1 was y1) with (x2, coordinate position y2) directly finds defective because the difference of two equipment can not directly pass through.
As one embodiment of the present of invention, present embodiment relates to a kind of electron microscopic analysis method of carrying out defects detection according to circuitous pattern, be applied in the defects detection and analytic process to wafer, the chip design circuitous pattern in the wafer is deposited in the server, comprises the steps:
Step S1, choose the feature circuitous pattern in the chip design circuitous pattern, be specially: when server is created the defects detection program of defects detection equipment, the chip design circuitous pattern is distributed according to coordinate, the graphic feature of selected characteristic circuitous pattern and coordinate position are recorded in the defects detection program then, here the coordinate position of supposing the feature circuitous pattern for (n, l).
Step S2, the defective locations file that the defects detection device scan is obtained is input in the server, server is the defect file that has the feature circuitous pattern with the defective locations file conversion, as shown in Figure 3, be specially: the defective locations file that the defects detection device scan is obtained is input in the server, wherein, to be defects detection equipment obtain when wafer being carried out defective scanning the defective locations file comprises file based on the defect coordinate of defects detection equipment, here suppose based on the defect coordinate of defects detection equipment for (x1, y1); Server with the defective locations file conversion be comprise the graphic feature of feature circuitous pattern and coordinate position (n, l), and based on defect coordinate (x1, defect file y1) of defects detection equipment.
Step S3 imports to defect file in the electron microscope.
Step S4, electron microscope is determined defective locations by the feature circuitous pattern in the comparison defect file, is specially:
Step S401: electron microscope by the feature circuitous pattern graphic feature and coordinate position (n l) finds the feature circuitous pattern, simultaneously the coordinate position based on electron microscope of generating feature circuitous pattern (a, s).
Step S402: (n, l) and based on the coordinate position of electron microscope (a s), obtains coordinate difference (δ 1, and β 1) to the coordinate position of comparison feature circuitous pattern, i.e. δ 1=a-n, β 1=s-1.
Step S403: (δ 1 according to the coordinate difference, β 1) revise the defect coordinate (x1 based on defects detection equipment, y1), obtain the defect coordinate (t1 based on electron microscope, z1), i.e. t1=δ 1+x1, z1=β 1+y1, determined defective locations this moment, and electron microscope just can observe directly the pattern of defective by this revised coordinate.
Step S5, electron microscope is taken pictures at defective locations, to obtain the defective photo, in the present embodiment, the defective photo as shown in Figure 4, wherein, Fig. 4 (b) is the defective photo of the defective locations of Fig. 4 (a), Fig. 4 (d) is the defective photo of the defective locations of Fig. 4 (c), can clearly observe the pattern of defective locations from Fig. 4 (b) and Fig. 4 (d).
In the present embodiment, the feature circuitous pattern is not have the circuitous pattern with obvious characteristic that repeats in the chip design circuitous pattern.In general, the feature circuitous pattern is chosen 1～3, preferably choose 2, calculate two coordinate differences by 2 feature circuitous patterns, the average of coordinates computed difference from two coordinate differences that obtain as the coordinate difference that is used in the subsequent step revising based on defects detection equipment, so both can satisfy the calculating for the coordinate difference with this average again, it is too loaded down with trivial details to be unlikely to computation process, can guarantee the degree of accuracy of coordinate difference again.
By above-described embodiment as can be seen, the present invention adopts electron microscope by comparing feature circuitous pattern in the described defect file and determine defective locations and taking pictures, saved the step of constantly taking pictures in adjacent chips, improve effective operational paradigm of equipment greatly, also can avoid the adjacent chips repeated defects to catch failure simultaneously.
The technology node that the present invention uses is 〉=130nm, 90nm, 65/55nm, 45/40nm, 32/28nm or＜=22nm, the technology platform of application is Logic, Memory, RF, HV, Analog/Power, MEMS, CIS, Flash, eFlash or Package.
It should be appreciated by those skilled in the art that those skilled in the art realizing described variation example in conjunction with prior art and above-described embodiment, do not do at this and give unnecessary details.Such variation example does not influence flesh and blood of the present invention, does not repeat them here.
More than preferred embodiment of the present invention is described.It will be appreciated that the present invention is not limited to above-mentioned specific implementations, wherein the equipment of not describing in detail to the greatest extent and structure are construed as with the common mode in this area and are implemented; Any those of ordinary skill in the art, do not breaking away under the technical solution of the present invention scope situation, all can utilize method and the technology contents of above-mentioned announcement that technical solution of the present invention is made many possible changes and modification, or being revised as the equivalent embodiment of equivalent variations, this does not influence flesh and blood of the present invention.Therefore, every content that does not break away from technical solution of the present invention according to any simple modification, equivalent variations and the modification that technical spirit of the present invention is done above embodiment, all still belongs in the scope of technical solution of the present invention protection.
Claims (7)
1. one kind is carried out the electron microscopic analysis method of defects detection according to circuitous pattern, is applied in the defects detection and analytic process to wafer, and the chip design circuitous pattern in the described wafer is deposited in the server, it is characterized in that, comprises the steps:
Choose the feature circuitous pattern in the described chip design circuitous pattern;
The defective locations file that the defects detection device scan is obtained is input in the described server, and described server is the defect file that has described feature circuitous pattern with described defective locations file conversion;
Described defect file is imported in the electron microscope;
Described electron microscope is determined defective locations by the feature circuitous pattern of comparing in the described defect file.
2. according to claim 1ly carry out the electron microscopic analysis method of defects detection according to circuitous pattern, it is characterized in that, choose the feature circuitous pattern in the described chip design circuitous pattern, be specially:
When described server is created the defects detection program of described defects detection equipment, described chip design circuitous pattern is distributed according to coordinate, graphic feature and the coordinate position of choosing described feature circuitous pattern then are recorded in the described defects detection program.
3. electron microscopic analysis method of carrying out defects detection according to circuitous pattern according to claim 2, it is characterized in that, the defective locations file that the defects detection device scan is obtained is input in the described server, described server is the defect file that has described feature circuitous pattern with described defective locations file conversion, is specially:
The defective locations file that the defects detection device scan is obtained is input in the described server, wherein, to be described defects detection equipment obtain when described wafer being carried out defective scanning described defective locations file comprises file based on the defect coordinate of defects detection equipment;
Described server is to comprise the graphic feature of described feature circuitous pattern and coordinate position with described defective locations file conversion, and the defect file of described defect coordinate based on defects detection equipment.
4. according to claim 3ly carry out the electron microscopic analysis method of defects detection according to circuitous pattern, it is characterized in that described electron microscope is determined defective locations by the feature circuitous pattern of comparing in the described defect file, is specially:
Described electron microscope finds described feature circuitous pattern by graphic feature and the coordinate position of described feature circuitous pattern, generates the coordinate position based on electron microscope of described feature circuitous pattern simultaneously;
Compare coordinate position and the described coordinate position based on electron microscope of described feature circuitous pattern, obtain the coordinate difference;
According to the described defect coordinate based on defects detection equipment of described coordinate difference correction, obtain the defect coordinate based on electron microscope, to determine defective locations.
5. according to each described electron microscopic analysis method of carrying out defects detection according to circuitous pattern of claim 1-4, it is characterized in that described feature circuitous pattern is not have the circuitous pattern with obvious characteristic that repeats in the described chip design circuitous pattern.
6. according to claim 5ly carry out the electron microscopic analysis method of defects detection according to circuitous pattern, it is characterized in that described feature circuitous pattern is chosen 1～3.
7. each describedly carries out the electron microscopic analysis method of defects detection according to circuitous pattern according to claim 1, it is characterized in that also comprise: described electron microscope is taken pictures at described defective locations, to obtain the defective photo.
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| CN104157586A (en) * | 2014-08-08 | 2014-11-19 | 上海华力微电子有限公司 | Method of precisely positioning and analyzing repeated structure defects found by electron beam defect detection |
| CN104319244B (en) * | 2014-08-13 | 2017-02-01 | 武汉新芯集成电路制造有限公司 | Positioning method of failure center point of chip |
| CN108321096A (en) * | 2018-02-24 | 2018-07-24 | 上海华力微电子有限公司 | A kind of lookup method of the lookup system and wafer defect of wafer defect |
| CN109085466A (en) * | 2018-07-13 | 2018-12-25 | 上海华力集成电路制造有限公司 | Light shield Electro-static Driven Comb defect inspection method |
| CN110998463A (en) * | 2017-01-18 | 2020-04-10 | Asml荷兰有限公司 | Knowledge recommendation for defect inspection |
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