CN103338178A - All phase OFDM system design based on FPGA - Google Patents
All phase OFDM system design based on FPGA Download PDFInfo
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- CN103338178A CN103338178A CN2013102889190A CN201310288919A CN103338178A CN 103338178 A CN103338178 A CN 103338178A CN 2013102889190 A CN2013102889190 A CN 2013102889190A CN 201310288919 A CN201310288919 A CN 201310288919A CN 103338178 A CN103338178 A CN 103338178A
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Abstract
An OFDM (Orthogonal Frequency Division Multiplexing) is a key technology in the field of wireless communication, and a phase deviation is generated easily to cause restoration distortion of a carrier signal in a time-varying excitation environment, but FFT (Fast Fourier Transform) adopting an all phase signal preprocessing technology has phase invariability, and a research shows that an OFDM system utilizing the technology can reduce a phase error effectively, and can reduce the noise power significantly. According to the system, an all phase FFT processing unit for signal processing in the OFDM system can be achieved by adopting an FPGA (Field Programmable Gate Array) technology; an all phase processing module of the system is achieved by selecting a windowless all phase preprocessing method; an all phase OFDM baseband transmission system is achieved; the processing efficiency and the expense of an APOFDM (All Phase Orthogonal Frequency Division Multiplexing) system are simulated very well on hardware due to the parallelism and the dynamic reconstruction performance of an FPGA; the system has significant performance advantages, and is low in power consumption, high in integration level and good in stability; and therefore, the system has a better theoretical value and practical significance in further improvement of the OFDM system.
Description
Technical field
The present invention relates to a kind of full phase place ofdm system design based on FPGA, OFDM is a kind of multi-carrier transmission technology, have characteristics such as higher, the anti-intersymbol interference ability of spectrum utilization efficiency is strong, the carrier data rate can be modulated flexibly, can be widely used in fields such as signal processing, radio communication, wireless transmission.
Background technology
Orthogonal frequency division multiplexi (OFDM) is a kind of multi-carrier modulation technology of special shape, in ADSL (Asymmetric Digital Subscriber Line) (ADSL), is also referred to as discrete multitone modulation (DMT).It utilizes contrary fast fourier transform (IFFT) and fast Fourier transform (FFT) to realize modulation and demodulation respectively, is minimum, the most widely used a kind of multi carrier modulation scheme of implementation complexity.Ofdm system adopts the DFT conversion to realize the quadrature modulation of each subcarrier, and has good performance.The ofdm system signal of its design is when the transmission signal, and the anti-clutter interference performance is especially outstanding, but owing to orthogonal transmission between the different sub carrier of this system, has greatly improved the utilization ratio of transmission band especially.Under the multipath channel transmission environment, the broadband trafficability characteristic can be subjected to the influence of frequency selective fading.In this case, ofdm system can adopt lower data transfer rate, can significantly reduce this frequency selective fading influence.
The whole phase FFT treatment technology has the inhibition spectral leakage and reduces the good characteristic that disturbs between subcarrier, at the OFDM wireless communication field, ofdm system is very sensitive to frequency shift (FS) and phase noise, and frequency deviation and phase noise can make the orthogonal property between each subcarrier worsen.Even have only centesimal frequency shift (FS) also can very easily cause each subcarrier of ofdm system to lose orthogonality, thereby cause the rising of the error rate, influence the operate as normal of system.At FFT frequency shift (FS) and this problem of phase noise, adopt whole phase FFT (APFFT) processor, utilize self spectrum analysis function to realize judgement to signal phase and amplitude having the ability that good inhibition spectrum is revealed.
Because the characteristic of the parallel and dynamic reconfigurable of FPGA has been simulated treatment effeciency and the expense situation of the ofdm system after adopting full phase data preconditioning technique well at hardware.The low-power consumption of this system, high integration and stability have reference significance to the further improvement of ofdm system, also have certain application prospect, have higher utility.
Summary of the invention
For solve the time become that signal easily produces phase deviation under the incentive environment, cause the problem of carrier signal noise, adopt the FFT of full phase signal preconditioning technique the to have characteristics of " phase invariant ", select windowless full phase place preprocess method to realize the full Phase Processing module of native system, on the basis of the ofdm system of realizing, to be incorporated in this OFDM baseband transmission system based on the whole phase FFT processor that FPGA realizes, the ofdm system that studies show that this technology of use can effectively solve phase error, significantly reduces noise power.
Native system is based on the correlative study to FPGA technology and ofdm system, mainly current situation and the know-why of ofdm system are introduced, and by the analysis to the OFDM baseband transmission system, adopt the FPGA technology to realize a kind of OFDM baseband transmission system, comprise FFT/IFFT, channel coding/decoding, interweave and deinterleaving, constellation mapping and key modules such as solution mapping, convolutional encoding and viterbi coding.The overall system design structure chart as shown in Figure 1.
1. whole phase FFT processing unit
After original input signal carried out full phase data preliminary treatment, handle by the FFT conversion again, this method is referred to as full phase place fast Fourier transform (APFFT), this method has considered that all length of input data is the segmentation situation of N, and also just to have traveled through length be all start-phase of the segmentation of N to these data so.In the whole phase FFT processing procedure, the complexity of calculating will increase greatly, because a FFT handles by original direct calculating and has become present calculating N time that need, when N is bigger, its time expense is too big concerning fft processor, therefore will before the input fft processor data be carried out convergence processing.According to full phase data preconditioning technique, data are carried out carrying out after this processing FFT again handle, like this time complexity that calculates of APFFT just with FFT be similar to identical, and after its result and N the FFT processing again the result of weighted sum be of equal value.The basic hardware structure of this APFFT processor comprises the FFT processing module, preprocessed data memory module and read/write address generation module etc.
2. system's baseband signal transmission processing unit
Ofdm signal is handled and is divided into transmitting terminal and two parts of receiving terminal.Quadrature modulation in system adopts the fast algorithm FFT/IFFT of DFT/IDFT, and the IFFT of transmitting terminal is responsible for the signal of input is transformed into time domain by frequency domain, and the FFT of receiving terminal then is responsible for signal is decomposed frequency domain again.The operation principle of transmitting terminal and receiving terminal as shown in Figure 2.
1) channel coding/decoding module
In digital communication, the subject matter that runs in digital information exchange and the transmission course is exactly integrity problem, i.e. mistake and handling problem thereof in the process of exchange and transmission.Main cause is because the characteristic of channel is undesirable and the influence of additive noise and artificial disturbance, makes receiving terminal produce mistaken verdict, adopts error control coding can significantly reduce the error rate afterwards.Be quickening system development efficient, and improve rate of accurateness, the IP kernel Reed-Solomon Compiler that native system directly uses the Quartus II Integrated Development Environment of ALTERA company exploitation to provide finishes Reed-Solomon encoder and decoder.The structural design drawing of the circuit theory diagrams of RS encoder and RS decoder respectively as shown in Figure 3 and Figure 4.
2) interweave and de-interleaving block
The purpose of carrying out interlace operation is in order to prevent paroxysmal continuous mistake on a large scale, to be used for improving the reliability of system.Its main method is that continuous data are separately sent, and so also can significantly improve the performance of Viterbi decoding.When realizing, adopt dual port RAM to do buffer register, its operation is that row output is imported, pressed to the data of a storage matrix (6 * 6) by row, so just can break up original continuous data easily, during as if the continuous mistake of appearance, mistake can be distributed in a plurality of packets equably.The purpose of deinterleaver is for original scattered continuous data being recombined into together, entering the recovery that decoder is finished data message again.Its implementation is identical with interleaver, and row output is imported, pressed to data by row equally.The interleaver of native system and the deinterleaver standard according to the Avalon bus when realizing adds some necessary control signals, meets bus standard, makes things convenient for the transfer of data between disparate modules.
3) convolutional encoding and viterbi decoding module
Convolution code is a kind of nonblock code, be will input information sequence be divided into the grouping that length is k, then according to certain coding rule, be that the information word affix length of k is the supervision unit of r with length, give birth to the code character of growing into n=k+r.The structure chart of this convolution code as shown in Figure 5, this module mainly is made up of circuit such as multi-stage shift register, modulo 2 adders.Convolution code is when coding, and information code is to pass through encoder continuously, continuously data is pushed to next module.Adopt Viterbi (viterbi) interpretation method that convolution code is deciphered, its basic thought is that receiving sequence and all possible transmission sequence are made comparisons, and selects a less sequence of code distance wherein as the transmission sequence.The viterbi IP Core that the Quartus II Integrated Development Environment that we still adopt ALTERA company to develop when realizing provides finishes, and its implementation is with identical before.
4) constellation mapping module
Constellation mapping is used for realizing the modulation of OFDM symbol, and its modulation system has PSK or QAM.Wherein, QAM is the modulation system of a kind of amplitude and phase combining keying, has higher reliability and band efficiency, is a kind of application digital modulation mode more widely.What native system adopted is the 64-QAM mapping mode, and its principle is by mapping binary data to be mapped as complex data, and its real part and imaginary part correspond respectively to homophase and the quadrature component of OFDM symbol, and its constellation mapping figure as shown in Figure 6.
Benefit of the present invention is to utilize the advantage of full phase data preconditioning technique aspect the inhibition spectrum leakage, in conjunction with fast Fourier transform, adopted the FPGA technology to realize this full phase place fast fourier transform processor, built a kind of full phase place OFDM base band data transmission system at the FPGA platform, owing to adopted full phase data preconditioning technique, this system to can solve frequency shift (FS) and the phase noise problem of analog signal.
Description of drawings
The present invention is further described below in conjunction with drawings and Examples.
Fig. 1 is the master-plan structure chart of OFDM baseband transmission system.
Fig. 2 is the fundamental diagram of system's transmitting terminal and receiving terminal, and the IFFT of transmitting terminal is responsible for the signal of input is transformed into time domain by frequency domain, and the FFT of receiving terminal then is responsible for signal is decomposed frequency domain again.Also have QAM modulation, and processes such as string conversion/string and conversion, Cyclic Prefix, protection interval in the middle of this.
Fig. 3 is the circuit theory diagrams of Reed-Solomon encoder.
Fig. 4 is the structural design drawing of Reed-Solomon decoder.
Fig. 5 is the structure chart of convolution code, and as can be seen from the figure, this module mainly is made up of circuit such as multi-stage shift register, modulo 2 adders.
Fig. 6 is the constellation mapping figure of 64-QAM mapping mode.
Embodiment
As Fig. 1, shown in 2, OFDM baseband transmission system of the present invention is divided into transmitting terminal and two parts of receiving terminal.Quadrature modulation in system can adopt the fast algorithm FFT/IFFT of DFT/IDFT, and along with the development of VLSI, and the realization of fft processor nonexistence can bottleneck, has been very ripe application.The IFFT of transmitting terminal is responsible for the signal of input is transformed into time domain by frequency domain, and the FFT of receiving terminal then is responsible for signal is decomposed frequency domain again.Also have QAM modulation, and processes such as string conversion/string and conversion, Cyclic Prefix, protection interval in the middle of this.
Function and principle process according to Fig. 3, Fig. 4, Fig. 5, Fig. 6 description, utilize the programming of VHDL hardware description language and Modelsim specialty simulation software to compile with emulation and come the design of realization system, earlier each unit programming is realized, and generation symbol file, graphical interfaces at developing instrument connects each unit, and the locking pin, download checking at the FPGA platform at last, hardware is realized the full phase place ofdm system design based on FPGA.Simultaneously, the main modular of finishing is carried out independent emulation determines its correctness and reliability, and its performance characteristics has been launched further analysis, with determine after introducing full phase place preconditioning technique the reasonability of the performance boost that brought and hardware spending.The low-power consumption of this system, high integration and stability have reference significance to the further improvement of ofdm system, also have certain application prospect, have higher utility.
Claims (5)
1. full phase place ofdm system design based on FPGA, with the VHDL hardware description language in the realization of programming of Quartus II development platform, DE2 with ALTERA company is hardware platform, designed a kind of full phase place OFDM baseband transmission system based on FPGA, it comprises transmitting terminal and two parts of receiving terminal, its essential characteristic is: on the basis of fast Fourier transform, employing has the full phase signal preconditioning technique of " phase invariant " characteristics, select windowless full phase place preprocess method to realize full Phase Processing module, to be incorporated in this OFDM baseband transmission system based on the whole phase FFT processor that FPGA realizes, utilize the programming of VHDL hardware description language to realize each control module, designing top document at last couples together each module to constitute full phase place ofdm system, can enough realize processing and the transmission of baseband signal in the FPGA development platform.
2. a kind of full phase place ofdm system design based on FPGA according to claim 1, it is characterized in that: select windowless full phase place preprocess method to realize the full Phase Processing module of native system, and researched and analysed through the complete pretreated signal spectrum characteristic of phase data.
3. a kind of full phase place ofdm system design based on FPGA according to claim 1, it is characterized in that: according to the analysis to full phase place preconditioning technique, and in conjunction with fast Fourier transform, adopt the FPGA technology to realize an APFFT processor, it has the ability of good inhibition spectral leakage, even also can significantly reduce interference in the application system of intensive frequency spectrum and low signal-to-noise ratio.
4. a kind of full phase place ofdm system design based on FPGA according to claim 1, it is characterized in that: on the basis of grasping the ofdm system correlation technique, APFFT is incorporated in the ofdm system of realization, adopt the FPGA technology to realize a kind of OFDM baseband modulation and demodulation system, its key modules comprises FFT/IFFT, channel coding/decoding, interweave and deinterleaving, constellation mapping and separate mapping, convolutional encoding and viterbi coding etc.
5. a kind of full phase place ofdm system design based on FPGA according to claim 1, it is characterized in that: utilize flexibility and the reconfigurability of FPGA, in the treatment effeciency of having simulated the ofdm system after adopting full phase data preconditioning technique on the hardware well and expense situation.
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CN106324563A (en) * | 2016-08-12 | 2017-01-11 | 中国电子进出口总公司 | Multipoint passive detection all-phase signal sorting and arrival time difference measurement system |
CN106772265A (en) * | 2015-11-24 | 2017-05-31 | Trw有限公司 | Transceiver circuit |
CN112068799A (en) * | 2019-06-11 | 2020-12-11 | 云南大学 | Optimal signed binary system fast calculation method and elliptic curve scalar multiplication |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
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CN106772265A (en) * | 2015-11-24 | 2017-05-31 | Trw有限公司 | Transceiver circuit |
CN106772265B (en) * | 2015-11-24 | 2022-01-14 | Trw有限公司 | Transceiver circuit |
CN106324563A (en) * | 2016-08-12 | 2017-01-11 | 中国电子进出口总公司 | Multipoint passive detection all-phase signal sorting and arrival time difference measurement system |
CN106324563B (en) * | 2016-08-12 | 2019-04-02 | 中国电子进出口总公司 | A kind of multiple spot passive detection all phase signal sorting and reaching time-difference measuring system |
CN112068799A (en) * | 2019-06-11 | 2020-12-11 | 云南大学 | Optimal signed binary system fast calculation method and elliptic curve scalar multiplication |
CN112068799B (en) * | 2019-06-11 | 2022-08-02 | 云南大学 | Optimal signed binary system fast calculation method and elliptic curve scalar multiplication |
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