CN103281283A - Automatic gain control method based on encoding orthogonal frequency division multiplexing - Google Patents
Automatic gain control method based on encoding orthogonal frequency division multiplexing Download PDFInfo
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Abstract
The invention discloses an automatic gain control method based on encoding orthogonal frequency division multiplexing. The automatic gain control method comprises the following steps: the average power Pin of mimic input signals of a VGA interface is set to meet a formula requirement, the average power Pout of mimic output signals of the VGA interface meets the formula requirement, wherein N is the sample accumulation number, and the relational expression of the average power Pin of the mimic input signals and the average power Pout of the mimic output signals is that the average power Pout of the mimic output signals is adjusted by adjusting the gain g of the VGA interface. The adjustment comprises the steps of conducting analog-digital conversion on the average power Pout of the mimic output signals to gain digital signal, comparing the digital signals with ideal digital signals, calculating the adjustment value of the gain g of the VGA interface, conducting digital-to-analogue conversion on the adjustment value to obtain analog signals, and changing the gain g of the VGA interface according to the analog signals.
Description
Technical field
The invention belongs to data processing field, be specifically related to a kind of auto gain control method based on Coded Orthogonal Frequency Division Multiplexing (COFDM).
Background technology
Coded Orthogonal Frequency Division Multiplexing (COFDM) (Code Orthogonal Frequency Division Multiplexing, COFDM) be a kind of novel data processing technique, rely on its high availability of frequency spectrum, high transmission rate and strong anti-multipath interference performance, caused that at the wireless image transmission field people pay close attention to widely.
In the HD video wireless transmitting system, need be with high-quality, highly reliable image, sound, data messages such as literal are transferred to the recipient quickly and efficiently, and spuious Electromagnetic Interference often takes place in the actual transmissions process, various unfavorable factors such as space channel is abominable, make that the received signal power of receiving terminal is extremely low, this will greatly increase the follow-up signal processing pressure of receiving terminal, even cause in the subsequent processes useful signal as noise filtering, this just makes the strong and weak Amplifier Gain of adjusting automatically of the input signal that we must receive along with receiver, when strong and weak the variation appearred in input signal, output signal was constant substantially.
Along with GPRS, CDMA, 3G(TD-SCDMA, WCDMA, CDMA2000), the rise of cordless communication network such as OFDM, wireless video transmission system is with its maneuverability, visual pattern, advantage such as easy to operate, be widely used in every field such as army individual-soldier operation, public security remote monitoring evidence obtaining, TV programme relay, the monitoring of mine oilfield safety, the environmental monitoring of underground garage supermarket, cell environment monitoring, and become that people realize at a distance, a kind of important means of on-site supervision on a large scale.The COFDM technology is strong with its transmission rate height, antijamming capability, and this makes realizes that at " in the high-speed motion " and " non-looking under the poker spare " high-quality realtime graphic and transfer of data become possibility.
In recent years, the software radio development rapidly, all-digital receiver is the preferred option that realizes wireless communication designs under present device level and the method for designing, and AGC (Automatic Gain Control, be called for short AGC) be automatic gain control, be important and requisite part in the digitlization receiver.Agc circuit adopts the analogy method design usually at the beginning of development.Along with the development of digital processing technology and programming device, having obtained of digital AGC paid close attention to widely and used.AGC is the same with simulation, and its basic function of digital AGC also is the strong and weak Amplifier Gain of adjusting automatically of the input signal received along with receiver, makes when input signal is strong and weak to be changed, and output signal is constant substantially.In the wireless communication system, because influences such as different user communication distance distance is different, channel fading is different, it is very big to receive the signal fluctuation scope, under the XOR strong electromagnetic situation, received signal power is extremely low, need to adopt the AGC interface differential technique to collect mail and number carries out normalized to guarantee the precision of follow-up Digital Signal Processing.Therefore the realization of digital AGC has important practical usage.
Mainly contain input power computing module and agc algorithm module two big modules compositions in the agc circuit.The realization of agc circuit has three kinds of modes such as feedforward, feedback and mixing loop, and the feed-forward AGC convergence rate is faster than feedback AGC, but generally is not very stable.Mixing AGC can overcome the shortcoming of feed-forward AGC and feedback AGC, especially be adapted in the fast fading channel, but owing to be subjected to the influence of cost, volume, power consumption and complexity etc., it is not very wide using in practice, and reaction type AGC, systematic function is stable.
Summary of the invention
Can be subjected to factor affecting such as noise error, the performance number error of calculation and the amount of gain adjustment error of calculation at traditional analog agc circuit control precision, control precision is poor.Though the feed-forward AGC convergence rate is faster than feedback AGC, systematic function is not very stable.Though mix the shortcoming that AGC can overcome feed-forward AGC and feedback AGC, especially be adapted in the fast fading channel, owing to be subjected to the influence of cost, volume, power consumption and complexity etc., practical application is seldom used.The present invention adopts reaction type AGC algorithm, and a kind of auto gain control method based on Coded Orthogonal Frequency Division Multiplexing (COFDM) is provided.
The present invention is achieved in that a kind of auto gain control method based on Coded Orthogonal Frequency Division Multiplexing (COFDM), and it is applied to Video Graphics Array, and (this VGA interface satisfies formula u for Video Graphics Array, VGA) interface
i=g*x
i(1), wherein, x
iBe the analog input signal amplitude that this VGA interface receives, u
iBe the analog output signal amplitude of this VGA interface output, g is the gain of this VGA interface; This auto gain control method may further comprise the steps:
Set the analog input signal average power P of this VGA interface
InSatisfy formula
(2), the analog output signal average power P of this VGA interface
OutSatisfy formula
Wherein, N is the sample cumulative number, this analog input signal average power P
InWith this analog output signal average power P
OutRelational expression be
By adjusting the gain g of this VGA interface, adjust this analog output signal average power P
Out, wherein, this set-up procedure may further comprise the steps:
To this analog output signal average power P
OutCarry out analog-to-digital conversion and obtain digital signal;
This digital signal and ideal digital signal are compared, calculate the adjusted value of the gain g of this VGA interface;
This adjusted value is carried out digital-to-analogue conversion obtain analog signal;
Change the gain g of this VGA interface according to this analog signal.
Further improvement as such scheme, this set-up procedure is based on field programmable gate array (Field-Programmable Gate Array, FPGA) AGC digital control module is realized, this AGC digital control module comprises analog to digital converter, digital to analog converter, FPGA module and memory module, this analog to digital converter receives the analog output signal of this VGA interface and carries out analog-to-digital conversion and becomes digital signal to this FPGA module, this FPGA module is exported the adjusted value of this gain g to this digital to analog converter, carry out digital-to-analogue conversion by this digital to analog converter and become analog signal, this VGA interface changes corresponding gain g according to this analog signal.
Auto gain control method based on Coded Orthogonal Frequency Division Multiplexing (COFDM) of the present invention, it has very important significance for improving systematic function mainly around the technical problem that how to improve its system works speed and reduce resource occupation.The present invention is applicable to fields application such as multi-carrier wireless communication, portable mobile wireless video communication, hand-hold type transmission terminal, radar system and DVB-T communication.
Description of drawings
Fig. 1 is reaction type digital AGC brief block diagram.
Fig. 2 is based on the digital control part block diagram of the AGC of FPGA.
Fig. 3 is the FPGA implementation structure figure of digital AGC.
Fig. 4 is input power computing module FPGA implementation structure figure.
Fig. 5 is agc algorithm module FPGA implementation structure figure.
Fig. 6 is the digital AGC algorithm modelsim simulation result based on FPGA.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explaining the present invention, and be not used in restriction the present invention.
The realization of agc circuit has three kinds of feedforward, feedback and mixing loops etc., and the feed-forward AGC convergence rate is faster than feedback AGC, but generally is not very stable.Mixing AGC can overcome the shortcoming of feed-forward AGC and feedback AGC, especially be adapted in the fast fading channel, but owing to be subjected to the influence of cost, volume, power consumption and complexity etc., it is not very wide using in practice.So adopt reaction type AGC in the native system, as shown in Figure 1, the auto gain control method based on Coded Orthogonal Frequency Division Multiplexing (COFDM) of the present invention is applied to Video Graphics Array (Video Graphics Array, VGA) interface.
This VGA interface satisfies formula u
i=g*x
i(1), wherein, x
iBe the analog input signal amplitude that this VGA interface receives, u
iBe the analog output signal amplitude of this VGA interface output, g is the gain of this VGA interface.
Set the analog input signal average power P of this VGA interface
InSatisfy formula
(2), the analog output signal average power P of this VGA interface
OutSatisfy formula
Wherein, N is the sample cumulative number, this analog input signal average power P
InWith this analog output signal average power P
OutRelational expression be
By adjusting the gain g of this VGA interface, adjust this analog output signal average power P
Out
In the present invention during in specific implementation, adopt field programmable gate array (Field-Programmable Gate Array, FPGA) AGC digital control module is realized, as shown in Figure 2, using FPGA adopts software editing to become each function to realize module, be produced on the FPGA, finally reach the design effect that needs.
This AGC digital control module comprises analog to digital converter, digital to analog converter, FPGA module and memory module, this analog to digital converter receives the analog output signal of this VGA interface and carries out analog-to-digital conversion and becomes digital signal to this FPGA module, this FPGA module is exported the adjusted value of this gain g to this digital to analog converter, carry out digital-to-analogue conversion by this digital to analog converter and become analog signal, this VGA interface changes corresponding gain g according to this analog signal.
The principle of digital AGC is based on the power estimation that signal is removed noise effect, by comparing with default power interval, draws the gain controlled quentity controlled variable that system needs, and is constant relatively to guarantee amplitude output signal.
Analog output signal average power P
Out:
N is the sample cumulative number, for avoiding follow-up division circuit, generally selects 2 for use
kThe analog output signal average power P of this VGA interface
OutBeing the sample of AD9238 input, because the AD9238 sampling is the analog circuit output signal voltage, is the input signal that amplifies through VGA, and corresponding analog input signal amplitude is x
i, amplifier (referring to the VGA interface) gain is g, then the input signal average power can be expressed as:
Thereby (finger print is intended input signal amplitude x to the analog input signal sample value
i) (refer to the analog output signal amplitude u that this VGA interface is exported with the analog output signal sample value
i) the pass be: u
i=g*x
iCan draw analog input signal average power P
InWith analog output signal average power P
OutBetween the pass be:
Adopt Hardware Description Language VHDL to realizations of programming of above-mentioned AGC algorithm, and the realization result is carried out simulating, verifying.This programme is selected Xilinx Spartan6 series of X C6SL150T chip for use, demonstrate the digital control part block diagram based on the AGC of FPGA as shown in Figure 2, comprise a slice fpga chip, a slice high-speed AD 9238 chips, a slice analog-digital chip TLV5617 and a slice are used for depositing the PROM of FPGA configuration file.
The FPGA of digital AGC realizes mainly being divided into 2 functional modules: input power computing module and AGC control algolithm module, extremely shown in Figure 5 as Fig. 3, wherein, Fig. 3 is the FPGA implementation structure figure of digital AGC among Fig. 2, Fig. 4 is input power computing module FPGA implementation structure figure among Fig. 3, and Fig. 5 is agc algorithm module FPGA implementation structure figure among Fig. 3.
Because the analog signal of system is differential signal, differential signal is divided into I, Q two paths of signals, then the power of differential signal can be thought and equals I, Q two paths of signals power sum, two input power computing modules are used for calculating I, Q two paths of signals power respectively among Fig. 3, input summer then, thereby final output obtains the power of whole differential signal, again differential signal power is input to subsequent gain control algolithm module, the agc algorithm module obtains corresponding gain factor g according to agc algorithm.
Fig. 4 is the concrete FPGA implementation of input power computing module, be responsible for finishing square (self multiplies each other) to I road or Q road signal, add up, operation such as displacement, export the average power on I road or Q road at last, be used for being input to subsequent adders and produce final differential signal average power (because it is the same that the average power on I road or Q road is calculated process, therefore adopting same power computation module that it is calculated).
Fig. 5 is the concrete FPGA implementation of agc algorithm module, by receiving the differential signal average power, associative operations such as process compares, gain produces, selects, latchs are finished agc algorithm, obtain gain factor g, and send yield value to digital to analog converter TLV5617 by string and conversion, finally realize AGC operation.
This programme is realized simple, and speed is fast, has littler resource occupation, convergence rate faster.Being fit to very much engineering uses.Pass in effective range of linearity of the VGA that adopts herein is: Gain (dB)=-50VG+41, amplification (dwindling) gain that Gain (dB) produces for VGA, VG is the input voltage of VGA.The controllable gain scope that VGA can produce is-18.5dB～+ 25.5dB, corresponding input voltage range is 0.2V～1.2V, and the effective range of linearity of controllable gain that this VGA can produce is-14dB～+ 21dB, the input voltage range of correspondence is 0.4V～1.1V.
During native system is realized, added sel_gain port (bit wide is 3bit) be used for supporting the user select according to demand automatic gain or other * 1, * 2, * 4, * fixed gain patterns such as 8, the syn_gain_in port is used for importing outside gain lock-out pulse, the synchronization pulse that the sel_syn port is used for allowing the user select to produce gain derives from internal system generation or User Defined input automatically, be 0 o'clock, system with the input of pin syn_gain_in as the gain synchronization pulse; The pulse that to be 1 o'clock system produce automatically with inside is as the gain lock-out pulse.Greatly facilitating the user by such design uses.
According to above-mentioned algorithm principle, the FPGA that utilizes programmable logic device FPGA to make up hard-wired digital AGC realizes mainly being divided into 2 functional modules: input power computing module and AGC control algolithm module.The input power computing module is made of input buffer, counter, parallel multiplication MAC, outside gain lock-out pulse permission module etc., as shown in Figure 4; AGC control algolithm module then mainly is made up of power comparison module, control modular converter, selector, latch, gain feedback module, parallel serial conversion module etc., as shown in Figure 5.
By ISE13.4 the algorithm of realizing is carried out comprehensively, the resource occupation that we obtain the used algorithm FPGA realization of native system result only is 276slice LUTs, and maximum clock frequency can reach 288.763MHz.Utilize modelsim that the result who realizes is carried out simulating, verifying, as shown in Figure 6.
The test signal input data that this paper chooses are: Q road, I road " 000100101100 " " 000000000000 ", its energy belong to interval 4, and gain g is * 2; From simulation result figure as can be seen, when initial reset signal was ' 1 ', the fsx value that obtains was " 1100001000101111 ", and fsx high four " 1100 " is control bit, obtain g for " 001000101111 " namely * 1, after the initialization, system begins to calculate signal energy, and carries out automatic gain control, obtain new yield value again, this moment, fsx value be " 1100000111011101 ", obtained g at this moment and be " 000111011101 " namely * 2, and read-me result of calculation conforms to actual.
The above only is preferred embodiment of the present invention, not in order to limiting the present invention, all any modifications of doing within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (2)
1. auto gain control method based on Coded Orthogonal Frequency Division Multiplexing (COFDM), it is applied to Video Graphics Array, and (this VGA interface satisfies formula u for Video Graphics Array, VGA) interface
i=g*x
i(1), wherein, x
iBe the analog input signal amplitude that this VGA interface receives, u
iBe the analog output signal amplitude of this VGA interface output, g is the gain of this VGA interface; It is characterized in that: this auto gain control method may further comprise the steps:
Set the analog input signal average power P of this VGA interface
InSatisfy formula
(2), the analog output signal average power P of this VGA interface
OutSatisfy formula
Wherein, N is the sample cumulative number, this analog input signal average power P
InWith this analog output signal average power P
OutRelational expression be
By adjusting the gain g of this VGA interface, adjust this analog output signal average power P
Out, wherein, this set-up procedure may further comprise the steps:
To this analog output signal average power P
OutCarry out analog-to-digital conversion and obtain digital signal;
This digital signal and ideal digital signal are compared, calculate the adjusted value of the gain g of this VGA interface;
This adjusted value is carried out digital-to-analogue conversion obtain analog signal;
Change the gain g of this VGA interface according to this analog signal.
2. the auto gain control method based on Coded Orthogonal Frequency Division Multiplexing (COFDM) as claimed in claim 1, it is characterized in that: this set-up procedure is based on field programmable gate array (Field-Programmable Gate Array, FPGA) AGC digital control module is realized, this AGC digital control module comprises analog to digital converter, digital to analog converter, FPGA module and memory module, this analog to digital converter receives the analog output signal of this VGA interface and carries out analog-to-digital conversion and becomes digital signal to this FPGA module, this FPGA module is exported the adjusted value of this gain g to this digital to analog converter, carry out digital-to-analogue conversion by this digital to analog converter and become analog signal, this VGA interface changes corresponding gain g according to this analog signal.
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Cited By (3)
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| CN104184531A (en) * | 2014-09-02 | 2014-12-03 | 广州山锋测控技术有限公司 | Shortwave signal gain control method and system |
| CN105915240A (en) * | 2016-04-07 | 2016-08-31 | 成都华日通讯技术有限公司 | Digital terminal automatic gain control system and method based on Zynq |
| CN109286381A (en) * | 2018-09-12 | 2019-01-29 | 西安微电子技术研究所 | A kind of automatic gain control circuit and control method based on thermometer coding |
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| CN109286381B (en) * | 2018-09-12 | 2022-03-08 | 西安微电子技术研究所 | Automatic gain control circuit based on thermometer coding and control method |
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