CN103281137A - Differential quadrature phase shift keying (DQPSK) module delay interferometer control device and control method thereof - Google Patents
Differential quadrature phase shift keying (DQPSK) module delay interferometer control device and control method thereof Download PDFInfo
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Abstract
The invention discloses a differential quadrature phase shift keying (DQPSK) module delay interferometer control device and a control method thereof. The device comprises a delay interferometer, a balanced receiver, a C (common) regulator drive unit, a D (differential) regulator drive unit and a microcontroller. A fixed voltage is applied to voltage control pins of a D regulator by the microcontroller through the D regulator drive unit to ensure the phase difference between an inphase (I) channel and a quadrature (Q) channel to be phi/2; the I channel gain of the balanced receiver is set to be a suitable value to ensure that a follow-up circuit is capable of correctly identifying a high-speed electric signal output by the balanced receiver; and scanning signals changed according to a certain time interval and stepping interval are applied to the pin control pins of a C regulator by the microcontroller through the C regulator drive unit, and meanwhile, the I channel peak output voltage Ipeak of the balanced receiver is detected to find out a minimum value, and at the moment, the I channel phase of the delay interferometer is phi/4 or -phi/4. The delay interferometer control device disclosed by the invention is comparatively simple in peripheral control circuit. The control method of the delay interferometer control device is easy to implement and is stable and reliable.
Description
Technical field
The present invention relates to the optical communication technique field, refer to a kind of DQPSK module delay interferometer control device and control method thereof especially.
Background technology
DQPSK(Differential Quadrature Phase Shift Keying) is difference quadrature phase shift keying, utilizes the light phase difference of adjacent code element to come transmission information.4 phase differences are respectively (0, pi/2, π, 3 pi/2s), and the corresponding signal of telecommunication is encoded to (00,01,11,10).1 DQPSK symbol carries the information of 2bit, so, adopt the DQPSK coded system, under the situation that does not reduce power system capacity, the bandwidth ratio OOK(binary system amplitude-shift keying of required device) reduce a lot, and to chromatic dispersion and PMD(polarization mode dispersion) higher tolerance limit is arranged, be fit to very much fiber optic transmission system long haul.
The reception link of DQPSK module mainly comprises: delay interferometer, balanced reciver and demultiplexing unit.Wherein, delay interferometer is used for the DQPSK light modulating signal is demodulated to light intensity signal, delay interferometer inside is divided into two passages of I/Q, each passage is the DPSK(differential phase-shift keying (DPSK)) demodulator, the phase difference of I/Q two passages must be pi/2, and the I channel phases must be set to π/4 or-π/4, could be correct the DQPSK light modulating signal is converted to light intensity signal; Balanced reciver is used for I/Q two-way light intensity signal is changed into the two-way serial electric signal; Demultiplexing unit is used for the two-way serial electric signal is changed into 16 road SFI5 signals of telecommunication, links to each other with system single board by the 300pin interface.
Delay interferometer control method at present commonly used is: gather the peak output voltage of balanced reciver I/Q two passages, when this crest voltage hour, corresponding delay interferometer I/Q channel phases be π/4 or-π/4.But whether this method can't be distinguished the interchannel phase difference of I/Q is pi/2.International monopoly WO2012/055231 A1 provides a kind of control method of delay interferometer.As shown in Figure 1, this method applies pilot signal at I/Q two passages, and adopting pi/2 driver control I/Q two interchannel phase differences is pi/2; Adopt peak detector, obtain the output voltage peak signal of two balance optical receiver I/Q two passages; Adopt the DLI lockout controller, obtain the peak value detection of error signals according to the voltage peak signal, obtain delay interferometer bias point control voltage signal according to this error signal.When error detection signal is 0, namely obtain the voltage peak signal minimum.
But there is following shortcoming in said method: the one, do not spell out that to adopt the pi/2 driver how to obtain the I/Q phase difference be pi/2; The 2nd, peripheral control circuit complexity, delay interferometer I/Q two passages need apply pilot signal, and also need the pi/2 drive circuit.Balanced reciver I/Q two-way peak value output signal need be passed through filtering, amplify, error-detecting obtains the bias voltage of delay interferometer I/Q two passages behind the integration, this bias voltage and pilot signal are applied to the voltage control pin of delay interferometer by add circuit.
Summary of the invention
The object of the present invention is to provide a kind of DQPSK module delay interferometer control device and method, its peripheral control circuit is fairly simple, realize easily, and it is reliable and stable, its phase difference that makes delay interferometer I/Q two passages is pi/2, and the I channel phases be π/4 or-π/4, correct is demodulated to light intensity signal with the DQPSK light modulating signal, is beneficial to the follow-up opto-electronic conversion of carrying out.
To achieve these goals, the invention provides a kind of DQPSK module delay interferometer control device, comprising:
Delay interferometer: it is demodulated to light intensity signal with the DQPSK light modulating signal, it has a light input end mouth, its inside is divided into the I/Q passage, 4 optical output port I1, I2, Q1, Q2, it is built-in with public adjuster C and difference adjuster D, public adjuster C has a pair of voltage control pin: C+, GND, difference adjuster D has a pair of voltage control pin: D+, GND, public adjuster C and difference adjuster D share the GND pin, voltage control pin at difference adjuster D applies a fixed voltage, guarantees that the phase difference between the I/Q passage is pi/2;
Balanced reciver: the light intensity signal of its four optical output port I1, I2 with delay interferometer, Q1, Q2 output is demodulated to serial electric signal respectively;
Microcontroller, it controls I channel gain, monitoring balanced reciver I channel peak voltage, exports the control voltage of public adjuster C and difference adjuster D;
C adjuster driver element: it amplifies after-applied voltage control pin to public adjuster C with the microcontroller output voltage;
D adjuster driver element: it amplifies after-applied voltage control pin to difference adjuster D with the microcontroller output voltage.
Described C adjuster driver element comprises first sampling resistor, is used for gathering the drive current that enters into public adjuster C, and then converts this current signal to voltage signal; First differential amplifier circuit is for the voltage difference of amplifying the first sampling resistor two ends; The first differential integrating circuit carries out integration with the error signal of the first differential amplifier circuit output voltage and microcontroller output voltage; First change-over circuit converts the error signal of first differential integrating circuit output to the drive current of public adjuster C.
The resistance of described first sampling resistor is less than 10 ohm.
Described D adjuster driver element comprises second sampling resistor, is used for gathering the drive current that enters into difference adjuster D, and then converts this current signal to voltage signal; Second differential amplifier circuit is for the voltage difference of amplifying the second sampling resistor two ends; The second differential integrating circuit carries out integration with the error signal of the second differential amplifier circuit output voltage and microcontroller output voltage; Second change-over circuit converts the error signal of second differential integrating circuit output to the drive current of difference adjuster D.
The resistance of described second sampling resistor is less than 10 ohm.
A kind of DQPSK module delay interferometer control method, it comprises the steps:
(1) microcontroller applies a fixed voltage by D adjuster driver element at the voltage control pin of the difference adjuster D of delay interferometer, is pi/2 to guarantee the I/Q inter-channel phase difference
(2) balanced reciver I channel gain being set is desired value, guarantees that subsequent conditioning circuit can correctly identify the high-speed electrical signals of balanced reciver output;
(3) microcontroller applies the sweep signal that changes according to certain hour interval and stepped intervals by C adjuster driver element at the voltage control pin of the public adjuster C of delay interferometer;
(4) the voltage control pin at public adjuster C applies in the sweep signal process, detects balanced reciver I channel peak output voltage Ipeak, finds minimum value, when this voltage hour, delay interferometer I channel phases be π/4 or-π/4;
(5) if subsequent conditioning circuit exchanges by polarity inversion or I, Q passage, can not correctly recover signal, then increase the gain of balanced reciver I passage amplifying circuit, repeating step (3), (4).
After adopting such scheme, DQPSK module delay interferometer control device of the present invention is desired value by balanced reciver I channel gain is set, and guarantees that late-class circuit can correctly identify the high-speed electrical signals of balanced reciver output; Microcontroller applies a fixed voltage by D adjuster driver element at the voltage control pin of D adjuster, is pi/2 to guarantee the I/Q inter-channel phase difference; Microcontroller applies the sweep signal that changes according to certain hour interval and stepped intervals by C adjuster driver element at the voltage control pin of C adjuster, monitor balanced reciver I channel peak output voltage Ipeak simultaneously, find minimum value, delay interferometer C adjuster control voltage is set to the voltage of corresponding minimum peak, then delay interferometer I channel phases be π/4 or-π/4; If subsequent conditioning circuit exchanges by polarity inversion or I, Q passage, can not correctly recover signal, then increase the gain of balanced reciver I passage amplifying circuit, again the voltage control pin at the C adjuster applies sweep signal, and monitoring Ipeak, look for minimum value, and the control voltage of C adjuster is set to the voltage of corresponding minimum peak.Pass through said method, delay interferometer will be in preferable operating state, its peripheral control circuit is fairly simple, realize easily, and reliable and stable, its phase difference that makes delay interferometer I/Q two passages is pi/2, and the I channel phases be π/4 or-π/4, correct is demodulated to light intensity signal with the DQPSK light modulating signal, is beneficial to the follow-up opto-electronic conversion of carrying out.
Description of drawings
Fig. 1 is the electrical block diagram of existing delay interferometer control device;
Fig. 2 is the electrical block diagram of DQPSK module delay interferometer control device of the present invention;
Fig. 3 is the used C adjuster driver element electrical block diagram of the present invention;
Fig. 4 is the used D adjuster driver element electrical block diagram of the present invention;
Fig. 5 is the control method schematic flow sheet of DQPSK module delay interferometer control device of the present invention.
Embodiment
The invention will be further described below in conjunction with the drawings and specific embodiments, can be implemented so that those skilled in the art can better understand the present invention also, but illustrated embodiment is not as a limitation of the invention.
As shown in Figure 2, DQPSK module delay interferometer control device of the present invention comprises:
Balanced reciver 32, comprise amplifying circuit and peak detection circuit, wherein the amplifying circuit gain is adjustable, 4 input ports are arranged, respectively the connection delay interferometer 4 optical output ports, I1 wherein, the I passage that I2 enters balanced reciver 32 carries out opto-electronic conversion, I channel peak output voltage Ipeak is connected to microcontroller 35, carries out voltage monitoring; Q1, the Q passage that Q2 enters into balanced reciver 32 carries out opto-electronic conversion, and the gain of I passage amplifying circuit must be set to desired value, among this embodiment, making I passage difference output amplitude is 300mV, can correctly identify the high-speed electrical signals of balanced reciver 32 outputs to guarantee subsequent conditioning circuit;
C adjuster driver element 33 as shown in Figure 3, is used for microcontroller 35 output voltages are amplified the after-applied voltage control pin that arrives the C adjuster of delay interferometer 31.C adjuster driver element comprises: first sampling resistor 41, first differential amplifier circuit 42, first integral circuit 43 and first change-over circuit 44 form closed control circuit, and the voltage control pin voltage of C adjuster is 2 times of microcontroller output voltage in the present embodiment;
First sampling resistor 41, be used for gathering the drive current of the C adjuster that enters into delay interferometer 31, and then convert this current signal to voltage signal, so that follow-up first differential amplifier circuit 42 amplifies, the value of first sampling resistor 41 can not be too big, is generally less than 10 ohm;
First differential amplifier circuit 42, be used for amplifying the voltage difference at first sampling resistor, 41 two ends, note choosing of multiplication factor: if multiplication factor is excessive, then the maximum that can surpass the C adjuster is born voltage, if it is too small, then can't reach the maximum controlling voltage of C adjuster, the resistance product of the multiplication factor of first differential amplifier circuit 42 and first sampling resistor is 1/2nd of C adjuster internal resistance resistance in the present embodiment;
The first differential integrating circuit 43, the error signal of first differential amplifier circuit, 42 output voltages and microcontroller 35 output voltages is carried out integration, when first differential amplifier circuit, 42 output voltages equaled microcontroller 35 output voltages, integration stopped, and enters stable state;
First change-over circuit 44 converts the error signal of the first differential integrating circuit, 43 outputs the drive current of the C adjuster of delay interferometer 31 to, and error signal then increases drive current for just, and error signal then reduces drive current for bearing;
D adjuster driver element 34, as shown in Figure 4, be used for microcontroller 35 output voltages are amplified the after-applied voltage control pin that arrives the D adjuster of delay interferometer 31, D adjuster driver element 34 comprises: second sampling resistor 51, second differential amplifier circuit 52, the second differential integrating circuit 53 and second change-over circuit 54 form closed control circuit, and the voltage control pin voltage of D adjuster is 2 times of microcontroller 35 output voltages in the present embodiment.
Second sampling resistor 51, be used for gathering the drive current of the D adjuster that enters into delay interferometer 31, and then convert this current signal to voltage signal, convenient follow-up amplifying circuit amplifies, the value of second sampling resistor 51 can not be too big, is generally less than 10 ohm;
Second differential amplifier circuit 52, be used for amplifying the voltage difference at second sampling resistor, 51 two ends, note choosing of multiplication factor: if multiplication factor is excessive, then the maximum that can surpass the D adjuster is born voltage, if it is too small, then can't reach the maximum controlling voltage of D adjuster, the product of the multiplication factor of second differential amplifier circuit 52 and second sampling resistor, 51 resistances is 1/2nd of D adjuster internal resistance resistance in the present embodiment;
The second differential integrating circuit 53, the error signal of second differential amplifier circuit, 52 output voltages and microcontroller 35 output voltages is carried out integration, when second differential amplifier circuit, 52 output voltages equaled microcontroller 35 output voltages, integration stopped, and enters stable state;
Second change-over circuit 54 converts the error signal of the second differential integrating circuit, 53 outputs the drive current of the D adjuster of delay interferometer 31 to, and error signal then increases drive current for just, and error signal then reduces drive current for bearing;
As shown in Figure 5, be the control method schematic flow sheet of delay interferometer control device of the present invention, this control method comprises the steps:
Step 61:DQPSK module powers on normally, and delay interferometer 31 inputs have the input of DQPSK light signal;
Step 62: the I passage amplifying circuit gain of balanced reciver 32 is set, and making I passage difference output amplitude is 300mV, can correctly identify the high-speed electrical signals of balanced reciver 32 outputs to guarantee subsequent conditioning circuit;
Step 63: microcontroller 35 applies a fixed voltage by D adjuster driver element 34 at the voltage control pin of the D of delay interferometer 31 adjuster, guarantees that the I/Q inter-channel phase difference is pi/2;
Step 64: microcontroller 35 applies the sweep signal that changes according to certain hour interval and stepped intervals by C adjuster driver element 33 at the voltage control pin of the C of delay interferometer 31 adjuster, monitor and record the I channel peak voltage Ipeak of balanced reciver 32 simultaneously, find minimum value;
Step 65: scanning finish after, the voltage control pin voltage of C adjuster is set to the magnitude of voltage of corresponding I channel peak voltage minimum, at this moment, the I channel phases of delay interferometer 31 be π/4 or-π/4;
Step 66: if subsequent conditioning circuit exchanges by polarity inversion or I, Q passage, can not correctly recover signal, then increase the I passage amplifying circuit gain of balanced reciver 32, repeating step 64, step 65.
Pass through said method, delay interferometer will be in preferable operating state, its peripheral control circuit of delay interferometer control device of the present invention is fairly simple, realize easily, and reliable and stable, its phase difference that makes delay interferometer I/Q two passages is pi/2, and the I channel phases be π/4 or-π/4, correct is demodulated to light intensity signal with the DQPSK light modulating signal, is beneficial to the follow-up opto-electronic conversion of carrying out.
The above embodiment is the preferred embodiment that proves absolutely that the present invention lifts, and protection scope of the present invention is not limited thereto.Being equal to that those skilled in the art do on basis of the present invention substitutes or conversion, all within protection scope of the present invention.Protection scope of the present invention is as the criterion with claims.
Claims (6)
1. DQPSK module delay interferometer control device is characterized in that: comprising:
Delay interferometer: it is demodulated to light intensity signal with the DQPSK light modulating signal, it has a light input end mouth, its inside is divided into the I/Q passage, 4 optical output port I1, I2, Q1, Q2, it is built-in with public adjuster C and difference adjuster D, public adjuster C has a pair of voltage control pin: C+, GND, difference adjuster D has a pair of voltage control pin: D+, GND, public adjuster C and difference adjuster D share the GND pin, voltage control pin at difference adjuster D applies a fixed voltage, guarantees that the phase difference between the I/Q passage is pi/2;
Balanced reciver: the light intensity signal of its four optical output port I1, I2 with delay interferometer, Q1, Q2 output is demodulated to serial electric signal respectively;
Microcontroller, it controls I channel gain, monitoring balanced reciver I channel peak voltage, exports the control voltage of public adjuster C and difference adjuster D;
C adjuster driver element: it amplifies after-applied voltage control pin to public adjuster C with the microcontroller output voltage;
D adjuster driver element: it amplifies after-applied voltage control pin to difference adjuster D with the microcontroller output voltage.
2. DQPSK module delay interferometer control device according to claim 1, it is characterized in that: described C adjuster driver element comprises first sampling resistor, be used for gathering the drive current that enters into public adjuster C, and then convert this current signal to voltage signal; First differential amplifier circuit is for the voltage difference of amplifying the first sampling resistor two ends; The first differential integrating circuit carries out integration with the error signal of the first differential amplifier circuit output voltage and microcontroller output voltage; First change-over circuit converts the error signal of first differential integrating circuit output to the drive current of public adjuster C.
3. DQPSK module delay interferometer control device according to claim 2, it is characterized in that: the resistance of described first sampling resistor is less than 10 ohm.
4. DQPSK module delay interferometer control device according to claim 1, it is characterized in that: described D adjuster driver element comprises second sampling resistor, be used for gathering the drive current that enters into difference adjuster D, and then convert this current signal to voltage signal; Second differential amplifier circuit is for the voltage difference of amplifying the second sampling resistor two ends; The second differential integrating circuit carries out integration with the error signal of the second differential amplifier circuit output voltage and microcontroller output voltage; Second change-over circuit converts the error signal of second differential integrating circuit output to the drive current of difference adjuster D.
5. DQPSK module delay interferometer control device according to claim 4, it is characterized in that: the resistance of described second sampling resistor is less than 10 ohm.
6. a DQPSK module delay interferometer control method is characterized in that: comprise the steps:
(1) microcontroller applies a fixed voltage by D adjuster driver element at the voltage control pin of the difference adjuster D of delay interferometer, is pi/2 to guarantee the I/Q inter-channel phase difference
(2) balanced reciver I channel gain being set is desired value, guarantees that subsequent conditioning circuit can correctly identify the high-speed electrical signals of balanced reciver output;
(3) microcontroller applies the sweep signal that changes according to certain hour interval and stepped intervals by C adjuster driver element at the voltage control pin of the public adjuster C of delay interferometer;
(4) the voltage control pin at public adjuster C applies in the sweep signal process, detects balanced reciver I channel peak output voltage Ipeak, finds minimum value, when this voltage hour, delay interferometer I channel phases be π/4 or-π/4;
(5) if subsequent conditioning circuit exchanges by polarity inversion or I, Q passage, can not correctly recover signal, then increase the gain of balanced reciver I passage amplifying circuit, repeating step (3), (4).
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