CN103219733B - The method of utilizing distributing generating reactive power compensator to carry out harmonic wave inhibition - Google Patents

Abstract

The invention belongs to automatic control technology of power system field, particularly a kind of distributing wind-powered electricity generation reactive power compensator and method that has harmonic restraining function. The present invention includes A-T mixing reactive-load compensation unit, central control unit and power module. A-T mixing reactive-load compensation unit comprises thyristor-controlled reactor group (TCR), Active Power Filter-APF (APF) and passive filter group. Compensation access point between thyristor-controlled reactor group access passive filter group and electrical network backbone, Active Power Filter-APF and passive filter group hybrid active filter in series, central control unit output pulse width modulation signal and start pulse signal trigger respectively the IGCT in APF transistor and thyristor-controlled reactor group. The present invention effectively suppresses passive filter and electrical network generation resonance, makes harmonic compensation precision higher, and system responses is faster, has improved the security of reactive-load compensation, economical and practical.

Description

The method of utilizing distributing generating reactive power compensator to carry out harmonic wave inhibition

Technical field

The invention belongs to automatic control technology of power system field, particularly a kind of distributing that has harmonic restraining functionWind-powered electricity generation reactive power compensator and method.

Background technology

At present, the generation mode of China has very large destruction to environment, and adopts distributing generating, makes full use of various places richRich " clean energy resource ", will be one to China's sustainable development and promote greatly.

Distributing generating itself can produce a large amount of gaining merit with idle, changes if can reasonably apply these energyThe kind quality of power supply, will save great deal of investment. But distributing generating, the particularly wind-power electricity generation of comparative maturity and solar energyGenerating, its energy source has randomness and instantaneity, can not produce stable meritorious and reactive power, and this is equivalent in systemAccessed a large-scale random load, the startup of large-scale distributing generator unit with stop repairing also producing larger meritorious and idleFluctuation; These all can exert far reaching influence to the stable of power system.

Overcome the above problems the most effective measure, carry out nothing at distributing generator unit and electrical network access point place exactlyMerit compensation, ensures that the idle of access point is stabilized in certain scope, to reduce the reactive power impact that electrical network is caused, thereby fullyThe advantage of performance decentralized power supply self, improves the quality of power supply of power system.

At present, distributing Reactive Compensation in Wind Farm mode mainly adopts SVC (SVC) and fixed capacitorThe mode of associating, but passive filter in SVC exist filtering characteristic be subject to electrical network reactance influence and easily and electrical network reactance occurThe inherent shortcoming of parallel resonance, this can make line voltage produce wave distortion, and voltage pulsation and flickering etc., can generate electricity to distributingSystem produces great negative effect.

Summary of the invention

For having passive filter and electrical network generation resonance in distributed generation reactive-load compensation, produce asking of harmonic waveTopic, the invention provides a kind of distributing generating reactive power compensator and control method that has harmonic restraining function, passes through distributingThe harmonic wave that the reactive power that generating reactive power compensator sends produces system suppresses.

The present invention is achieved by the following technical solutions:

A distributing generating reactive power compensator that has harmonic restraining function, comprising: A-T mixing reactive-load compensation unit,Central control unit and power module. A-T mixing reactive-load compensation unit comprises thyristor-controlled reactor group (TCR), active electricityForce filter (APF) and passive filter group. Thyristor-controlled reactor group access passive filter group and electrical network backbone itBetween compensation access point, Active Power Filter-APF and passive filter group hybrid active filter in series, centralized Control listUnit's output pulse width modulation signal and start pulse signal trigger respectively the brilliant lock in APF transistor and thyristor-controlled reactor groupPipe.

Described thyristor-controlled reactor group is made up of three groups of thyristor-controlled reactor parallel connections, every group of thyristor controlReactor is by being composed in series with a reactor after two IGCT parallel connections; Described passive filter group comprises three groups of LC alsoConnection branch road, three independent LC series arms of each route compose in parallel; Described A-T mixing reactive-load compensation unit concreteConnection is: the compensation access point between thyristor-controlled reactor group access passive filter group and electrical network backbone, active filterThe output of ripple device is the input of reactance access passive filter group after filtering, and the output of passive filter group connects electricityNet, thus electrical network is carried out to harmonic wave inhibition.

Described central control unit comprises sampling module, DSP control module, phase-locked loop circuit module, pulse generation mouldPiece, information feedback and display module; The concrete connection of central control unit is: the voltage and current signal access gathering from electrical networkThe input of sampling module, the output of sampling module connects the input of DSP control module, the output of DSP control moduleConnect the input of phase-locked loop circuit module, the output of phase-locked loop circuit module connects the input of pulse generating module, arteries and veinsThere is the output connection thyristor-controlled reactor group of module and the input of Active Power Filter-APF, thyristor control electricity in punchingThe output of anti-device group and Active Power Filter-APF is connected the input of feedback module, and the output of feedback module connects and shows mouldThe input of piece, the output of display module is connected to DSP control module input by dual port RAM communication module again.

Described sampling module comprises accurate series voltage transformer TR1102-1C, current transformer TR0102-2C and DSPSampling module, DSP sampling module comprises signal conditioning circuit and zero cross detection circuit. The height of voltage transformer summation current transformerPress bond electrical network, low-pressure end connects the input of DSP sampling module, and the output of signal conditioning circuit connects zero passage detection electricityThe input on road, the output of zero cross detection circuit is as the output access DSP control module of sampling module; DSP controls mouldPiece is mainly made up of TMS320F2812 series DSP, and the output of DSP control module is connected to the input of pulse generating module.The concrete connection of described sampling module is: the high-pressure side of primary voltage current transformer connects electrical network, low-pressure side connecting secondary electricityThe input of voltage current transformer, the input of the output access A/D conversion chip of secondary voltage current transformer, A/D turnsThe input that changes the output access DSP sampling plate of chip, the output of DSP sampling plate is connected to latch, DSP sampling simultaneouslyPlate is by dual port RAM and single-chip microcomputer 80C196 swap data.

Described phase-locked loop circuit module comprises zero cross detection circuit, phase-locked loop circuit, frequency multiplier circuit, low pass filter and pressureControlled oscillator; The output of zero cross detection circuit connects the input of phase-locked loop circuit, and the output of phase-locked loop circuit connects doublyThe input of frequency circuit, frequency multiplier circuit produces sampling burst pulse and triggers sampling hold circuit, realizes Phase-Locked Synchronous sampling. Phaselocked loopThe concrete connection of circuit module is: the input of voltage and current signal access zero cross detection circuit, the output of zero cross detection circuitEnd connects the input of phase comparator, and the output of phase comparator connects the input of low pass filter, low pass filterOutput connect the input of voltage controlled oscillator, the output of voltage controlled oscillator connects shaping circuit, and input signal is carried outShape correction.

Described pulse generating module comprises synchronous voltage signal amplitude limiter circuit, synchronous shaping, pulse generation circuit; InstituteState pulse generation circuit and comprise that pulse opens lockout circuit, stretch circuit, photoelectric switching circuit. Synchronous voltage signal amplitude limitCircuit front-end connects DSP control module, and output connects the input of synchronous shaping, and the output of synchronous shaping connectsConnect the input of pulse generation circuit, the pulse control thyristor-controlled reactor group of output and the signal of Active Power Filter-APFTrigger. The concrete connection of pulse generating module is: the output connection synchronous shaping of synchronous voltage signal amplitude limiter circuitInput, the output of synchronous shaping connects the input of 12 bit synchronization counters, the output of 12 bit synchronization countersConnect the input of 12 bit comparators, the output of 12 bit comparators connects pulse and opens lockout circuit input, and pulse is open-mindedLockout circuit output connects stretch circuit input, and stretch circuit output connects photoelectric switching circuit inputEnd, photoelectric switching circuit output control IGCT.

Described information feedback and display module comprise high potential plate, return plate and information display module, information display moduleMainly comprise 80C196 single-chip microcomputer, LCD MODULE, external master control human-machine interface module is external connection keyboard input and host computer.The concrete connection of information feedback and display module is: the output of thyristor-controlled reactor group and Active Power Filter-APF is connectedThe input of high potential plate, the output of high potential plate connects the input of return plate, and the output of return plate connects 80C196Single-chip microcomputer, the output of single-chip microcomputer connects respectively liquid-crystal display section and host computer monitors module, and keyboard access partial information showsModule is by intercoming mutually between dual port RAM and DSP sampling module.

A control method that has the distributing generating reactive power compensator of harmonic restraining function to carry out harmonic wave inhibition is concreteCarry out as follows:

Step 1: sampling module gathers the three-phase voltage instantaneous value u of distributed generation_a，u_b，u_c, three-phase current is instantaneousValue i_a，i_b，i_c；

Step 2: the calculating at thyristor control angle: first adopt Phase Lock Technique to carry out the detection of the three-phase alternating current signal of telecommunication, bagDraw together voltage, electric current and frequency; Then carry out IGCT control according to the Mathematical Modeling of three-phase compensation susceptance and electric current and voltage sampled valueThe computing at angle processed, then export thyristor control angle, after in feedback part, photoelectric switching circuit is realized IGCT triggering signalOutput and the reception of state reporting signal;

Step 3: generate trigger impulse: first system voltage carries out zero passage detection, accumulator is set to rising edge and resets,The voltage rising edge pulse of zero passage detection can be that accumulator resets like this, is added to when rising next time and forms oneSawtooth waveforms, the IGCT trigger angle that DSP is calculated therewith sawtooth waveforms compares, when the trigger angle of IGCT largeIn the time of the accumulated value of accumulator, trigger a rising edge pulse until accumulator resets, so just obtain a wide cut pulse; ByWide in the pulse obtaining, so adopt in the same way, obtained wideband pulse and secondary accumulator are compared, canTo obtain a narrow pulse signal that is enough to trigger IGCT;

Step 4: control reactive-load compensator IGCT and the transistorized break-make of Active Power Filter-APF, distributing is generated electricitySystem carries out reactive-load compensation and harmonic wave suppresses.

Described passive filter group is made up of three groups of LC parallel branches, the LC branch circuit parallel connection of three groups of series connection of each routeComposition, every group of branch road filter capacitor of connecting again, is arranged on the output contact place of active filter, can reduce like this nodeHarmonic voltage, can suppress in harmonic current injection power system, more can play as whole system provides enough to cross and hold compensationEffect.

The detection of described three-phase alternating current, specifically carry out as follows:

Step 1: first make line voltage be:

U in formula_a，u_b，u_cFor three-phase voltage instantaneous value, E_1nRepresent positive sequence voltage virtual value, E_2nRepresent that negative sequence voltage is effectiveValue, ω is angular frequency, θ_2nFor negative phase-sequence initial phase angle;

Step 2: three-phase voltage in above formula is carried out to abc three-phase and can obtain as follows to the transformation of coordinates of alpha-beta two-phase:

u_αAnd u_βFor two phase voltage value corresponding under alpha-beta coordinate, c₃₂For the transition matrix from abc three-phase to alpha-beta two-phase;

Step 3: by above formula and matrix c_scObtain following matrix:

In above formula:

Sin (ω t+ θ) and cos (ω t+ θ) are the signals being produced by standard sine power frequency component generator, θ be any at the beginning ofPhase angle;

Step 4: extract DC component from above formula, can obtain following:

The voltage after conversion is:

E_s,E_cFor the DC component of extracting, c_sc ^-1For the inverse matrix of transition matrix, u_sf，u_cfFor two phase voltages after conversionValue;

Step 5: by phase voltage u after conversion_sf，u_cfAnd current i_α，i_βCalculate p, q component, computing formula is as follows:

Step 6: calculate and detect electric current: p component obtains corresponding AC compounent after neutral net filtering algorithm, and q dividesAmount is born accordingly DC component after anti-phase algorithm process, then detects electric current through being converted to alpha-beta two-phase, specifically publicFormula is as follows:

For AC compounent corresponding to p component, by i_αAnd i_βCan obtain instantaneous reactive detection electric current through transition matrixi_a，i_b，i_c, concrete formula is as follows:

Step 7: according to the Trigger Angle α of detected Current calculation IGCT;

When IGCT normally moves, in system, fundamental current is:

The subscript 1 of fundamental current I represents first harmonic, is first-harmonic; X_LReactance, X_L＝ωL；U_mIt is voltage peak; ByThis can be regarded as to obtain trigger angle.

The global optimization algorithm flow of described passive filter group is as follows:

Step 1: systematic parameter is set, and mainly comprises System Reactive Power compensation rate, the magnitude of voltage of passive filter group and harmonic waveLimit value etc.; System Reactive Power compensation rate is Q_SVC＝Q₁+Q₂+…+Q_h, the voltage and current of system harmonics is restricted to I_h＜I_H,U_h＜U_H，I_HAnd U_HFor electric current and the voltage KB limit of system harmonics; Q₁、Q₂、Q_hFor the reactive power of each branch road output; I_hFor beingSystem harmonic current, U_hFor system harmonics voltage;

Step 2: determine the total value Q of the reactive-load compensation amount that actual passive filter group can provide, by individual harmonic currentAccount for the ratio of total harmonic current, distribute the reactive-load compensation amount Q of the each branch road of passive filter group_i；

Step 3: press electric current and voltage percent harmonic distortion and passive filter group parallel resonance frequency condition, revise idle amountDistribution;

The total percent harmonic distortion of power system isThe inside and outside resonant frequency of bank of filters is constrained toU in formula₁For fundamental voltage hasEffect value; H is overtone order, and H is bank of filters number, δ_emnFor negative maximum equivalent frequency departure, δ_empFor just maximum equivalent frequency is inclined to one sidePoor;

Step 4: the parameter value of the each branch filter of cycle calculations, judges whether wave filter meets electric current and voltage harmonic wave abnormalThe inside and outside parallel resonance frequency condition of variability and passive filter group, if satisfied condition, judges the nothing of passive filter group againWhether merit output meets the reactive-load compensation amount of actual distributing generating reactive power compensator, just again repaiies if do not satisfied condition againPositive harmonic constant, returns and revises idle amount allocation step, the more idle output of passive filter group meets actual distributing generatingAfter the reactive-load compensation amount of reactive power compensator, just can move that passive filter group is carried out idle output and harmonic wave has suppressed.

Advantage of the present invention and beneficial effect are:

The present invention, on thyristor-controlled reactor group (TCR type) basis, has increased active filter and passive filterGroup, has proposed a kind of mixed compensation device that can carry out reactive-load compensation and suppress harmonic wave, the New Topological knot that the present invention adoptsStructure has replaced traditional passive filter part, and combines with TCR dynamic reactive regulating power, can effectively suppress passive filteringDevice and electrical network generation resonance, make harmonic compensation precision higher, and system responses is faster, has improved the security of reactive-load compensation.

1, thyristor-controlled reactor group of the present invention and active filter adopt centralized compensation, jointly suppress harmonic wave, pointLoose working method, thyristor-controlled reactor group and active filter are all by control module, via passive filter groupWith control reactor access electrical network, jointly carry out reactive-load compensation and harmonic wave and suppress, form again two cover work systems simultaneously, idleCompensator and active filter can separately be worked again, have avoided like this two compensation arrangements to go wrong inoperable simultaneouslySituation, has ensured the reliability of working.

2, control module of the present invention adopts a set of control module, and a set of control module is controlled respectively by two control pathsThyristor control Reactor banks IGCT processed and active filter transistor, so both reduced unnecessary control device accessElectrical network, makes again control section simple, economical and practical.

3, in the present invention, the Active Power Filter-APF in A-T mixing reactive-load compensation unit is controlled as harmonic voltage source, energyEffectively improve the filtering characteristic of passive filter, and suppress the parallel resonance of passive filter and the generation of system inductance, make idleRegulating power is stronger, the shortcoming that while having overcome underloading, reactive power is easily sent.

4, the detection method of three-phase alternating current of the present invention adopts improved p-q detection algorithm, is calculating AC compounent and straightWhen flow point amount, adopt neural network algorithm, so just made the value of power frequency component generator initial phase angle θ not affect finally to electricityThe accuracy of net positive sequence voltage phase-detection, and eliminated the error occurring when asymmetric under line voltage.

5, the design of passive filter group parameter of the present invention, has considered that the optimization of the reactive-load compensation amount of overall bank of filters dividesJoin, simplify for the constraints of some higher-dimension complexity as far as possible, while avoiding each filter branches to carry out parameter optimization, relate to oneA little nonlinear algorithms.

6, in the present invention, passive filter group is arranged on the node of nonlinear-load, like this in distributed generationCan reduce the harmonic voltage of node, can suppress in harmonic current injection power system, more can play foot to whole system is providedReached the effect of holding compensation.

Brief description of the drawings

Fig. 1 is apparatus of the present invention general structure block diagram;

Fig. 2 is A-T mixing reactive-load compensation cellular construction figure in the present invention;

Fig. 3 is central control unit structure chart in the present invention;

Fig. 4 is signal conditioning circuit schematic diagram of the present invention;

Fig. 5 is DSP master control borad structured flowchart in the present invention;

Fig. 6 is phase lock circuitry structure chart in the present invention;

Fig. 7 is phase-locking frequency multiplication circuit wiring diagram in the present invention;

Fig. 8 is that in the present invention, trigger impulse forms structure chart;

Fig. 9 is that in the present invention, synchronizing signal forms circuit diagram;

Figure 10 is trigger impulse generative circuit figure in the present invention;

Figure 11 is stretch circuit figure in the present invention;

Figure 12 is power module schematic diagram in the present invention;

Figure 13 is CY7C133 connection layout in the present invention;

Figure 14 shows single-chip microcomputer and host computer catenation principle figure in the present invention;

Figure 15 is matrix keyboard schematic diagram in the present invention;

Figure 16 is LCD MODULE figure in the present invention;

Figure 17 is median filter group global optimization algorithm flow chart of the present invention.

Below in conjunction with the drawings and specific embodiments, the present invention will be further described in detail, but be not subject to embodiment instituteLimit.

Detailed description of the invention

The present invention is a kind of distributing generating reactive power compensator and method that has harmonic restraining function, apparatus of the present inventionDetailed structure and operation principle are illustrated in conjunction with the embodiments, embodiment taking laboratory 110V static reactive power compensation experiment porch asExample, experiment porch static passive compensation device SVC is TCR+FC type, except static reactive power and three-phase imbalance are compensatedOutside, the harmonic wave that can also produce distributing wind power system suppresses.

The distributing generating reactive power compensator with harmonic restraining function of the present invention mainly comprises: A-T mixes idleCompensating unit and central control unit two large divisions, A-T mixing reactive-load compensation unit comprises thyristor-controlled reactor group(TCR), Active Power Filter-APF (APF) and passive filter group. Thyristor-controlled reactor group access passive filter group andCompensation access point between electrical network backbone, Active Power Filter-APF and passive filter group mixing active power filtering in seriesDevice, central control unit output pulse width modulation signal and start pulse signal trigger respectively APF transistor and thyristor control electricityIGCT in anti-device group. The concrete connection of described A-T mixing reactive-load compensation unit is: the access of thyristor-controlled reactor groupCompensation access point between passive filter group and electrical network backbone, the output of Active Power Filter-APF after filtering reactance connectsEnter the input of passive filter group, the output of passive filter group connects electrical network, thereby electrical network is carried out to harmonic wave inhibition; InstituteThe thyristor-controlled reactor group of stating is made up of three groups of thyristor-controlled reactor parallel connections, and every group of thyristor-controlled reactor is by twoAfter individual IGCT parallel connection, be composed in series with a reactor; Described passive filter group comprises three groups of LC parallel branches, everyThree independent LC series arms of individual route compose in parallel. Distributing generates electricity reactive power compensator general structure as shown in Figure 1,A-T mixing reactive-load compensation cellular construction as shown in Figure 2.

As shown in Figure 3, Fig. 3 is the overall construction drawing of central control unit in the present invention. Central control unit comprises samplingModule, DSP control module, phase-locked loop circuit module, pulse generating module, information feedback and display module. Central control unitConcrete connection be: the input of the voltage and current signal access sampling module gathering from electrical network, the output of sampling moduleConnect the input of DSP control module, the output of DSP control module connects the input of phase-locked loop circuit module, phaselocked loopThe output of circuit module connects the input of pulse generating module, and the output of pulse generating module connects thyristor control electricityThe input of anti-device group and Active Power Filter-APF, the output of thyristor-controlled reactor group and Active Power Filter-APF is connectedThe input of feedback module, the output of feedback module connects the input of display module, and the output of display module passes through againDual port RAM communication module is connected to DSP control module input.

In the present embodiment, transformer adopts accurate voltage converter TR1102-1C, precision current converter TR1102-2C.Meeting under the prerequisite of sampling precision and real-time, for making full use of resources of chip, native system adopts and is integrated in 16 of DSP insideRoad A/D converter, the voltage range that it can be changed is 0-3V, and through the voltage signal of transformer output is-5V-+5V. ExchangeSignal conditioning circuit is made up of three grades of high performance operational amplifier TL048, and this circuit can be by the sine of ambipolar-5V-+5VVoltage signal changes the unipolarity ac voltage signal in 0-3V into, and signal conditioning circuit as shown in Figure 4. Voltage transformer and electricityCurrent transformer connects the input interface chip of sampling module, the voltage and current output terminals A CVA of sampling module, ACVB, ACVC,ACCA, ACCB, ACCC connect the ADC input pin 2,3,4,174,173 and 172 of dsp chip.

Sampling module described in the present invention comprises accurate series voltage transformer, current transformer and DSP sampling module,DSP sampling module comprises signal conditioning circuit and zero cross detection circuit; The high-pressure side access of voltage transformer summation current transformerElectrical network, low-pressure side connects the input of DSP sampling module, and the output of signal conditioning circuit connects the input of zero cross detection circuitEnd, the output of zero cross detection circuit is connected into DSP control module as the output of sampling module; DSP control module mainly byTMS320F2812 series DSP composition, the output of DSP control module connects the input of phase-locked loop circuit module, phaselocked loop electricityThe output of road module connects the input of pulse generating module. The concrete connection of described sampling module is: primary voltage electric currentThe high-pressure side of transformer connects electrical network, the input of low-pressure side connecting secondary voltage current transformer, secondary voltage Current Mutual InductanceThe input of the output access A/D conversion chip of device, the input of the output access DSP sampling plate of A/D conversion chip,The output of DSP sampling plate is connected to latch, and DSP sampling plate is by dual port RAM and single-chip microcomputer 80C196 swap data simultaneously.

The function of sampling module is: the three-phase voltage of Real-time Collection electrical network and electric current, carry out modulus to gathered dataConversion, the trigger angle of calculating IGCT, carries out institute in real time to result and deposits.

DSP control module adopts TMS320F2812 series DSP controller, and this series processors has been concentrated multiple peripheral hardware, adoptsWith high performance static CMOS technology, fast operation, working clock frequency reaches 150MH, and is high-performance 32-bit CPU,Adopt Harvard structure, there is the disposal ability of middle-end response fast. The present invention is using DSPTMS320F2812 as main control chip, itJointly formed computing master control borad with peripheral cell, its structured flowchart as shown in Figure 5.

Phase-locked loop circuit module described in the present invention comprises zero cross detection circuit, phase-locked loop circuit and frequency multiplier circuit, lowBandpass filter and voltage controlled oscillator. Zero cross detection circuit be mainly the output of amplifier be one in the input signal zero crossing moment withThe square wave of step, has realized zero passage detection, has also realized synchronously, provides signal exactly in addition to phase-locking frequency multiplication circuit. It connects passSystem is: the output of zero cross detection circuit connects the input of phase-locked loop circuit, and the output of phase-locked loop circuit connects frequency multiplication electricityThe input on road, frequency multiplier circuit produces sampling burst pulse and triggers sampling hold circuit, realizes Phase-Locked Synchronous sampling.

The concrete connection of described phase-locked loop circuit module is: the input of voltage and current signal access zero cross detection circuit,The output of zero cross detection circuit connects the input of phase comparator, the output connection low pass filter of phase comparatorInput, the output of low pass filter connects the input of voltage controlled oscillator, and the output of voltage controlled oscillator connects shaping electricityRoad, carries out Shape correction to input signal.

The function of phase-locked loop circuit module is: produce one and the next direct control signal of the strict synchronous signal of sampled signalSampling and conversion, ensure that the ratio of sample frequency and signal fundamental frequency is fixed value, realize sampling frequency and signal first-harmonicThe accurate tracking of frequency.

As shown in Figure 6, input signal becomes periodic square wave through zero cross detection circuit to complete phase lock circuitry structureSignal, then pass through phase bit comparison, after the important steps such as LPF, produce sampling burst pulse, realize Phase-Locked Synchronous sampling, defeatedWhat go out is the pulse signal of strictly synchronizeing with input of 64 frequencys multiplication, and this signal, as the outer triggering signal that triggers A/D conversion, is lockedPhase frequency multiplier circuit structure adopts CMOS integrated phase lock chip CD4046 and frequency divider CD4040 to coordinate to realize 128 times accurately doublyObject frequently, as shown in Figure 7, input square-wave signal PLLA becomes square-wave signal PLLB to its connecting circuit after process of frequency multiplication, usesIn triggering AD sampling. VCO input 9 pins of 74VHC4046MTC chip connect No. 13 pins of self, and the VCO of this chip is defeatedGo out No. 10 pins that No. 4 pins of end connect CD4040BCSJ chip, No. 2 pins of CD4040BCSJ chip connectNo. 3 pins of 74VHC4046MTC chip.

The forming process of trigger impulse is mainly the associated voltage detecting and the current signal of sending here according to DSP, outputPulsewidth modulation (PWM) signal and start pulse signal, be respectively used to drive the insulated gate bipolar in Active Power Filter-APFIGCT (SCR) in transistor (IGBT) and TCR. As shown in Figure 8, the 100V being sent here by sampling module exchanges its theory diagramVoltage signal is through input saturation, and after homophase shaping, becoming 50Hz dutycycle is 50% synchronous square-wave signal CLR+, through synchronously controlMake 12 bit synchronization rolling counters forwards, the delay angle 12 bit values that counter output valve and DSP are sent are carried outRelatively. In the time that two values equate, export a pulse TP+, TP+ opens and blocks control circuit, stretch circuit through extra pulseAfter, form thyristor triggering impulse J+, then convert signal of telecommunication triggering IGCT and the transistor of pulse to. Ac voltage signal is anti-After phase shaping, trigger theory is the same.

Pulse generating module described in the present invention comprises synchronous voltage signal amplitude limiter circuit, synchronous shaping, pulseGenerative circuit; Described pulse generation circuit comprises that pulse opens lockout circuit, stretch circuit and photoelectric switching circuit; SynchronouslyVoltage signal amplitude limiter circuit front end connects DSP control module, and output connects the input of synchronous shaping, synchronous shaping electricityThe output on road connects the input of pulse generation circuit, pulse control thyristor-controlled reactor group and the active electric power of outputThe signal of wave filter triggers.

The concrete connection of pulse generating module is: the output of synchronous voltage signal amplitude limiter circuit connects synchronous shapingInput, the output of synchronous shaping connects the input of 12 bit synchronization counters, the output of 12 bit synchronization countersEnd connects the input of 12 bit comparators, and the output of 12 bit comparators connects pulse and opens lockout circuit input, and pulse is openedLogical lockout circuit output connects stretch circuit input, and stretch circuit output connects photoelectric switching circuit inputEnd, photoelectric switching circuit output control IGCT.

The function of pulse generating module is: offer that one of IGCT gate leve has enough large amplitude and certain forward position is steepThe start pulse signal of degree, ensures that thyristor valve group can safe and reliable work.

In the present embodiment, pulse generating module mainly comprise synchronizing signal form circuit, trigger impulse generative circuit andTrigger impulse widening circuit. The effect that synchronizing signal forms circuit is to ensure that IGCT and transistor can be touched accuratelySend out, the pilot angle of the IGCT calculating in control is taking line voltage zero-cross and voltage change ratio as the positive moment is as calculatingZero point, taking line voltage zero-cross and voltage change ratio as the negative moment is as 180 ° of points. According to the method, thyristor triggering impulse formsSynchronizing signal in circuit forms circuit, and as shown in Figure 9, voltage signal is through after conversion process, through LM311P for circuit theoryVoltage comparator forms the square-wave signal square+ of synchronizeing with line voltage, after the shaping of two-stage not gate, counts as 12 bit synchronizationsThe reset signal CLR+ of device. Job order is: zero clearing counter in the time that CLR+ is low level, and when CLR+ is high level hour counterStart counting, thereby make counter and line voltage synchronous counting. The clock of coincidence counter is 1000000Hz. Like this, counterBe 10000 in every half period (10ms) inside counting maximum. Clearly, the output numerical value of counter and time synchronized increase.

In trigger impulse generative circuit, when the output valve of 12 bit synchronization counters and the thyristor control angle of DSP outputBinary numeral equate time, export a burst pulse TP+ by 12 bit digital comparison circuits. TP+ passages through which vital energy circulates is washed logical lockout circuit open and is sentToward stretch circuit. Trigger impulse generative circuit as shown in figure 10, in the drawings D0-D11 be 12 digit counters send twoSystem numerical value, Phase0-Phase11 is the thyristor control angle binary numeral of DSP output, Phase0-Phase3 connectsThe analog input pin 10,12,13 of SN74LS85N chip and 15, Phase4-Phase11 connect chip SN74LS688 2,4,6,8,11,13,15 and 17 pins. U11, U12 form 12 bit value comparators, and TP+ is trigger impulse.

Trigger impulse generative circuit is output as a burst pulse, is not enough to trigger IGCT and transistor, so need pulseWidening circuit carries out broadening. The present invention utilizes NE555P monostable circuit that TP+ pulse is carried out to broadening, and widening circuit is as Figure 11 instituteShow, burst pulse is through the wide pulse of 555 monostable circuits broadened one-tenth 1ms, then for the triggering to IGCT.

Working power when high potential coupling energy taking circuit triggers mainly as IGCT, considers if from control systemPower supply, power supply is easy to be interfered, so the present invention adopts the mode of directly getting energy from high potential.

The major function of power module is to provide required various types of voltages to whole system. In the present invention, mainly wrapDraw together+3.3V ,+1.8V ,+5V, ± 12V device, the schematic diagram of power module is as shown in figure 12. The input of power module is alternating current220V, by obtain after AC/DC module+24V dc source, then, by DC/DC module, converts+5V the direct current of ± 15V toPower supply. + 5V power supply through the convert to+3.3V of power conversion chip TPS767D318 of TI company and+power supply of 1.8V respectively toDsp chip kernel and I/O mouth provide operating voltage.

Described information feedback and display module mainly comprise 80C196 single-chip microcomputer, LCD MODULE, external master control peopleMachine interface module is external connection keyboard input and PC control part. The concrete connection of information feedback and display module is: brilliant lockThe output of management and control Reactor banks processed and Active Power Filter-APF is connected the input of high potential plate, and the output of high potential plate connectsTake back the input of report plate, the output link information display module of return plate; Information display module is by dual port RAM and DSPBetween sampling module, intercom mutually.

In the present embodiment, control alarm signal and in opto-electronic conversion and coding module, change and encode and deliver to afterwards80C196 processes. 80C196 is by the switching of Control FC, and supervisory keyboard and Liquid Crystal Module are manually controlled, controlIpc monitor is carried out in host computer communication processed. 80C196 single-chip microcomputer and DSP carry out data communication by dual port RAM.

The function of information feedback and display module is: single-chip microcomputer assists DSP to complete interface processing, by keyboard input controlParameter will control Parameter storage to dual port RAM, voltage, electric current and power factor that DSP reads show on liquid crystal, and upperMachine communicates.

According to global design of the present invention, the adopting of what single chip part mainly completed is in Circuits System voltage and current signalThe demonstration of collection, keyboard and liquid crystal, the input of various digital quantities and single-chip microcomputer are communicated by letter with DSP and host computer. Monolithic in the present inventionMachine system is mainly that the three-phase current signal in three-phase voltage and current signal and the TCR in acquisition system shows for host computerShow, accept to report to the police and the processing such as tripping operation from the return signal of DSP. The DSP of master control system adopts two with demonstration single-chip microcomputerMouth RAM communication mode, selects CY7C133 chip, and this chip is the CMOS dual-port SRAM of high speed 2Kb × 16, has two cover phasesMutually address bus, data/address bus and the control bus of independent, full symmetric, adopt 68 pin PLCC packing forms, when maximum accessBetween be 25/35/55ns. CY7C133 is connected as shown in figure 13 with 80C196KC's, is CY7C133 and single-chip microcomputer in figure shown in U10Connect the right port, the chip of CY7C133 is placed on DSP data processing plate, by 34 pin flat cables by single-chip microcomputerMainboard and DSP data processing plate couple together. DPRAMCE is the gating signal to dual port RAM after CPLD decoding, and low level hasEffect. Utilize the read signal RD of single-chip microcomputer to complete read-write arbitrated logic busy signal DPRBUSY to dual port RAM and 80C196KCP1.2 mouth connects. Before writing data to dual port RAM, by detecting the height of busy signal DPRBUSY level, can avoid simultaneouslyWrite or when DSP reads, write same address location, thereby avoiding making a mistake. 2,4,6,8,10,12,14,16 of CY7C133Drawing for 17,15,13, No. 11 of 17,15,13,11 and U5 SN74LS245N chip of number pin and U1 SN74LS245N chipPin is connected, the drawing for 18,16,14, No. 12 of 1,3,5,7,9,11,13, No. 15 pin of CY7C133 and U1 SN74LS245N chip18,16,14, No. 12 pins of pin and U5 SN74LS245N chip are connected, 18, No. 20 pins of CY7C133 chip and monolithic40, No. 61 pins of machine are connected, 60,59,58,57,56,55,54, No. 53 pins of single-chip microcomputer and U1 SN74LS245N chip2,3,4, No. 5 pins and 6,7,8, No. 9 pins of U5 SN74LS245N chip be connected, No. 61 pins of single-chip microcomputer also withNo. 32 pins of CY7C133 chip are connected, and realize communicating by letter of DSP and single-chip microcomputer.

Show single-chip microcomputer and host computer employing serial communication, catenation principle figure as shown in figure 14, built-in one of 80C196KCSerial i/O mouth, can be used for communicating with host computer very easily. Because the serial ports of general PC is RS-232 level, and80C196KC is Transistor-Transistor Logic level, so need to communicate level conversion. In the present invention, adopt MAX232, MAX232 is the most frequently usedRS-232 level to the conversion chip of Transistor-Transistor Logic level, there are voltage multiplication and change-over circuit in its inside, as long as single+5V power supplyJust can realize Transistor-Transistor Logic level and RS-232 level conversion, use very convenient.

The matrix keyboard of master control human-machine interface module employing 4 × 5 makees system input device, adopts CM320240-10 typeNumber liquid crystal does system output device. Convenient for actual installation, matrix keyboard adopts the form of membrane keyboard, and liquid crystal spiral shellNail is fixed on a metal decking with keyboard, and 4 × 5 matrix keyboard catenation principle figure as shown in figure 15. 82C79 interface chipDigital quantity input 12,13,14,15,16,17,18 be connected with 19 pins SN74LS245N chip 18,17,16,15,14,13,12 and No. 11 pins, 32,33, No. 34 pins of 82C79 interface chip connect 1,2, No. 3 pins of SN74LS138N chip, enterThe output of row analog quantity; No. 5 pins of output of MC74HC74AN trigger connect No. 3 pins of 82C79 interface chip.The KCS of SN74LS245N chip is the chip selection signal being provided according to the address of 82C79 distribution by CPLD, at the bottom of MCU carries out keyboardWhen layer scanning, 74LS245 is strobed. The data direction of transfer control pin DIR of 74LS245 in the time that chip chip selection signal is effective, rootDecide data direction of transfer according to the height of pin level.

LCD MODULE of the present invention adopts CM320240-10, is the dot matrix liquid of a Chinese and English word and Graphics ModeBrilliant display module, the ROM font code of built-in 12Kb, can show the letters such as Chinese font, numerical chracter, the Irving of Britain and Japan, andThe display memory of built-in double-deck figure layer. In type mode, can receive standard Chinese word ISN and directly show Chinese, and not needEnter Graphics Mode and describe Chinese with plotting mode, can save the much MCU time, thereby improve locating of liquid crystal display ChineseReason efficiency. The wiring of liquid crystal and 80C196KC as shown in figure 16, the lcdrs of CM320240-10, lcdwr, lcdrd andThese 4 control lines of lcdcs1 are connected with 4 high speed outputs (HSO0-HSO3) of MCU by bus latch 74LS245, byHigh-speed output hso is controlled it.

A control method that has the distributing generating reactive power compensator of harmonic restraining function to carry out harmonic wave inhibition is concreteCarry out as follows:

1, step 1: sampling module gathers the three-phase voltage instantaneous value u of distributed generation_a，u_b，u_c, three-phase current winkDuration i_a，i_b，i_c；

2, step 2: the calculating at thyristor control angle: the measurement that first adopts Phase Lock Technique to carry out three-phase alternating current (comprisesVoltage, electric current and frequency), then carry out thyristor control according to the Mathematical Modeling of three-phase compensation susceptance and electric current and voltage sampled valueThe computing at angle, then export thyristor control angle, after feedback part in, photoelectric switching circuit is realized IGCT triggering signalOutput and the reception of state reporting signal.

3, step 3: generate trigger impulse: first system voltage carries out zero passage detection, it is multiple that accumulator is set to rising edgePosition, the voltage rising edge pulse of zero passage detection can be that accumulator resets like this, is added to when rising next time and formsA sawtooth waveforms, the IGCT trigger angle that DSP is calculated therewith sawtooth waveforms compares, when the Trigger Angle of IGCTWhile spending the accumulated value that is greater than accumulator, trigger a rising edge pulse until accumulator resets, so just obtain a wide cut arteries and veinsPunching; Because the pulse obtaining is wide, so adopt in the same way, obtained wideband pulse and secondary accumulator are compared,Can obtain a narrow pulse signal that is enough to trigger IGCT;

4, step 4: control reactive-load compensator IGCT and the transistorized break-make of Active Power Filter-APF, distributing is sent outElectric system carries out reactive-load compensation and harmonic wave suppresses.

Described passive filter group is made up of three groups of LC parallel branches, the LC branch circuit parallel connection of three groups of series connection of each routeComposition, every group of branch road filter capacitor of connecting again, is arranged on the output contact place of active filter, can reduce like this nodeHarmonic voltage, can suppress in harmonic current injection power system, more can play as whole system provides enough to cross and hold compensationEffect.

Wherein, the measuring process of the three-phase alternating current described in step 2 is as follows:

Step 1: first make line voltage be

U in formula_a，u_b，u_cFor three-phase voltage instantaneous value, E_1nRepresent positive sequence voltage virtual value, E_2nRepresent that negative sequence voltage is effectiveValue, ω is angular frequency, θ_2nFor negative phase-sequence initial phase angle;

Step 2: to three-phase voltage in above formula carry out abc three-phase can obtain to the transformation of coordinates of alpha-beta two-phase as follows,

u_αAnd u_βFor two phase voltage value corresponding under alpha-beta coordinate, c₃₂For the transition matrix from abc three-phase to alpha-beta two-phase;

Step 3: by above formula and matrix c_scObtain following matrix,

In above formula

Sin (ω t+ θ) and cos (ω t+ θ) are the signals being produced by standard sine power frequency component generator, θ be any at the beginning ofPhase angle.

Step 4: extract DC component from above formula, can obtain following

The voltage after conversion is

u_sf，u_cfFor two phase voltage value after conversion, E_s,E_cFor the DC component of extracting, c_sc ^-1For the contrary square of transition matrixBattle array;

Step 5: by phase voltage u after conversion_sf，u_cfAnd current i_α，i_βCalculate p, q component, computing formula is as follows

Step 6: calculate and detect electric current: p component obtains corresponding AC compounent, q component warp through RBF neural network algorithmAfter crossing anti-phase algorithm process, born accordingly DC component, then detected electric current through being converted to alpha-beta two-phase, concrete formula asUnder

For AC compounent corresponding to p component, by i_αAnd i_βCan obtain instantaneous reactive detection electric current through transition matrixi_a，i_b，i_c, concrete formula is as follows

Step 7: according to the Trigger Angle α of detected Current calculation IGCT;

When IGCT normally moves, in system, fundamental current is:

The subscript 1 of fundamental current I represents first harmonic, is first-harmonic; X_LReactance, X_L＝ωL；U_mIt is voltage peak; ByThis can be regarded as to obtain trigger angle.

In step 2, the calculation procedure at thyristor control angle is as follows:

Step 1: calculate compensation admittance, specific as follows:

Threephase load can be transformed into triangle connection arbitrarily, and each phase load admittance is by real part (electricity is led) and imaginary part (electricityReceive) composition. If three-phase imbalance load is

Y_l,ab、Y_l,bc、Y_l,caFor three-phase load admittance, Y_l,abRepresent the load admittance between a, b are mutually, Y_l,bcRepresent b, c phaseBetween load admittance, Y_l,caRepresent the load admittance between c, a are mutually; G_l,ab、G_l,bc、G_l,ca, for three-phase load electricity is led, G_l,abForElectricity between a, b phase is led, G_l,bcFor the electricity between b, c phase is led, G_l,caFor the electricity between c, a phase is led; B_l,abFor a, b are between mutuallySusceptance, B_l,bcFor the susceptance between b, c phase, B_l,caFor the susceptance between c, a phase;

The equilibrating principle proposing according to Si Tanmenci (C.P.Steinmetz), realizes three-phase not by impedance adjustmentBalanced loaded equilibrating, is specifically completed by two steps:

The first step is to carry out PFC, and on each phase load, one of parallel connection equals the compensation of load susceptance negative valueSusceptance, becomes load pure resistive, even compensation susceptance is

Like this, three-phase activity coefficient is 1, but due to G_l,ab≠G_l,bc≠G_l,caSo the load after compensation remains three-phaseUnbalanced load.

Second step is that the pure electricity of balance three-phase is led, for balance G_l,ab, at the alternate access capacitive susceptance of b, cSimultaneously at the alternate access inductive susceptance of c, aIn like manner, G_l,bcAnd G_l,caCan useIdentical way is balance in addition.

After above-mentioned two step equilibratings are processed, the total compensation admittance of the desirable compensating network of three-phase is

Wherein: B_r,ab，B_r,bc，B_r,caIt is the admittance that SVC should compensate.

In the time of design compensation device, with above formula be inconvenient as controlling basis because the admittance of loading actual be to be difficult to directlyConnect and measure, so need to derive the Practical Formula with voltage and current. Mend by symmetrical component method analysis load belowRepay, establish positive sequence three-phase equilibrium voltage and be:

Wherein

Line voltage:

Can ask each phase line current to be:

According to symmetrical component method, the symmetrical components of line current are as follows:

In formulaRespectively zero sequence, positive sequence, the reference phasor of negative phase-sequence system, obtains asymmetric by above two formulasThe line current symmetrical components of threephase load:

Load after compensation, if the negative sequence component of its line current is zero, will be balance, and this just requires

If making the power-factor of load after compensation is 1, the imaginary part that needs positive sequence line current is zero,

By the above various compensation admittance that can solve the SVC representing with voltage, electric current:

Above formula is carried out to proper transformation, just can obtain the compensation susceptance representing with load current and instantaneous voltage:

Utilize now following relation:

This expression formula is the mean value of reactive power in a complete cycle.

According toCan obtain following formula,

Above formula can be used as the basis of compensator control system, because all mathematical operations on the right can be used electronics electricityRoad completes, although integration period or average period all as above formula is taken as one week, integration time constant need not strictly equal T,For some use occasion (as electric arc furnaces), it is much shorter perhaps. If adopt digitized controller, integration is below usedSummation expression formula replaces, and wherein N is that an employing in integration period is counted, and n is current sampling instant, and i is i samplingIn the moment, so just obtained practical compensation susceptance computing formula,

Step 2: calculate thyristor control angle, specific as follows:

The compensation susceptance and the IGCT angle of flow that in step 1, calculate have following relation,

B_L(a) be the reactor susceptance of thyristor control; X_LFor the reactance of Controlled Reactor; A is the trigger delay of IGCTAngle; δ is the angle of flow of IGCT. Known by computing formula, in the time of a=90 °, trigger delay angle, the complete conducting of IGCT, justThe right phase shift trigger impulse of antiparallel IGCT being connected with Controlled Reactor by control like this changes equivalent susceptanceSize, thus reach the object of exporting variable, continuous reactive power.

The global optimization algorithm flow of the passive filter group in the A-T mixing reactive-load compensation unit described in the present invention asUnder:

Step 1: systematic parameter is set, and mainly comprises System Reactive Power compensation rate, the magnitude of voltage of passive filter group and harmonic waveLimit value etc.; System Reactive Power compensation rate is Q_SVC＝Q₁+Q₂+…+Q_h, the voltage and current of system harmonics is restricted to I_h＜I_H,U_h＜U_H。Q₁、Q₂、Q_hFor the reactive power of each branch road output; I_hFor system harmonics electric current, I_HFor system harmonics current maxima; U_hForSystem harmonics voltage, U_HFor system harmonics voltage max.

Step 2: determine the total value Q of the reactive-load compensation amount that actual passive filter group can provide, by individual harmonic currentAccount for the ratio of total harmonic current, distribute the reactive-load compensation amount Q of the each branch road of passive filter group_i；

Step 3: press electric current and voltage percent harmonic distortion and passive filter group parallel resonance frequency condition, revise idle amountDistribution;

The total percent harmonic distortion of power system isThe inside and outside resonant frequency of bank of filters is constrained toU in formula₁For fundamental voltage hasEffect value; H is overtone order, and H is bank of filters number, δ_emnFor negative maximum equivalent frequency departure, δ_empFor just maximum equivalent frequency is inclined to one sidePoor.

Of the present invention is common mode in engineering application, accounts for total harmonic wave Σ I according to tuning harmonic current_hRatioValue is distributed the reactive-load compensation amount of each branch filter output.

System in the ideal case, can obtain the amplitude of electric current each harmonic component and the pass of α by Fourier analysisSystem, as shown in the formula

h＝2k+1k＝2,3,4…

In formula, α is the trigger angle of TCR IGCT, X_LFor the equiva lent impedance of reactor.

Step 4: the parameter value of the each branch filter of cycle calculations, judges whether wave filter meets electric current and voltage harmonic wave abnormalThe inside and outside parallel resonance frequency condition of variability and passive filter group, if satisfied condition, judges the nothing of passive filter group againWhether merit output meets the reactive-load compensation amount of actual distributing generating reactive power compensator, just again repaiies if do not satisfied condition againPositive harmonic constant, returns and revises idle amount allocation step, meets actual distributing generating in the idle output of passive filter groupAfter the reactive-load compensation amount of reactive power compensator, just can move that passive filter group is carried out idle output and harmonic wave has suppressed.The global optimization algorithm flow of this step as shown in figure 17.

Claims (2)

1. the method for utilizing distributing generating reactive power compensator to carry out harmonic wave inhibition, is characterized in that: specifically as followsCarry out:

Step 1: sampling module gathers the three-phase voltage instantaneous value u of distributed generation_a，u_b，u_c, three-phase current instantaneous value i_a，i_b，i_c；

Step 2: the calculating at thyristor control angle: first adopt Phase Lock Technique to carry out the detection of the three-phase alternating current signal of telecommunication, comprise electricityPressure, electric current and frequency; Then carry out thyristor control angle according to the Mathematical Modeling of three-phase compensation susceptance and electric current and voltage sampled valueComputing, then export thyristor control angle, after in feedback part, photoelectric switching circuit is realized the defeated of IGCT triggering signalGo out the reception with state reporting signal;

Step 3: generate trigger impulse: first system voltage carries out zero passage detection, accumulator is set to rising edge and resets, like thisThe voltage rising edge pulse of zero passage detection can be that accumulator resets, and forms a sawtooth when being added to rising next timeRipple, the IGCT trigger angle that DSP is calculated therewith sawtooth waveforms compares, when the trigger angle of IGCT is greater than tiredWhile adding the accumulated value of device, trigger a rising edge pulse until accumulator resets, so just obtain a wide cut pulse; Due toThe pulse of arriving is wide, so adopt in the same way, obtained wideband pulse and secondary accumulator is compared, and can obtainTo a narrow pulse signal that is enough to trigger IGCT;

Step 4: control reactive-load compensator IGCT and the transistorized break-make of Active Power Filter-APF, to distributed generationCarrying out reactive-load compensation and harmonic wave suppresses;

Wherein, passive filter group is made up of three groups of LC parallel branches, the LC branch circuit parallel connection composition of three groups of series connection of each route,Every group of branch road filter capacitor of connecting again, is arranged on the output contact place of active filter;

The detection of described three-phase alternating current, specifically carry out as follows:

Step 1: first make line voltage be:

$\left[\begin{array}{c}{u}_a\\ u_b\\ u_c\end{array}\right]=\left[\begin{array}{c}\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}\sqrt{2}{E}_{1n}\sin \left(n\mathrm{\ω}t\right)+\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}\sqrt{2}{E}_{2n}\sin (n\mathrm{\ω}t+{\mathrm{\θ}}_{2n})\\ \underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}\sqrt{2}{E}_{1n}\sin (n\mathrm{\ω}t-\frac{2\mathrm{\π}}{3})+\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}\sqrt{2}{E}_{2n}\sin (n\mathrm{\ω}t+\frac{2\mathrm{\π}}{3}+{\mathrm{\θ}}_{2n})\\ \underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}\sqrt{2}{E}_{1n}\sin (n\mathrm{\ω}t+\frac{2\mathrm{\π}}{3})+\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}\sqrt{2}{E}_{2n}\sin (n\mathrm{\ω}t-\frac{2\mathrm{\π}}{3}+{\mathrm{\θ}}_{2n})\end{array}\right]$

U in formula_a，u_b，u_cFor three-phase voltage instantaneous value, E_1nRepresent positive sequence voltage virtual value, E_2nRepresent negative sequence voltage virtual value, ωFor angular frequency, θ_2nFor negative phase-sequence initial phase angle;

Step 2: three-phase voltage in above formula is carried out to abc three-phase and can obtain as follows to the transformation of coordinates of alpha-beta two-phase:

$\left[\begin{array}{c}{u}_{\mathrm{\α}}\\ u_{\mathrm{\β}}\end{array}\right]=c_{32}\left[\begin{array}{c}{u}_a\\ u_b\\ u_c\end{array}\right]=\left[\begin{array}{c}\sqrt{3}{E}_{1n}\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}\sin \left(n\mathrm{\ω}t\right)+\sqrt{3}{E}_{2n}\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}\sin (n\mathrm{\ω}t+{\mathrm{\θ}}_{2n})\\ -\sqrt{3}{E}_{1n}\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}cos\left(n\mathrm{\ω}t\right)+\sqrt{3}{E}_{2n}\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}cos(n\mathrm{\ω}t+{\mathrm{\θ}}_{2n})\end{array}\right]$

u_αAnd u_βFor two phase voltage value corresponding under alpha-beta coordinate, c₃₂For the transition matrix from abc three-phase to alpha-beta two-phase;

Step 3: by above formula and matrix c_scObtain following matrix:

$\left[\begin{array}{c}{u}_s\\ u_c\end{array}\right]=c_{sc}\left[\begin{array}{c}{u}_{\mathrm{\α}}\\ u_{\mathrm{\β}}\end{array}\right]=\left[\begin{array}{c}\sqrt{3}{E}_{1n}\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}cos\[(n-1)\mathrm{\ω}t-\mathrm{\θ}\]-\sqrt{3}{E}_{2n}\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}cos\[(n+1)\mathrm{\ω}t+{\mathrm{\θ}}_{2n}-\mathrm{\θ}\]\\ -\sqrt{3}{E}_{1n}\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}\sin \[(n-1)\mathrm{\ω}t-\mathrm{\θ}\]-\sqrt{3}{E}_{2n}\underset{n=1}{\overset{\mathrm{\∞}}{\mathrm{\Σ}}}cos\[(n+1)\mathrm{\ω}t+{\mathrm{\θ}}_{2n}-\mathrm{\θ}\]\end{array}\right]$

In above formula:

$c_{sc}=\left[\begin{array}{cc}sin(\mathrm{\ω}t+\mathrm{\θ})& -cos(\mathrm{\ω}t+\mathrm{\θ})\\ -cos(\mathrm{\ω}t+\mathrm{\θ})& -sin(\mathrm{\ω}t+\mathrm{\θ})\end{array}\right]$

Sin (ω t+ θ) and cos (ω t+ θ) are the signals being produced by standard sine power frequency component generator, and θ is any initial phase angle;

Step 4: extract DC component from above formula, can obtain following:

$\left[\begin{array}{c}{E}_s\\ E_c\end{array}\right]=\left[\begin{array}{c}\sqrt{3}{E}_{11}cos(-\mathrm{\θ})\\ -\sqrt{3}{E}_{11}\sin (-\mathrm{\θ})\end{array}\right]$

The voltage after conversion is:

$\left[\begin{array}{c}{u}_{sf}\\ u_{cf}\end{array}\right]={c_{sc}}^{-1}\left[\begin{array}{c}{E}_s\\ E_c\end{array}\right]=\left[\begin{array}{c}\sqrt{3}{E}_{11}sin\mathrm{\ω}t\\ -\sqrt{3}{E}_{11}cos\mathrm{\ω}t\end{array}\right]$

E_s,E_cFor the DC component of extracting, c_sc ^-1For the inverse matrix of transition matrix, u_sf，u_cfFor two phase voltage value after conversion;

Step 5: by phase voltage u after conversion_sf，u_cfAnd current i_α，i_βCalculate p, q component, computing formula is as follows:

$\left[\begin{array}{c}p\\ q\end{array}\right]=\left[\begin{array}{cc}{u}_{sf}& u_{cf}\\ u_{cf}& -u_{sf}\end{array}\right]\left[\begin{array}{c}{i}_{\mathrm{\α}}\\ i_{\mathrm{\β}}\end{array}\right]$

Step 6: calculate and detect electric current: p component obtains corresponding AC compounent after neutral net filtering algorithm, q component warpAfter crossing anti-phase algorithm process, born accordingly DC component, then detected electric current through being converted to alpha-beta two-phase, concrete formula asUnder:

$\left[\begin{array}{c}{i}_{\mathrm{\α}}\\ i_{\mathrm{\β}}\end{array}\right]=\frac{1}{{u_{sf}}^2+{u_{cf}}^2}\left[\begin{array}{cc}{u}_{sf}& u_{cf}\\ u_{cf}& -u_{sf}\end{array}\right]\left[\begin{array}{c}-\tilde{p}\\ -q\end{array}\right]$

For AC compounent corresponding to p component, by i_αAnd i_βCan obtain instantaneous reactive detection current i through transition matrix_a，i_b，i_c, concrete formula is as follows:

$\left[\begin{array}{c}{i}_a\\ i_b\\ i_c\end{array}\right]=\sqrt{\frac{2}{3}}\left[\begin{array}{cc}1& 0\\ -\frac{1}{2}& \frac{\sqrt{3}}{2}\\ -\frac{1}{2}& -\frac{\sqrt{3}}{2}\end{array}\right]\left[\begin{array}{c}{i}_{\mathrm{\α}}\\ i_{\mathrm{\β}}\end{array}\right]$

Step 7: according to the Trigger Angle α of detected Current calculation IGCT;

When IGCT normally moves, in system, fundamental current is:

$I_1=\sqrt{2}\frac{(\mathrm{\π}-\mathrm{\α})+sin\mathrm{\α}cos\mathrm{\α}}{{\mathrm{\πX}}_L}{U}_m$

The subscript 1 of fundamental current I represents first harmonic, is first-harmonic; X_LReactance, X_L＝ωL；U_mIt is voltage peak; Be thusCan be regarded as to obtain trigger angle.

2. the method for utilizing distributing generating reactive power compensator to carry out harmonic wave inhibition according to claim 1, its featureBe: the global optimization algorithm flow of described passive filter group is as follows:

Step 1: systematic parameter is set, and mainly comprises System Reactive Power compensation rate, the magnitude of voltage of passive filter group and harmonic limitsDeng; System Reactive Power compensation rate is Q_SVC＝Q₁+Q₂+…+Q_h, the voltage and current of system harmonics is restricted to I_h＜I_H,U_h＜U_H，I_HWithU_HFor electric current and the voltage KB limit of system harmonics; Q₁、Q₂、Q_hFor the reactive power of each branch road output; I_hFor system harmonicsElectric current, U_hFor system harmonics voltage;

Step 2: determine the total value Q of the reactive-load compensation amount that actual passive filter group can provide, account for always by individual harmonic currentThe ratio of harmonic current, the reactive-load compensation amount Q of the each branch road of distribution passive filter group_i；

Step 3: press electric current and voltage percent harmonic distortion and passive filter group parallel resonance frequency condition, revise dividing of idle amountJoin;

The total percent harmonic distortion of power system isThe inside and outside resonant frequency of bank of filters is constrained to $f_{ii}\∉\[50h(1+{\mathrm{\δ}}_{emn}),50h(1+{\mathrm{\δ}}_{emp})\],f_{io}\∉\[50h(1+{\mathrm{\δ}}_{emn}),50h(1+{\mathrm{\δ}}_{emp})\];$ _{In formula}U₁For fundamental voltage effectiveValue; H is overtone order, and H is bank of filters number, δ_emnFor negative maximum equivalent frequency departure, δ_empFor positive maximum equivalent frequency departure;

Step 4: the parameter value of the each branch filter of cycle calculations, judges whether wave filter meets electric current and voltage percent harmonic distortionWith parallel resonance frequency condition inside and outside passive filter group, if satisfied condition, judge again the idle defeated of passive filter groupGo out the reactive-load compensation amount that whether meets actual distributing generating reactive power compensator, if it is humorous with regard to again revising not satisfy condition againWave system number, returns and revises idle amount allocation step, the more idle output of passive filter group to meet the generating of actual distributing idleAfter the reactive-load compensation amount of compensation arrangement, just can move that passive filter group is carried out idle output and harmonic wave has suppressed.