CN103199172B - 发光二极管封装结构的制造方法 - Google Patents

发光二极管封装结构的制造方法 Download PDF

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CN103199172B
CN103199172B CN201210005383.2A CN201210005383A CN103199172B CN 103199172 B CN103199172 B CN 103199172B CN 201210005383 A CN201210005383 A CN 201210005383A CN 103199172 B CN103199172 B CN 103199172B
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support plate
substrate
fluorescence membrane
led
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CN103199172A (zh
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陈隆欣
曾文良
陈滨全
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Suzhou Medical Device Industry Development Co ltd
Suzhou Medical Device Industry Development Group Co ltd
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Rongchuang Energy Technology Co ltd
Zhanjing Technology Shenzhen Co Ltd
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Abstract

一种发光二极管封装结构的制造方法，包括以下步骤：提供一基板和一载板，将该基板设置在该载板上，该基板上形成有电路层并装设有若干发光二极管芯片；提供一模具及一荧光薄膜，将所述载板放入该模具中，使荧光薄膜密封该模具的一端并直接与发光二极管芯片相对，该载板置于模具的另一端，模具中的空气通过载板与外部环境相通；自载板的外部抽离该模具内的空气，使荧光薄膜贴覆在该发光二极管芯片上；移除模具并固化荧光薄膜；在基板上形成一封装体；切割封装体和基板并去除载板得到多个发光二极管封装结构。

Description

发光二极管封装结构的制造方法
技术领域
本发明涉及一种半导体的制造方法，尤其涉及一种发光二极管封装结构的制造方法。
背景技术
相比于传统的发光源，发光二极管（Light Emitting Diode，LED）具有重量轻、体积小、污染低、寿命长等优点，其作为一种新型的发光源，已经被越来越多地应用到各领域当中，如路灯、交通灯、信号灯、射灯及装饰灯等。
现有的发光二极管封装结构通常包括基板、位于基板上的电极、承载于基板上并与电极电性连接的发光二极管芯片以及覆盖发光二极管芯片的封装体。为改善发光二极管芯片发光特性，通常会在发光二极管封装结构中设置荧光粉。荧光粉通常是采用喷涂的方式涂覆在封装体的出光面上，然而喷涂的随机性容易导致荧光粉分布不均匀，或者在形成封装体之前混合在封装材料中，而由于封装材料凝固时悬浮在封装材料中的荧光粉会发生沉积，从而也会导致固化后的封装体中的荧光粉分布不均匀，从而影响发光二极管封装结构最终的出光效果。
发明内容
有鉴于此，有必要提供一种荧光粉分布均匀的发光二极管封装结构的制造方法。
一种发光二极管封装结构的制造方法，包括以下步骤：
提供一基板和一载板，将该基板设置在该载板上，该基板上形成有电路层并装设有若干发光二极管芯片；
提供一模具及一荧光薄膜，将所述载板放入该模具中，使荧光薄膜密封该模具的一端并直接与发光二极管芯片相对，该载板置于模具的另一端，模具中的空气通过载板与外部环境相通；
自载板的外部抽离该模具内的空气，使荧光薄膜贴覆在该发光二极管芯片上；
移除模具并固化荧光薄膜；
在基板上形成一封装体；
切割封装体和基板并去除载板得到多个发光二极管封装结构。
本发明所提供的发光二极管封装结构的制造方法中，采用可透气的载板和模具配合，并将荧光薄膜覆盖于模具的一端开口，载板至于模具的另一端开口，自载板处抽空模具内的空气，从而使荧光薄膜均匀贴覆于发光二极管芯片上。
下面参照附图，结合具体实施方式对本发明作进一步的描述。
附图说明
图1至图3、图5至图9为本发明的发光二极管封装结构的制造过程中各步骤示意图。
图4为图3的发光二极管封装结构的制造过程的步骤中去掉盖板的俯视图。
主要元件符号说明
发光二极管封装结构 100
基板 10
电路层 20
电路块 21
发光二极管芯片 30
阻隔层 40
模具 50
框体 51
侧壁 511
侧壁顶面 512
侧壁底面 513
盖板 52
通气孔 521
荧光薄膜 60
封装体 70
加压装置 80
载板 90
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
如图9所示，本发明实施方式提供的发光二极管封装结构100包括基板10、形成于基板10上的电路层20、承载于基板10上并与电路层20电性连接的发光二极管芯片30、覆盖发光二极管芯片30的荧光薄膜60，以及封装该发光二极管芯片30的封装体70。
在本实施方式中，所述发光二极管芯片30为水平式结构，其采用覆晶方式固定并电连接于基板10的电路层20上。该发光二极管芯片30包括一与基板10相对的出光面31，与该出光面31相对的另一表面上设有两电极32。该出光面31背离基板10，该两电极32面对基板10与电路层20连接。
请参考图1，提供一基板10和一载板90，将该基板10叠置于该载板90上。该基板10的上表面形成有电路层20，电路层20包括若干相互间隔设置的电路块21，该基板10上装设有若干发光二极管芯片30。在本实施方式中，该发光二极管芯片30的数量为三个，且每一发光二极管芯片30均对应一对相互间隔的电路块21。该载板90的尺寸大于该基板10的尺寸，且该载板90为多孔状结构。该载板90可采用本身具有多孔状结构的材料制成，也可以采用实心板体再经过后续加工在载板90上形成有多个贯穿上下表面的通孔。
请参阅图2，将一阻隔层40叠设于基板10上，该阻隔层40上形成有若干通孔41，且每一通孔41对应一发光二极管芯片30。该通孔41的尺寸大于发光二极管芯片30的尺寸，以使得每一发光二极管芯片30均容置于其对应的通孔41中。
请参阅图3和图4，提供一模具50，其包括框体51和盖板52。该框体51具有侧壁511、侧壁顶面512和侧壁底面513。框体51的整体形状和尺寸与载板90的基本相同，框体51的高度大于载板90与该载板90上叠置的基板10及基板10上装设的发光二极管芯片30的高度的总和。该盖板52上形成有通气孔521。将上述承载基板10的载板90放置于框体51内。为方便后续操作，可使载板90的下表面和框体51的下表面平齐。
覆盖一荧光薄膜60于框体51的侧壁顶面512，并使该荧光薄膜60罩设基板10、发光二极管芯片30、载板90于该框体51的内腔，从而密封框体51的上端。该荧光薄膜60为未经过固化处理的薄膜层，其具有一定的伸缩强度和弹性，从而可以靠框体51的侧壁顶面512支撑而不至于掉落。将盖板52紧贴荧光薄膜60盖设于框体51的侧壁顶面512处，荧光薄膜60以上通过盖板52的通气孔521与外部环境相通。由于框体51的下端卡设有多孔结构的载板90，上端被荧光薄膜60密封，因此模具50内部的空气通过载板90与外部环境相通。
请参阅图5，自模具50的下端抽离该模具50内的空气，使荧光薄膜60贴覆发光二极管芯片30于基板10上。该步骤可采用真空抽气机完成，将该真空抽气机置于模具50的下端（图未示），并正对载板90抽气。由于载板90为多孔结构，透过载板90内的孔洞将模具50内部的空气逐渐抽出，同时荧光薄膜60在压力的驱动下完整且连续地覆盖发光二极管芯片30、阻隔层40、电路层20和基板10。进一步的，还可以在模具50的盖板52的通气孔521处增设一个加压装置80。当从模具50下端的载板90处抽离模具50内的空气时，启动加压装置80，使压力自盖板52的通气孔521向下压向荧光薄膜60，使荧光薄膜60更易于在压力的驱动下向下移动从而贴覆于发光二极管芯片30上。
请参阅图6，去除模具50并固化荧光薄膜60。其中，可采用加热烘烤的方式固化荧光薄膜60。固化荧光薄膜60的步骤可以在去除模具50之间进行，也可以在去除模具50之后进行。
请参阅图7，去除阻隔层40，同时使覆盖于阻隔层40上的荧光薄膜60随着阻隔层40一起脱离基板10。当然，在去除阻隔层40之前还可以于阻隔层40的每个通孔41处预先切割荧光薄膜60，从而在去除阻隔层40的过程中不易破坏荧光薄膜60，从而得到完整的荧光薄膜60。
请参阅图8，在基板10上形成一封装体70并覆盖发光二极管芯片30和荧光薄膜60。该封装体70的周缘可与基板10的周缘平齐。前述阻隔层40的设置与去除是为了去除相邻两发光二极管芯片30之间并覆盖于电路层20上的荧光薄膜60，以避免相邻两发光二极管芯片30之间的区域也被荧光薄膜60覆盖，从而避免使发光二极管芯片30发出的光线经过大范围的荧光薄膜60的激发形成波长较长、色温偏暖的光线，并利于后续形成的封装体70能够直接粘附于基板10上，使两者紧密连接，以加强发光二极管芯片30的防水防尘的保护作用。在其他实施方式中，去除相邻两发光二极管芯片30之间的荧光薄膜60还可以采取其他方式，例如机械撕裂、切屑、化学腐蚀等等。
请同时参阅图9，切割封装体70和基板10并去除载板90得到多个发光二极管封装结构100。
本发明的发光二极管封装结构的制造方法，采用可透气的载板和模具配合，并将荧光薄膜覆盖于模具的一端开口，载板至于模具的另一端开口，自载板处抽空模具内的空气，从而使荧光薄膜均匀贴覆于发光二极管芯片上。
可以理解的是，对于本领域的普通技术人员来说，可以根据本发明的技术构思做出其它各种相应的改变与变形，而所有这些改变与变形都应属于本发明权利要求的保护范围。

Claims (8)

1.一种发光二极管封装结构的制造方法，包括以下步骤：
提供一基板和一载板，将该基板设置在该载板上，该基板上形成有电路层并装设有若干发光二极管芯片；
提供一模具及一荧光薄膜，所述模具包括框体，该框体的侧壁的形状和尺寸与载板的形状和尺寸相同，该框体包括侧壁顶面和侧壁底面，所述荧光薄膜覆盖于该框体的侧壁顶面，所述载板卡持于框体内贴设框体的侧壁，所述载板的下表面与框体的侧壁底面平齐,将所述载板放入该模具中，使荧光薄膜密封该模具的一端并直接与发光二极管芯片相对，该载板置于模具的另一端，模具中的空气通过载板与外部环境相通；
自载板的外部抽离该模具内的空气，使荧光薄膜贴覆在该发光二极管芯片上；
移除模具并固化荧光薄膜；
在基板上形成一封装体；
切割封装体和基板并去除载板得到多个发光二极管封装结构。
2.如权利要求1所述的发光二极管封装结构的制造方法，其特征在于：所述载板为多孔状结构，该载板的尺寸大于基板的尺寸。
3.如权利要求1所述的发光二极管封装结构的制造方法，其特征在于：所述模具还包括盖板，该盖板盖设于框体侧壁顶面覆盖的荧光薄膜之上，该盖板上形成有一通气孔。
4.如权利要求3所述的发光二极管封装结构的制造方法，其特征在于：所述盖板的通气孔处还装设有一加压装置，该加压装置通过该通气孔向荧光薄膜加压。
5.如权利要求1所述的发光二极管封装结构的制造方法，其特征在于：在基板上形成一封装体的步骤之前还包括去除相邻两发光二极管芯片之间的荧光薄膜的步骤。
6.如权利要求5所述的发光二极管封装结构的制造方法，其特征在于：在提供一模具的步骤前还包括将一阻隔层叠置于基板上的步骤，该阻隔层上形成有若干通孔，每一发光二极管芯片对应容置于一通孔中，在去除相邻两发光二极管芯片之间的荧光薄膜的步骤之前还包括将阻隔层从基板上去除的步骤。
7.如权利要求1所述的发光二极管封装结构的制造方法，其特征在于：固化荧光薄膜的步骤在移除模具的步骤之前。
8.如权利要求1所述的发光二极管封装结构的制造方法，其特征在于：固化荧光薄膜的步骤在移除模具的步骤之后。
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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103311381A (zh) * 2012-03-13 2013-09-18 展晶科技(深圳)有限公司 发光二极管封装结构的制造方法
KR102145208B1 (ko) 2014-06-10 2020-08-19 삼성전자주식회사 발광소자 패키지 제조방법
CN111816750A (zh) * 2014-06-19 2020-10-23 亮锐控股有限公司 具有小源尺寸的波长转换发光设备
JP2016071269A (ja) * 2014-09-30 2016-05-09 株式会社東芝 電子機器、及びシステム
US9673101B2 (en) 2015-09-30 2017-06-06 International Business Machines Corporation Minimize middle-of-line contact line shorts
CN107482099B (zh) * 2016-06-08 2019-09-10 光宝光电(常州)有限公司 发光二极管封装结构
CN108054252A (zh) * 2017-12-25 2018-05-18 鸿利智汇集团股份有限公司 一种高密度色温可调cob制造方法
CN112447897A (zh) * 2019-09-03 2021-03-05 李家铭 具有遮光膜的rgb发光二极管模块
CN113764547B (zh) * 2021-08-30 2023-06-09 东莞市中麒光电技术有限公司 一种Mini-LED器件的制作方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101300687A (zh) * 2005-10-28 2008-11-05 飞利浦拉米尔德斯照明设备有限责任公司 在led上层压包含磷光体的密封剂膜

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2284912B1 (de) * 1996-06-26 2013-09-04 OSRAM Opto Semiconductors GmbH Licht abstrahlendes Halbleiterbauelement mit Lumineszenzkonversionselement
JP3911174B2 (ja) * 2002-03-01 2007-05-09 シャープ株式会社 半導体素子の製造方法および半導体素子
KR20050034936A (ko) * 2003-10-10 2005-04-15 삼성전기주식회사 형광체를 이용한 파장변환형 발광 다이오드 패키지 및제조방법
TWI418054B (zh) * 2006-08-08 2013-12-01 Lg Electronics Inc 發光裝置封裝與製造此封裝之方法
KR20110004874A (ko) * 2008-04-23 2011-01-14 씨. 아이. 카세이 가부시기가이샤 발광 다이오드용 패키지, 발광장치 및 발광장치의 제조방법
TW200952152A (en) * 2008-06-03 2009-12-16 Lustrous Technology Ltd Multi-chip LED package and fabrication method of the same
TWI376042B (en) * 2009-04-15 2012-11-01 Au Optronics Corp Method of packaging liminescence device
JP2011138902A (ja) * 2009-12-28 2011-07-14 Tokyo Electron Ltd 実装方法及び実装装置
US20110220920A1 (en) * 2010-03-09 2011-09-15 Brian Thomas Collins Methods of forming warm white light emitting devices having high color rendering index values and related light emitting devices
TWI476959B (zh) * 2010-04-11 2015-03-11 Achrolux Inc 轉移均勻螢光層至一物件上之方法及所製得之發光結構
WO2011145794A1 (ko) * 2010-05-18 2011-11-24 서울반도체 주식회사 파장변환층을 갖는 발광 다이오드 칩과 그 제조 방법, 및 그것을 포함하는 패키지 및 그 제조 방법
US20120255603A1 (en) * 2011-04-08 2012-10-11 Young-June Yu Photovoltaic structures and methods of fabricating them

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101300687A (zh) * 2005-10-28 2008-11-05 飞利浦拉米尔德斯照明设备有限责任公司 在led上层压包含磷光体的密封剂膜

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