CN103198870B - The restorative procedure of non-uniform Distribution redundancy in DRAM - Google Patents
The restorative procedure of non-uniform Distribution redundancy in DRAM Download PDFInfo
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- CN103198870B CN103198870B CN201310088672.8A CN201310088672A CN103198870B CN 103198870 B CN103198870 B CN 103198870B CN 201310088672 A CN201310088672 A CN 201310088672A CN 103198870 B CN103198870 B CN 103198870B
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Abstract
The present invention relates to the restorative procedure of non-uniform Distribution redundancy in a kind of DRAM.Comprise step: 1. the DRAM making non-uniform Distribution redundancy repairs file; 2. virtual redundancy forces crash handling; 3 reparations completing non-uniform Distribution redundancy in DRAM.The invention provides a kind of succinct, restorative procedure of improving accuracy, improving non-uniform Distribution redundancy in the DRAM of design flexibility.
Description
Technical field
The present invention relates to a kind of restorative procedure of redundancy, particularly relate to the restorative procedure of non-uniform Distribution redundancy in a kind of DRAM.
Background technology
Along with constantly reducing and the continuous increase of memory capacity of DRAM (DynamicRandomAccessMemory dynamic RAM) manufacture craft, in the dram chip that volume production goes out, certainly exist the storage unit of inefficacy.In order to enable DRAM normally use, contain redundancy unit in chip design, redundancy unit is used for the reparation of disabling unit, to reach the object of the qualified DRAM of volume production.In tradition DRAM design, redundancy unit is uniformly distributed in the chips, and the software therefore repaired for analyzing DRAM only can carry out repairing analysis to the equally distributed DRAM of redundancy.But along with reducing the demand of production cost, chip area constantly reduces, and designer no longer adopts the design concept being uniformly distributed redundancy, the substitute is and add redundancy on any residual area of chip, therefore repair software failure, thus have impact on normal use.
Summary of the invention
In order to solve the technical matters existed in background technology, the invention provides the restorative procedure of non-uniform Distribution redundancy in a kind of DRAM.
Technical solution of the present invention is:
1. the restorative procedure of non-uniform Distribution redundancy in DRAM, is characterized in that: comprise the following steps:
1] DRAM making non-uniform Distribution redundancy repairs file
1.1] in the region without true wordline redundant distributions, add dummy word lines redundancy makes the redundancy in this region be evenly distributed state,
1.2] the truer wordline redundancy of region in true redundant area adding dummy word lines redundancy in step 1.1 is combined, makes DRAM and repair file;
2] virtual redundancy forces crash handling
After DRAM reparation documenting completes, the dummy word lines redundancy added is processed, virtual redundancy was lost efficacy in step 1.1;
3] reparation of non-uniform Distribution redundancy in DRAM is completed.
The process in above-mentioned steps 2, virtual redundancy being lost efficacy specifically writes 0 data reading 1 relatively or write 1 data reading 0 and compare to dummy word lines redundancy.
Advantage of the present invention is:
1. succinct, the DRAM that need not upgrade repairs software; Because existing DRAM repairing analysis software can only carry out repairing analysis to the DRAM being uniformly distributed redundancy, therefore in order to enable the DRAM for non-uniform Distribution redundancy, software must be upgraded.The upgrading of software not only needs supplementary payments software company expense, and will cause postponing of DRAM volume production, and directly upgrade software is used for volume production high risk characteristic, and therefore, the upgrading of software has wretched insufficiency.And new restorative procedure can continue to use existing software, avoid above-mentioned deficiency.
2. improve accuracy, the real yield of wafer can be reflected; If do not adopt above-mentioned restorative procedure, normally work to make existing DRAM repairing analysis software, 16 independent partitions of the bit line redundancy defined by RA12:9 that designer provides can not be repaired employing, make for the purpose of wordline redundancy is uniformly distributed to reach.Because people is the independent partitions eliminating bit line redundancy, the reparation dirigibility that chip designer provides can not be guaranteed, and the repair ability of DRAM declines, and the true yield of wafer can not be embodied, and causes the lifting of production cost further.And the employing of the method makes 16 of bit line redundancy independent partitions be preserved, reflect the recovery scenario of dram chip really, ensure that the yield of wafer.
3. improve design flexibility; The method can not only be used for the chip of wordline redundancy non-uniform Distribution, and it is all applicable to the chip of redundancy Arbitrary distribution (such as non-uniform Distribution bit line redundancy, non-uniform Distribution input and output etc.).Because DRAM repairing analysis software did not limit adding of virtual redundancy, therefore virtual redundancy can be added to ensure the normal work of software at the arbitrary region of DRAM, then for the corresponding failure testing item of forcing of different types of virtual redundancy exploitation to ensure the true reparation of DRAM.Therefore, designer can add redundancy at the arbitrary region of DRAM, and the dirigibility of chip design is significantly enhanced.
Accompanying drawing explanation
Fig. 1 is workflow diagram of the present invention;
Fig. 2 is that 1GDRAM of the present invention relates to and test address mapping relations schematic diagram;
Fig. 3 is 1GDRAMbank0 redundant distributions of the present invention and the mapping schematic diagram in AFM thereof;
Fig. 4 is the inefficacy dummy word lines address schematic diagram of 1GDRAMbank0 in AFM of the present invention.
Embodiment
1.1 DRAM making non-uniform Distribution redundancy repair file
For 1GDRAM chip, 1GDRAM has the redundant address of 13 row addresses, 10 bit column address, 3 bank addresses and row and column.Fig. 2 gives the mapping relations of 1GDRAM design and Advantest board AFM (AddressFailureMemory address failure memory body) address.
For 1GDRAMbank0, the redundant distributions that designer provides is that bit line redundancy is divided into 16 isolated areas by RA12:9 and is uniformly distributed, but it is 0001 that wordline redundancy is only distributed in RA12:9, 0010, the region of 0011 and 0100, the mapping of this redundant distributions in AFM as shown in Figure 3, the first area that Y13 equals 1 is bit line redundant area, the region of true redundancy is had to be second area, X13 equals 1 for wordline redundant area, the region that wordline redundancy equals 1 at X13 is non-uniform Distribution, namely wordline redundancy is only distributed in second area and the various combination of each RA12:9 has 4 wordline redundancies that (RA8:0 of 4 wordline redundancies is 000000000, 000000100, 000001000 and 000001100), 3rd region is without true wordline redundancy, 4th region is main storage area.Due to the non-uniform Distribution of wordline redundancy, software cannot carry out repairing analysis to DRAM.
Repair software to enable redundancy to work on, a kind of new restorative procedure will be used, the method is add dummy word lines redundancy in region i.e. the 3rd region that RA12:9 is not equal to 0001,0010,0011 and 0100, and adding 4 virtual redundancies in the various combination of each RA12:9 makes wordline redundancy be evenly distributed, and these dummy word lines redundancies and true wordline redundancy are used for the making that 1GDRAMbank0 repairs file simultaneously, make for the purpose of DRAM repairing analysis software work to reach.
The pressure crash handling of 1.2 dummy word lines redundancies
DRAM repairing analysis software can be made normally to work by adding dummy word lines redundancy, but because they are not present in real dram chip, once be used, by causing the disabling unit of DRAM to repair, the use of virtual redundancy therefore should be avoided in the test of DRAM.For this phenomenon, by test item new for exploitation one in testing process, the function of this test item lost efficacy in AFM for forcing virtual redundancy, and this test item is positioned at the top of testing process, to ensure that the functional test of chip is not by the impact of virtual redundancy.
1.3 testing authentication
In conjunction with the test item that redundancy is repaired file and forced virtual redundancy to lose efficacy, address as shown in Figure 4 can be obtained, this address is stored in AFM, F, 0, 0, 0, be 8 inefficacies representing whole wordline, 0, 0, 0, X13, be 1 represent this inefficacy and be positioned at redundant word line, 0, Y12, Y11, Y10, the inefficacy of to be 0 representative be bank0, X12, X11, X10, X9, be respectively 0, 5, 6, 7, 8, 9, A, B, C, D, E, F represents inefficacy and is positioned at the 3rd region, in conjunction with each X12, X11, X10, X9, there is X3 respectively, X2, X1, X0, 0, 4, 8, C tetra-kinds combination, mean that the combination of each X12:9 in the 3rd region all introduces 4 wordline redundancies to reach the equally distributed object of wordline redundancy.48 wordline loss of redundancy addresses being recorded in AFM ensure that dummy word lines redundancy is not used in the reparation of 1GDRAMbank0, demonstrate the feasibility being presumptuously uniformly distributed redundant repair method in DRAM further.
Claims (2)
1. the restorative procedure of non-uniform Distribution redundancy in DRAM, is characterized in that: comprise the following steps:
1] DRAM making non-uniform Distribution redundancy repairs file
1.1] in the region without true wordline redundant distributions, add dummy word lines redundancy makes the redundancy in area to be repaired be evenly distributed state;
1.2] the truer wordline redundancy of region in true redundant area adding dummy word lines redundancy in step 1.1 is combined, makes DRAM and repair file;
2] virtual redundancy forces crash handling
After DRAM reparation documenting completes, the dummy word lines redundancy added is processed, virtual redundancy was lost efficacy in step 1.1;
3] reparation of non-uniform Distribution redundancy in DRAM is completed.
2. the restorative procedure of non-uniform Distribution redundancy in a kind of DRAM according to claim 1, is characterized in that: described step 2] in virtual redundancy was lost efficacy process specifically 0 data reading 1 are write relatively or write 1 data reading 0 and compare to dummy word lines redundancy.
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Families Citing this family (4)
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US10067829B2 (en) | 2013-12-13 | 2018-09-04 | Intel Corporation | Managing redundancy information in a non-volatile memory |
CN104575619B (en) * | 2014-12-18 | 2018-01-23 | 西安紫光国芯半导体有限公司 | A kind of restorative procedure of dram chip |
CN106169311B (en) * | 2016-07-06 | 2019-01-15 | 西安紫光国芯半导体有限公司 | The method of fail address is accurately captured in a kind of DRAM wafer test |
CN109741782B (en) * | 2018-12-29 | 2020-10-16 | 西安紫光国芯半导体有限公司 | DRAM (dynamic random Access memory) repairing method |
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CN101630337A (en) * | 2009-07-28 | 2010-01-20 | 浪潮电子信息产业股份有限公司 | Realization method for improving chip yield |
CN102592680A (en) * | 2011-01-12 | 2012-07-18 | 北京兆易创新科技有限公司 | Restoration device and restoration method for storage chip |
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US5270975A (en) * | 1990-03-29 | 1993-12-14 | Texas Instruments Incorporated | Memory device having a non-uniform redundancy decoder arrangement |
US5831913A (en) * | 1997-03-31 | 1998-11-03 | International Business Machines Corporation | Method of making a memory fault-tolerant using a variable size redundancy replacement configuration |
CN101630337A (en) * | 2009-07-28 | 2010-01-20 | 浪潮电子信息产业股份有限公司 | Realization method for improving chip yield |
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Address after: 710055 Shaanxi City, Xi'an province high tech Road No. 38, innovation center, A, block, floor 4 Patentee after: XI'AN UNIIC SEMICONDUCTORS Co.,Ltd. Address before: 710055 Shaanxi City, Xi'an province high tech Road No. 38, innovation center, A, block, floor 4 Patentee before: Xi'an Sinochip Semiconductors Co., Ltd. |