CN103185842B - Circuit for measuring large-scale array device statistical fluctuation - Google Patents
Circuit for measuring large-scale array device statistical fluctuation Download PDFInfo
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- CN103185842B CN103185842B CN201110452057.1A CN201110452057A CN103185842B CN 103185842 B CN103185842 B CN 103185842B CN 201110452057 A CN201110452057 A CN 201110452057A CN 103185842 B CN103185842 B CN 103185842B
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Abstract
The invention discloses a circuit for measuring large-scale array device statistical fluctuation and relates to the technical field of microelectronic semiconductors. The circuit for measuring the large-scale array device statistical fluctuation comprises a device array to be measured, a selected logic module and an electrical parameter measuring module, wherein the selected logic module is used for selecting each unit to be measured in the device array to be measured, and the electrical parameter measuring module is used for measuring the direct current electrical characteristics of all units to be measured in the device array to be measured under different drain electrodes and grid voltages. Due to the fact that the electrical parameter measuring module is arranged, on the premise that the complexity of the circuit is not greatly increased, the function that one device is selected to be measured at a time is achieved. Therefore, the precision of the statistical fluctuation can be improved.
Description
Technical field
The present invention relates to semiconductor microelectronics technical field, particularly a kind of circuit for measuring large-scale array device statistical fluctuation.
Background technology
After the nanoscale of devices scale, " corpuscular property " of a series of nonideal process conditions and material will cause device parameters (as channel length, gate oxide thickness and channel dopant concentration etc.) to depart from its setting value, and this departing from is random, affect the statistic fluctuation (Statistical Variability) of device performance the most at last.Statistic fluctuation has become the significant obstacle of nm CMOS technology and vlsi technology development after 65 nanometer nodes.Typical statistic fluctuation source comprises impurity random fluctuation (Random Dopant Fluctuation), line boundary coarse (Line Edge Roughness) and metal gate work function fluctuation (Work-FunctionVariation) etc.
Statistic fluctuation source is probabilistic often on the impact of device property, therefore the statistic fluctuation studying device must be statistics formula, namely study to as if there is the device group of certain sample size (being usually at least the magnitude of hundred), but not single device.The analogy method of usual Research statistics fluctuation carries out modeling to each statistic fluctuation source, then simulates the device group with certain sample size affected by certain statistical fluctuation source respectively, independently study each fluctuation source to the impact of device property.And Research statistics fluctuation has three difficult points by experiment: the first, the device affected by specific fluctuation source cannot be produced in an experiment.This due to statistic fluctuation source be that intrinsic is non-controlled, cannot produce only by the device that a certain specific fluctuation source affects by Controlling Technology in experiment, therefore the result obtained in experiment is all often the result of all statistic fluctuation sources combined influence, and many times we need their impact difference to come.The second, the impact of the periphery additional device fluctuation that is difficult to forgo.Except the device under test array of some, the additional device of a large amount of peripheral circuit is also had, if expect that the statistic fluctuation characteristic of device under test array must be forgone by special design the impact of statistic fluctuation of additional device in experiment.3rd, be difficult to the fluctuation characteristic measuring large scale array device.This is because the two dimension under conventional circuit structure chooses logic final checked is not often a device, but the device group of a certain row or certain a line, the On current sum of these devices can produce certain pressure drop on interconnection line, and when array scale is larger, this pressure drop will be can not ignore.Although and choose logic once can choose a device by three-dimensional, greatly can increase the complexity of circuit.
Summary of the invention
(1) technical matters that will solve
The technical problem to be solved in the present invention is: how under the prerequisite of complexity increasing circuit not significantly, realizes once choosing a device to measure, to improve the degree of accuracy of statistic fluctuation.
(2) technical scheme
For solving the problems of the technologies described above, the invention provides a kind of circuit for measuring large-scale array device statistical fluctuation, described circuit comprises: device under test array, choose logic module and electrical parameter measurement module for what select each to-be-measured cell in described device under test array
Described electrical parameter measurement module, for measuring the DC electric characteristics of all to-be-measured cells respectively under different drain voltage and grid voltage in described device under test array.
Preferably, described to-be-measured cell comprises: select pipe and treat test tube, described selection pipe and treat that test tube is metal-oxide-semiconductor, with described, the source electrode of described selection pipe treats that the grid of test tube is connected.
Preferably, described electrical parameter measurement module comprises: source electrical parameter measures submodule, grid electrical parameter measures submodule, and electric leakage mathematic(al) parameter measures submodule, described source electrical parameter measures submodule, grid electrical parameter measures submodule, and electric leakage mathematic(al) parameter measurement submodule is formed by electrical parameter measuring unit, each electrical parameter measuring unit is equipped with five ports, described five ports are respectively: Select port, InOut port, ToPad1 port, ToPad2 port, and ToPad3 port, when the signal of Select port is for choosing, InOut port is communicated with ToPad1 port and ToPad2 port respectively, when the signal of Select port is non-choosing, InOut port is communicated with ToPad3 port.
Preferably, it is all identical with the line number of to-be-measured cell in described device under test array with the electrical parameter measuring unit quantity in grid electrical parameter measurement submodule that described source electrical parameter measures submodule, the electrical parameter measuring unit quantity that described electric leakage mathematic(al) parameter is measured in submodule is identical with the columns of to-be-measured cell in described device under test array, the source selection unit of logic module is chosen described in the Select port connection of each electrical parameter measuring unit in described source electrical parameter measurement submodule, InOut port connects in described device under test array with the to-be-measured cell of its corresponding row treats the source electrode of test tube, ToPad1 port connects source Drive interface, ToPad2 port connects source Sense interface, ToPad3 port connects source sink interface, the leakage selection unit of logic module is chosen described in the Select port connection of each electrical parameter measuring unit in described electric leakage mathematic(al) parameter measurement submodule, InOut port connects in described device under test array with the to-be-measured cell of its respective column treats the drain electrode of test tube, ToPad1 port connects leakage Drive interface, ToPad2 port connects leakage Sense interface, ToPad3 port connects leakage Clamp interface, the source selection unit of logic module is chosen described in the Select port connection of each electrical parameter measuring unit in described grid electrical parameter measurement submodule, InOut port connects in described device under test array with the to-be-measured cell of its corresponding row selects the drain electrode of pipe, ToPad1 port connects grid Drive interface, ToPad2 port connects grid Sense interface, ToPad3 port connects grid Clamp interface, in described device under test array, the grid of the selection pipe of the array element of each row is all connected with choosing the leakage selection unit of logic module described in these row.
Preferably, described electrical parameter measuring unit is formed by two transmission gates, a phase inverter and a metal-oxide-semiconductor.
Preferably, the drain electrode Leakage Current of described selection pipe is less than the gate leakage currents treating test tube.
Preferably, the grid voltage of described selection pipe is more than or equal to the threshold voltage of described selection pipe and the described gate drive voltage sum treating test tube.
(3) beneficial effect
The present invention, by arranging electrical parameter measurement module, achieves under the prerequisite of the complexity increasing circuit not significantly, once chooses a device to measure, to improve the degree of accuracy of statistic fluctuation.
Accompanying drawing explanation
Fig. 1 is the concrete structure schematic diagram of the circuit for measuring large-scale array device statistical fluctuation according to one embodiment of the present invention;
Fig. 2 is the enlarged diagram of to-be-measured cell in the circuit shown in Fig. 1;
Fig. 3 is the port schematic diagram of electrical parameter measuring unit in the circuit shown in Fig. 1;
Fig. 4 is the structural representation of the electrical parameter measuring unit inside shown in Fig. 3;
Fig. 5 is the circuit connection diagram of the circuit shown in Fig. 1 when measuring.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples for illustration of the present invention, but are not used for limiting the scope of the invention.
Fig. 1 is the concrete structure schematic diagram of the circuit for measuring large-scale array device statistical fluctuation according to one embodiment of the present invention, with reference to Fig. 1, the circuit of present embodiment comprises: device under test array, choose logic module and electrical parameter measurement module for what select each to-be-measured cell in described device under test array
Described electrical parameter measurement module, for measuring the DC electric characteristics of all to-be-measured cells respectively under different drain voltage and grid voltage in described device under test array.
Fig. 2 is the enlarged diagram of to-be-measured cell in the circuit shown in Fig. 1; With reference to Fig. 2, preferably, described to-be-measured cell 1 comprises: select pipe 1-2 and treat test tube 1-1, described selection pipe 1-2 and treat that test tube 1-1 is metal-oxide-semiconductor, with described, the source electrode of described selection pipe 1-2 treats that the grid of test tube 1-1 is connected.
With reference to Fig. 1, preferably, described electrical parameter measurement module comprises: source electrical parameter measures submodule 2, grid electrical parameter measures submodule 3, and electric leakage mathematic(al) parameter measures submodule 4, described source electrical parameter measures submodule 2, grid electrical parameter measures submodule 3, and electric leakage mathematic(al) parameter measurement submodule 4 is formed by electrical parameter measuring unit, with reference to Fig. 3, each electrical parameter measuring unit is equipped with five ports, described five ports are respectively: Select port, InOut port, ToPad1 port, ToPad2 port, and ToPad3 port, when the signal of Select port is for choosing, InOut port is communicated with ToPad1 port and ToPad2 port respectively, when the signal of Select port is non-choosing, InOut port is communicated with ToPad3 port, with reference to Fig. 4, preferably, described electrical parameter measuring unit is formed by two transmission gates, a phase inverter and a metal-oxide-semiconductor.
With reference to Fig. 1, preferably, it is all identical with the line number of to-be-measured cell 1 in described device under test array with the electrical parameter measuring unit quantity in grid electrical parameter measurement submodule 3 that described source electrical parameter measures submodule 2, the electrical parameter measuring unit quantity that described electric leakage mathematic(al) parameter is measured in submodule 4 is identical with the columns of to-be-measured cell 1 in described device under test array, the source selection unit 5 of logic module is chosen described in the Select port connection of each electrical parameter measuring unit in described source electrical parameter measurement submodule 2, InOut port connects in described device under test array with the to-be-measured cell 1 of its corresponding row treats the source electrode of test tube 1-1, ToPad1 port connects source Drive interface 2-2, ToPad2 port connects source Sense interface 2-1, ToPad3 port connects source sink interface 2-3, the leakage selection unit 6 of logic module is chosen described in the Select port connection of each electrical parameter measuring unit in described electric leakage mathematic(al) parameter measurement submodule 4, InOut port connects in described device under test array with the to-be-measured cell 1 of its respective column treats the drain electrode of test tube 1-1, ToPad1 port connects leakage Drive interface 4-1, ToPad2 port connects leakage Sense interface 4-2, ToPad3 port connects leakage Clamp interface 4-3, the source selection unit 5 of logic module is chosen described in the Select port connection of each electrical parameter measuring unit in described grid electrical parameter measurement submodule 3, InOut port connects in described device under test array with the to-be-measured cell 1 of its corresponding row selects the drain electrode of pipe 1-1, ToPad1 port connects grid Drive interface 3-1, ToPad2 port connects grid Sense interface 3-2, ToPad3 port connects grid Clamp interface 3-3, in described device under test array, the grid of the selection pipe 1-2 of the array element of each row is all connected with choosing the leakage selection unit 6 of logic module described in these row.
When needs choose one until test tube 1-1 time, the signal of the leakage selection unit corresponding to it and source selection unit is all set to effectively, grid is identical with the signal leaking selection unit, so just makes to choose three ends (source electrode, drain and gate) treating test tube to be connected to corresponding Drive Pad respectively by electrical parameter test circuit (source electrode and drain electrode) and selection pipe (grid); The drain terminal of the non-selection pipe choosing device under test array corresponding of same row is connected to grid Clamp interface simultaneously, makes the grid end of these devices be connected to low level by the selection pipe 1-2 of conducting, thus these non-to-be-measured cells of choosing are all non-conduction.So just achieve once only choose to treat a test tube by the selected signal (namely leaking the signal of selection unit and source selection unit) of two dimension.
Simultaneously, this circuit structure for all device under test arrays source electrode and drain electrode be all equivalent symmetrical, therefore can realize source and drain reversion to measure, this cannot realize in traditional architectures, the meaning of this measuring method is that anti-survey can as the index reflecting impurity random fluctuation with the difference just surveying result, the method achieving research magazine random fluctuation impact separately in an experiment be therefore difficult to.
In order to get rid of the impact of Substrate bias, the substrate of all to-be-measured cells must be connected to fixed level, as ground connection.
In order to avoid non-choose the selection pipe 1-2 not conducting of to-be-measured cell 1 time to treat the grid end stored charge (circuit function may be caused to lose efficacy) of test tube 1-1 in correspondence, preferably, the drain electrode Leakage Current of described selection pipe 1-2 is less than the gate leakage currents treating test tube 1-1.
In order to ensure to select pipe 1-2 can transmit sufficiently high grid driving voltage V
g_apply(treating the grid voltage that test tube 1-1 applies), selects the grid end institute making alive V of pipe 1-2
g_additional(i.e. the voltage of selected signal) should at least high than the highest required grid driving voltage one select the threshold voltage V of pipe
tH_additional(V
g_additional>=V
g_apply+ V
tH_additional), preferably, the grid voltage of described selection pipe is more than or equal to the threshold voltage of described selection pipe and the described gate drive voltage sum treating test tube.
The principle of work of the circuit of present embodiment is: with reference to Fig. 5, after the Sense interface 2-1 of source, connect voltage table measurement choose the source voltage terminal treating test tube, in source, Drive interface 2-2 flows through the electric current chosen and treat test tube by reometer earthmeter, non-chooses the leakage current treating test tube source Sink interface 2-3 ground connection to guide other; Connect voltage table measurement at leakage Sense interface 4-2 and choose the drain terminal voltage treating test tube, connect adjustable leakage driving voltage at leakage Drive interface 4-1 to control to choose the actual drain voltage treating test tube, treat test tube there is larger leakage pressure leakage Clamp interface 4-3 ground connection to avoid non-choosing; Grid Sense interface 3-2 connects voltage table measurement and chooses the actual grid voltage treating test tube, grid Drive interface 3-1 connects adjustable gate drive voltage and controls the actual grid voltage that this treats test tube, connect adjustable voltage at grid Clamp interface 3-3 and make the non-grid of device under test array of choosing induce drain terminal leakage (GIDL) electric current minimum.So just allly in pair array can treat that test tube realizes different DC electric characteristics measurement of leaking under pressure and grid voltage respectively.According to measure obtain each treat test tube difference leak pressure I
d-V
gfamily curve, we can extract the threshold voltage, sub-threshold slope, the DIBL (leak induced barrier and reduce effect parameter) and I that obtain this device
on, I
offdeng electrology characteristic parameter; By the corresponding electrology characteristic parameter of devices all in statistical study array, the statistic fluctuation characteristic that this technique prepares device can be obtained.
Reverse measurement specific practice is measured with forward, just original drain electrode three interfaces (namely leak Drive interface, leak Sense interface and leak Clamp interface) that are applied to are added in source (i.e. source Drive interface, source Sense interface and source sink interface, described source Drive interface, source Sense interface and source sink interface are corresponding in turn to Lou Drive interface, leakage Sense interface and leakage Clamp interface), originally be applied to source electrode three interfaces and be added in drain terminal, the connection of each interface as shown in Figure 5.
Above embodiment is only for illustration of the present invention; and be not limitation of the present invention; the those of ordinary skill of relevant technical field; without departing from the spirit and scope of the present invention; can also make a variety of changes and modification; therefore all equivalent technical schemes also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.
Claims (5)
1. for measuring a circuit for large-scale array device statistical fluctuation, it is characterized in that, described circuit comprises: device under test array, choose logic module and electrical parameter measurement module for what select each to-be-measured cell in described device under test array,
Described electrical parameter measurement module, for measuring the DC electric characteristics of all to-be-measured cells respectively under different drain voltage and grid voltage in described device under test array;
Described electrical parameter measurement module comprises: source electrical parameter measures submodule, grid electrical parameter measures submodule, and electric leakage mathematic(al) parameter measures submodule, described source electrical parameter measures submodule, grid electrical parameter measures submodule, and electric leakage mathematic(al) parameter measurement submodule is formed by electrical parameter measuring unit, each electrical parameter measuring unit is equipped with five ports, described five ports are respectively: Select port, InOut port, ToPad1 port, ToPad2 port, and ToPad3 port, when the signal of Select port is for choosing, InOut port is communicated with ToPad1 port and ToPad2 port respectively, when the signal of Select port is non-choosing, InOut port is communicated with ToPad3 port,
It is all identical with the line number of to-be-measured cell in described device under test array with the electrical parameter measuring unit quantity in grid electrical parameter measurement submodule that described source electrical parameter measures submodule, the electrical parameter measuring unit quantity that described electric leakage mathematic(al) parameter is measured in submodule is identical with the columns of to-be-measured cell in described device under test array, the source selection unit of logic module is chosen described in the Select port connection of each electrical parameter measuring unit in described source electrical parameter measurement submodule, InOut port connects in described device under test array with the to-be-measured cell of its corresponding row treats the source electrode of test tube, ToPad1 port connects source Drive interface, ToPad2 port connects source Sense interface, ToPad3 port connects source sink interface, the leakage selection unit of logic module is chosen described in the Select port connection of each electrical parameter measuring unit in described electric leakage mathematic(al) parameter measurement submodule, InOut port connects in described device under test array with the to-be-measured cell of its respective column treats the drain electrode of test tube, ToPad1 port connects leakage Drive interface, ToPad2 port connects leakage Sense interface, ToPad3 port connects leakage Clamp interface, the source selection unit of logic module is chosen described in the Select port connection of each electrical parameter measuring unit in described grid electrical parameter measurement submodule, InOut port connects in described device under test array with the to-be-measured cell of its corresponding row selects the drain electrode of pipe, ToPad1 port connects grid Drive interface, ToPad2 port connects grid Sense interface, ToPad3 port connects grid Clamp interface, in described device under test array, the grid of the selection pipe of the array element of each row is all connected with choosing the leakage selection unit of logic module described in these row.
2. circuit as claimed in claim 1, it is characterized in that, described to-be-measured cell comprises: select pipe and treat test tube, described selection pipe and treat that test tube is metal-oxide-semiconductor, with described, the source electrode of described selection pipe treats that the grid of test tube is connected.
3. circuit as claimed in claim 1, is characterized in that, described electrical parameter measuring unit is formed by two transmission gates, a phase inverter and a metal-oxide-semiconductor.
4. circuit as claimed in claim 2 or claim 3, it is characterized in that, the drain electrode Leakage Current of described selection pipe is less than the gate leakage currents treating test tube.
5. circuit as claimed in claim 2 or claim 3, it is characterized in that, the grid voltage of described selection pipe is more than or equal to the threshold voltage of described selection pipe and the described gate drive voltage sum treating test tube.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1627801A (en) * | 2003-12-12 | 2005-06-15 | 北京大学 | Focal plane array read out circuit and read out method |
| CN1790109A (en) * | 2004-12-09 | 2006-06-21 | 安捷伦科技公司 | Method and apparatus for inspecting array substrate |
| CN101776730A (en) * | 2010-01-29 | 2010-07-14 | 西安交通大学 | Test graphic generator of integrated circuit and test method thereof |
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| JP2006053439A (en) * | 2004-08-13 | 2006-02-23 | Agilent Technol Inc | Method and device to test tft array |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1627801A (en) * | 2003-12-12 | 2005-06-15 | 北京大学 | Focal plane array read out circuit and read out method |
| CN1790109A (en) * | 2004-12-09 | 2006-06-21 | 安捷伦科技公司 | Method and apparatus for inspecting array substrate |
| CN101776730A (en) * | 2010-01-29 | 2010-07-14 | 西安交通大学 | Test graphic generator of integrated circuit and test method thereof |
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