CN103145094A - Micro machining method for bulk silicon for forming cavity structure of MEMS (micro-electromechanical systems) thermopile detector - Google Patents

Micro machining method for bulk silicon for forming cavity structure of MEMS (micro-electromechanical systems) thermopile detector Download PDF

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CN103145094A
CN103145094A CN2013100909486A CN201310090948A CN103145094A CN 103145094 A CN103145094 A CN 103145094A CN 2013100909486 A CN2013100909486 A CN 2013100909486A CN 201310090948 A CN201310090948 A CN 201310090948A CN 103145094 A CN103145094 A CN 103145094A
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silicon
corrosion
cavity
etching
layer
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CN103145094B (en
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孟如男
王玮冰
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China core Microelectronics Technology Chengdu Co.,Ltd.
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Jiangsu IoT Research and Development Center
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Abstract

The invention provides a micro machining method for bulk silicon for forming a cavity structure of an MEMS (micro-electromechanical systems) thermopile detector. The method comprises the following steps of: providing a silicon substrate, growing a silica membrane on the silicon substrate in a thermal oxidation manner, and forming a thermopile area and an infrared absorption area on the silica membrane. A thermal nodal area is arranged at one end of the thermopile area, close to the infrared absorption area, and a cold nodal area is arranged at the other end of the thermopile area, far away from the infrared absorption area. A silicon nitride and silica compound membrane structure is deposited on a thermopile structure layer, and a corrosion opening is formed in a compound membrane through photoetching. A release channel of the thermopile structure is formed by the corrosion opening. Through the release channel, a superficial layer on the surface of the bulk silicon is corroded by using an isotropy corrosion method so as to form a thin cavity of the superficial layer of the bulk silicon, and a bulk silicon deep layer below the thin cavity is corroded by using an anisotropy corrosion method so as to form a regular smooth ladder-shaped cavity structure, and therefore, the cavity structure in the bulk silicon is finally formed. The cavity structure formed by using the method has a regular and smooth inner surface and is good in structure symmetry.

Description

Form the body silicon micro-processing method of MEMS thermopile detector cavity structure
Technical field
The present invention relates to a kind of body silicon micromachining technology of the MEMS of formation cavity structure, be specially adapted to the manufacturing of thermopile IR detector.
Background technology
Infrared Detectors is one of element of most critical in infrared system.Thermopile IR detector is a kind of non-refrigeration type Infrared Detectors that early develops.Its operation principle is based on Seebeck effect, and namely two kinds of different electric conductors or semi-conducting material temperature contrast cause producing between bi-material voltage difference.To have a volume little due to thermopile IR detector, can work under room temperature, and the response of wide range infra-red radiation can detect constant amount of radiation, and the advantage such as preparation cost is low, is widely used at aspects such as security monitoring, therapeutic treatment, life detections.
At present, the thermoelectric pile structure generally adopts membrane structure, to play good effect of heat insulation.Adopt the thermopile IR detector of MEMS fabrication techniques adopt to corrode from silicon chip back side form full membrane structure, the method needs front-back two-sided aligning exposure, and poor with the processing compatibility of semiconductor foundry factory.In addition, the method adopts wet etching usually, can produce chip size and reach greatly the high shortcoming of manufacturing cost.At present a lot of people have adopted the process compatible with CMOS, discharge the manufacturing process of thermopile detector support membrane from front side of silicon wafer, the method is generally at film surface photoetching corrosion opening, forms thermoelectric pile structure release channel, adopts at last isotropic etch technique releasing heat electric pile structure.The defective of the method is that the side direction undercutting is uncontrollable, and the smooth interior surfaces degree is low, reduces the thermoelectric pile structural symmetry.
Summary of the invention
The objective of the invention is to overcome the deficiencies in the prior art, a kind of body silicon micro-processing method of the MEMS of formation thermopile detector cavity structure is provided, the cavity structure inner surface rule of formation is smooth, and structural symmetry is good, and technique realizes that controllability is high.The technical solution used in the present invention is:
Step 101 provides silicon base, at the front of silicon base thermal oxide growth silicon dioxide film;
Step 102 forms thermoelectric pile zone and INFRARED ABSORPTION district by deposit, photoetching, etching on silicon dioxide film;
Step 103, deposit structure of composite membrane in silicon dioxide film, thermoelectric pile zone and INFRARED ABSORPTION district; The upper strata of structure of composite membrane is Si 3N 4Passivation layer, lower floor is silicon dioxide layer of protection;
Step 104 is at Si 3N 4Passivation layer surface spin coating photoresist, and form the photoresist opening figure on photoresist by photoetching process, namely corrode opening; Then utilize the material of RIE technology etching corrosion opening below, until reach silicon base, to form the release channel of thermoelectric pile structure;
Step 105 by release channel, adopts isotropic etch method corrosion body silicon face shallow-layer, with the slim cavity of organizator silicon shallow-layer;
Step 106 by release channel and slim cavity, adopts the body silicon deep layer of the slim cavity of anisotropy rot etching method corrosion below, the ladder cavity structure that formation rule is level and smooth.
Advantage of the present invention: the two etching process releasing heat pile detector cavitys that adopt isotropic etch to combine with anisotropic corrosion technique, make the thermopile detector symmetrical configuration, the manufacture process controllability is high, and manufacturability is strong and traditional cmos process is compatible.
Description of drawings
Fig. 1 is the schematic diagram after the present invention forms silicon dioxide film.
Fig. 2 is the schematic diagram after the present invention forms thermoelectric pile zone and INFRARED ABSORPTION district.
Fig. 3 is the schematic diagram after deposit structure of composite membrane of the present invention.
Fig. 4 is the schematic diagram after the present invention forms release channel.
Fig. 5 is the schematic diagram after the present invention forms slim cavity.
Fig. 6 is the schematic diagram after the present invention forms the ladder cavity structure.
The specific embodiment
The invention will be further described below in conjunction with concrete drawings and Examples.
The infrared thermopile detector structure with cavity structure that the present invention proposes as shown in Figure 6, thermal oxide growth silica (SiO2) film 2 on silicon base 1, form thermoelectric pile zone 3 and INFRARED ABSORPTION district 4 on silicon dioxide film 2, wherein the thermoelectric pile structure can take various ways as circle, rectangle etc.Being thermojunction district 31 near the end in INFRARED ABSORPTION district 4 on thermoelectric pile zone 3, is cold junction district 32 away from the other end in INFRARED ABSORPTION district 4.Deposit silicon nitride and silica structure of composite membrane 5 on the thermoelectric pile structure sheaf, photoetching corrosion opening 6 on composite membrane.Form the release channel 61 of thermoelectric pile structure by corrosion window 6, discharge silicon base and form cavity 7, the slim cavity 71 of the body silicon shallow-layer that its cavity 7 is formed by isotropic etch technique and the ladder cavity structure 72 of the body silicon deep layer that the anisotropy rot etching technique forms form.The concrete grammar process is as described below.
Step 101 provides silicon base 1, at the front of silicon base 1 thermal oxide growth silica (SiO 2) film 2; Specifically as shown in Figure 1, the silicon base 1 that adopts can be a kind of at the doped silicon based end of the single silicon base of twin polishing, the doped silicon based end of P type or N-type.This example adopts the single silicon base of twin polishing.In the front of silicon base 1 by the mode of the dry-oxygen oxidation silica (SiO that grows 2) film 2, the thickness of this silicon dioxide film 2 is 5000, and during dry-oxygen oxidation, temperature is 950 ℃, and the content of oxygen is 60%.
Step 102 forms thermoelectric pile zone 3 and INFRARED ABSORPTION district 4 by deposit, photoetching, etching on silicon dioxide film 2;
As shown in Figure 2, be thermojunction district 31 near the end in INFRARED ABSORPTION district 4 on thermoelectric pile zone 3, be cold junction district 32 away from the other end in INFRARED ABSORPTION district 4, the thermoelectric pile composition material can be polysilicon/metal, doped silicon/aluminium, N-type polysilicon/P type polysilicon etc. and CMOS process compatible material.The processing step that forms thermoelectric pile zone 3 and INFRARED ABSORPTION district 4 is the common technique means of this area, and is not the emphasis of this method, does not deeply launch for its detailed technical process at this.The process that focuses on the cavity structure in organizator silicon of the present invention.
Step 103, deposit structure of composite membrane 5 on silicon dioxide film 2, thermoelectric pile zone 3 and INFRARED ABSORPTION zone 4; The upper strata of structure of composite membrane 5 is Si 3N 4Passivation layer, lower floor is silicon dioxide layer of protection;
Specifically as shown in Figure 3, on silicon dioxide film 2, thermoelectric pile zone 3 and INFRARED ABSORPTION zone 4 first by LPCVD technology growth diaphragm material SiO 2, thickness is 4000, to form silicon dioxide layer of protection; Then by LPCVD technology growth passivation material Si 3N 4, thickness is 4000, to form Si 3N 4Passivation layer.During LPCVD technology growth structure of composite membrane 5, the work furnace tube temperature is 800 ℃, and pressure is 200mTorr, deposition rate 10 ~ 20nm/min.
Step 104 is at Si 3N 4Passivation layer surface spin coating photoresist, and form the photoresist opening figure on photoresist by photoetching process, namely corrode opening 6; Then utilize the RIE(reactive ion etching) material of technology etching corrosion opening 6 belows, until reach silicon base 1, to form the release channel 61 of thermoelectric pile structure;
Specifically as shown in Figure 4, at Si 3N 4Then passivation layer surface spin coating photoresist produces the Si of the correspondence of release channel at needs 3N 4The passivation layer surface position forms the photoresist opening figure on photoresist by photoetching process, namely corrode opening 6; Utilize the material of RIE technology etching corrosion opening 6 belows, positions (to comprise Si 3N 4Material in passivation layer, silicon dioxide layer of protection, silicon dioxide film 2), until reach silicon base 1, to form the release channel 61 of thermoelectric pile structure.Utilize at last the oxygen plasma dry method to remove photoresist and remove Si with the remove photoresist method that combines of sulfuric acid/hydrogen peroxide wet method 3N 4The photoresist of passivation layer surface.RF power during above-mentioned RIE etching is 150W, and chamber pressure is 400mTorr, and etching gas is CHF3, He, SF6 mist, and corresponding flow is 7/100/30sccm.Release channel 61 diameters that form are 14um.Distance between each release channel is 15um.
Step 105 by release channel 61, adopts the surperficial shallow-layer of isotropic etch method corrosion body silicon (being silicon base 1), with the slim cavity 71 of organizator silicon shallow-layer;
Specifically as shown in Figure 5, etchant gas or the liquid release channel 61 corrosion body silicon face shallow-layers that can form in step 104 are to form slim cavity 71.This example adopts XeF 2The body silicon face shallow-layer of gas dry etching technology isotropic etch thermoelectric pile zone 3 and 4 belows, INFRARED ABSORPTION district, in step 101, the silica of thermal oxide growth (SiO2) film 2 plays the effect that stops corrosion in the process of corrosion releaser silicon, thereby forms slim cavity 71.Adopt XeF 2The gas dry etching is due to XeF 2It is selectively good to corrode, hardly silica (SiO2) film 2 of thermal oxide growth in corrosion step 101.XeF 2The gas dry etching can be at XeF 2Carry out in etching machine, the etch chamber internal pressure is 533Pa, carries out two etching cycles, each cycle 20s.
Step 106 by release channel 61 and slim cavity 71, adopts the body silicon deep layer of the anisotropy rot etching method slim cavity of corrosion 71 belows, the ladder cavity structure 72 that formation rule is level and smooth;
Specifically as shown in Figure 6, during anisotropic etch, the slim cavity 71 corrosion deep layer body silicon of corrosive liquid by forming in step 105 form ladder cavity structure 72.In step 101, the silica of thermal oxide growth (SiO2) film 2 plays the effect that stops corrosion in the process of corrosion releaser silicon.Anisotropic etch solution adopts potassium hydroxide (KOH) solution or TMAH corrosive liquid.When adopting potassium hydroxide (KOH) corrosive liquid, potassium hydroxide (KOH), isopropyl acetone (IPA), water (H 2O) weight proportion is 23.4%:13.3%:63.3%, 80 ℃ of corrosion temperatures.When adopting TMAH corrosive liquid (TMAH water), in the TMAH corrosive liquid, the TMAH molar concentration is 22%, 90 ℃ of corrosion temperatures.Two kinds of etchant solutions all have higher selective, and for the thermoelectric pile structure that the present invention relates to, two kinds of corrosive liquids all can the level and smooth ladder cavities of formation rule.The ladder cavity structure 72 inner surface rules that adopt the anisotropic etch method to form are smooth, and structural symmetry is good, and its physical dimension can accurately be controlled according to designing requirement, and technique realizes that controllability is high.
In sum, the present invention is directed to existing back side etching process etching time long, to the demanding shortcoming of device corrosion resistance, well-designed positive perforate etching process releasing structure layer shortens etching time, improves yield rate.Uncontrollable for the undercutting of existing isotropic etch technique side direction, corrosion structure smooth interior surfaces degree is low, the shortcomings such as symmetry is poor, the two etching process releasing heat pile detector cavitys that adopt isotropic etch to combine with anisotropic corrosion technique, manufacture process is simple, cavity structure can accurately be controlled according to designing requirement, and technique realizes that controllability is high.The thermopile detector symmetrical configuration that adopts the method to make, excellent performance, manufacturability is strong, and compatible with traditional cmos process, is easy to realize the integrated of sensor and subsequent readout circuit.

Claims (3)

1. body silicon micro-processing method that forms MEMS thermopile detector cavity structure comprises:
Step 101 provides silicon base (1), at the front of silicon base (1) thermal oxide growth silicon dioxide film (2);
Step 102 forms thermoelectric pile regional (3) and INFRARED ABSORPTION district (4) by deposit, photoetching, etching silicon dioxide film (2) is upper;
It is characterized in that, after step 102, also comprise the steps:
Step 103 is at the upper deposit structure of composite membrane (5) in silicon dioxide film (2), thermoelectric pile zone (3) and INFRARED ABSORPTION district (4); The upper strata of structure of composite membrane (5) is Si 3N 4Passivation layer, lower floor is silicon dioxide layer of protection;
Step 104 is at Si 3N 4Passivation layer surface spin coating photoresist, and form the photoresist opening figure on photoresist by photoetching process, namely corrode opening (6); Then utilize the material of RIE technology etching corrosion opening (6) below, until reach silicon base (1), to form the release channel (61) of thermoelectric pile structure;
Step 105 by release channel (61), adopts isotropic etch method corrosion body silicon face shallow-layer, with the slim cavity (71) of organizator silicon shallow-layer;
Step 106 by release channel (61) and slim cavity (71), adopts the body silicon deep layer of the anisotropy rot etching method slim cavity of corrosion (71) below, the ladder cavity structure (72) that formation rule is level and smooth.
2. the body silicon micro-processing method of formation as claimed in claim 1 MEMS thermopile detector cavity structure is characterized in that:
In described step 105, when adopting isotropic etch method corrosion body silicon face shallow-layer, the method for employing is XeF 2Gas dry etching technology isotropic etch method, the etchant gas of employing is XeF 2Gas, XeF 2Gas is dry-etched in XeF 2Carry out in etching machine, the etch chamber internal pressure is 533Pa, carries out two etching cycles, each cycle 20s.
3. the body silicon micro-processing method of formation as claimed in claim 1 MEMS thermopile detector cavity structure is characterized in that:
In described step 106, when adopting the body silicon deep layer of the anisotropy rot etching method slim cavity of corrosion (71) below, the corrosive liquid that adopts is the potassium hydroxide corrosive liquid, and potassium hydroxide, isopropyl acetone, water weight proportion are 23.4%:13.3%:63.3%, 80 ℃ of corrosion temperatures; The corrosive liquid that perhaps adopts is the TMAH corrosive liquid, and in the TMAH corrosive liquid, the TMAH molar concentration is 22%, 90 ℃ of corrosion temperatures.
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CN103342333A (en) * 2013-07-09 2013-10-09 江苏物联网研究发展中心 Infrared thermopile type sensor based on CMOS DPTM process and manufacturing method thereof
CN103342332A (en) * 2013-07-08 2013-10-09 江苏物联网研究发展中心 Integrated thermopile infrared detection system based on CMOS process and manufacturing method thereof
CN103449358A (en) * 2013-08-27 2013-12-18 上海先进半导体制造股份有限公司 Manufacturing method of closed cavity of micro-electromechanical system (MEMS)
CN112707365A (en) * 2020-12-30 2021-04-27 四川广义微电子股份有限公司 MEMS thermopile chip device structure and preparation method thereof
CN113588159A (en) * 2021-08-23 2021-11-02 青岛芯笙微纳电子科技有限公司 Wide-range MEMS vacuum gauge and manufacturing method thereof

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CN113588159A (en) * 2021-08-23 2021-11-02 青岛芯笙微纳电子科技有限公司 Wide-range MEMS vacuum gauge and manufacturing method thereof

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