CN103107159A - Programmable polycrystalline silicon fuse device structure and realizing method of technology of programmable polycrystalline silicon fuse device structure - Google Patents
Programmable polycrystalline silicon fuse device structure and realizing method of technology of programmable polycrystalline silicon fuse device structure Download PDFInfo
- Publication number
- CN103107159A CN103107159A CN2011103556754A CN201110355675A CN103107159A CN 103107159 A CN103107159 A CN 103107159A CN 2011103556754 A CN2011103556754 A CN 2011103556754A CN 201110355675 A CN201110355675 A CN 201110355675A CN 103107159 A CN103107159 A CN 103107159A
- Authority
- CN
- China
- Prior art keywords
- polysilicon
- type
- resistance
- polycrystalline silicon
- high value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses a programmable polycrystalline silicon fuse device structure and a realizing method of the technology of the programmable polycrystalline silicon fuse device structure. The programmable polycrystalline silicon fuse device structure comprises an N type high-resistance polycrystalline silicon resistor, a P type high-resistance polycrystalline silicon resistor an NP diode, a negative electrode contact end and a positive electrode contact end. The method comprises the steps that an oxide layer field area is formed on a P type substrate, a polycrystalline silicon area is formed on the oxide layer field area, P type polycrystalline silicon is formed on one side of the polycrystalline silicon area and N type polycrystalline silicon is formed on the other side of the polycrystalline silicon area, the NP diode is formed in a junction position of the N type polycrystalline silicon and the P type polycrystalline silicon, silicon oxide or silicon nitride is produced in a P,N type high-resistance polycrystalline silicon resistor area to prevent formation of metal silicide, the metal silicide is formed in a P type low-resistance polycrystalline silicon resistor area on the polycrystalline silicon and in an type type low-resistance polycrystalline silicon resistor area on the polycrystalline silicon, a through hole is formed, metal wire connection is achieved, and the negative electrode end and the positive electrode end of a polycrystalline silicon fuse device are led out. The programmable polycrystalline silicon fuse device structure and the realizing method of the technology of the programmable polycrystalline silicon fuse device structure can be applied to various technologies, reliability is guaranteed, the yield of a device is well guaranteed.
Description
Technical field
The present invention relates to a kind of polysilicon fuse device, particularly relate to a kind of programmable polysilicon fuse device architecture with and process implementation method.
Background technology
The polysilicon fuse device is widely used in integrated circuit, plays various functions.As adjusting the memory cell of redundancy in static random access memory (SRAM), to improve the product yield of static random access memory, the frequency of regulating crystal oscillator, specific application choice input/output interface of meeting etc.
Traditional polysilicon fuse device needs the higher program voltage polysilicon that could physically fuse, with the function that realizes that device resistance changes before and after programming.Traditional polysilicon fuse device as shown in Figure 1, then during device programming, larger electric current flows through the fuse part timesharing, the huge heat of generation can be with fuse failure, can produce very large heat in this process, and having simultaneously unnecessary polysilicon can separate out.These characteristics have determined can not place other any device in one section more space around the polysilicon fuse device, in order to avoid these devices are affected in polysilicon fuse device programming process.These characteristics have determined that the integrated level of polysilicon fuse device is very low, and this comprises that two distances between the polysilicon fuse device are larger, and other device is also larger from the distance of polysilicon fuse device.
Development along with technology, the live width of semiconductor device becomes less, it is very high that the integrated level of device becomes, the shortcoming of the low integrated level of traditional polysilicon fuse device seem more obviously, below 0.25 μ m technique, by the replacement gradually of metal fuse device, but the required high laser cutting machine of metal fuse device allows the cost of this device application improve many.In addition, the high programming voltage of traditional polysilicon fuse device is also can not provide on advanced technologies.
Summary of the invention
The technical problem to be solved in the present invention be to provide a kind of programmable polysilicon fuse device architecture with and process implementation method, structure of the present invention makes the program voltage of this device greatly about the 3.5V left and right, and lower program voltage and operating voltage make this device to be applied on kinds of processes.In addition, owing to there is no to need the physically part of fusing, the yield of this device reliability and device is guaranteed.
For solving the problems of the technologies described above, programmable polysilicon fuse device architecture of the present invention comprises: the polysilicon resistance of the high value of N-type, the polysilicon resistance of the high value of P type, NP diode, negative electrode contact jaw, anode contact jaw; Wherein, the NP diode is formed on the interface of polysilicon resistance of high value of N, P type, and the cathode and anode contact jaw polysilicon resistance of the high value of polysilicon resistance, the P type of the high value by N-type respectively connects.
The polysilicon resistance of the high value of described P type is comprised of polysilicon and p type impurity injection, and its resistance is at 2～3Kohm.
The polysilicon resistance of the high value of described N-type is comprised of polysilicon and N-type Impurity injection, and its resistance is at 2～3Kohm.
Described negative electrode contact jaw is comprised of polysilicon resistance, contact hole and the plain conductor of the low resistance of N-type, and its resistance is at 10～20ohm; Wherein, in the polysilicon resistance of the low resistance of N-type, metal silicide is arranged on polysilicon.
Described anode contact jaw is comprised of polysilicon resistance, contact hole and the plain conductor of the low resistance of P type, and its resistance is at 10～20ohm; Wherein, in the polysilicon resistance of the low resistance of P type, metal silicide is arranged on polysilicon.
In addition, the present invention also provides a kind of process implementation method of programmable polysilicon fuse device, comprises step:
(1) oxidation generation oxide layer place on P type substrate;
(2) on the oxide layer place, generate polysilicon region;
(3) side of polysilicon region is utilized ion implantation technology to inject p type impurity and is formed P type polysilicon, utilizes ion implantation technology to inject N-type impurity at opposite side and forms the N-type polysilicon, form the NP diode at N, P type intersection;
(4) in the polysilicon resistance district of the high value of the polysilicon resistance district of the high value of P type and N-type, utilize CVD (chemical vapour deposition (CVD)) to produce silica or silicon nitride, to stop the formation of metal silicide;
(5) utilize metal silicide technology, polysilicon resistance district's formation layer of metal silicide of the polysilicon resistance district of the low resistance of the P type on polysilicon and the low resistance of N-type;
(6) utilize via process and back-end metal processes to form through hole and metal connecting line, complete the negative electrode contact jaw of polysilicon fuse device and drawing of anode contact jaw.
In described step (1), (2), the thickness of oxide layer place and polysilicon region is all 0.2～0.3 μ m.
In described step (3), inject p type impurity and form P type polysilicon, its implantation concentration is 1 * 10
13cm
-2～8 * 10
13cm
-2Inject N-type impurity and form the N-type polysilicon, its implantation concentration is 1 * 10
13cm
-2～8 * 10
13cm
-2
In described step (4), inject p type impurity and there is no the place of metal silicide, form the high value polysilicon resistance district of P type; Inject N-type impurity and there is no the place of metal silicide, form the high value polysilicon resistance district of N-type; The thickness of silica or silicon nitride is 0.02～0.04 μ m.
In described step (5), the thickness of metal silicide is 0.02～0.04 μ m.
The present invention is by the innovation on device architecture, introduced the NP diode in the polysilicon fuse device, utilize NP diode direction to puncture resistance ground, front and back and sharply change two kinds of blocked state distinguishing this device, thereby changed the mechanism that this device needs physical property to fuse.this innovation has reduced the program voltage of this device, namely this program voltage can hang down the 3.5V left and right, before programming, this device can present high-impedance state (resistance is in several megaohms left and right), after programming, this device can present low resistance state (resistance is several kilo-ohms of left and right), therefore, the heat that produces in the time of can reducing this device programming, and the separating out of unnecessary polysilicon, thereby reduced the distance between the polysilicon fuse device, the distance of other device and polysilicon fuse device on circuit, improved the integrated level of device, and to the interference of other device, and make the polysilicon fuse device can be applied on less process node, the compatibility of itself and logic process simultaneously, the electricity programming mechanism has reduced the cost that this device uses greatly, compare with the metal fuse device, this device has fairly obvious cost advantage.
Description of drawings
The present invention is further detailed explanation below in conjunction with accompanying drawing and embodiment:
Fig. 1 is the structure of traditional polysilicon fuse device;
Fig. 2 is the structure of polysilicon fuse device of the present invention;
Fig. 3 is vertical schematic diagram of polysilicon fuse device of the present invention;
Fig. 4 is the resistance schematic diagram of the polysilicon fuse device before programming;
Fig. 5 is the resistance schematic diagram of the polysilicon fuse device after programming.
In figure, description of reference numerals is as follows:
101 is that the polysilicon resistance 102 of the high value of N-type is the polysilicon resistance of the high value of P type
103 is that the polysilicon resistance 104 of the low resistance of N-type is the polysilicon resistance of the low resistance of P type
105 is that NP diode 106 is silica or silicon nitride
108 is that negative electrode contact jaw 107 is the anode contact jaw
109 is that substrate 110 is the oxide layer place
111 is that metal silicide 201,301 is negative electrode contact jaw resistance
202,302 is that the polysilicon resistance Rn 203 of N-type is NP diode reverse resistance
204,304 is that the polysilicon resistance Rp 205,305 of P type is for anode contact jaw resistance
303 is the NP diode reverse breakdown resistance value of equivalence afterwards
Embodiment
Programmable polysilicon fuse device architecture of the present invention as shown in Figure 2, comprising:
The polysilicon resistance 101 of the high value of N-type is comprised of polysilicon and N-type Impurity injection, and its resistance is at 2～3Kohm; There is no metal silicide 111 on this polysilicon, because utilize silica or silicon nitride 106 to play the effect of protective layer on this polysilicon in the technique that metal silicide 111 forms, form metal silicide to stop on this polysilicon, to reach the purpose of the N-type polysilicon resistance that forms high resistance measurement;
The polysilicon resistance 102 of the high value of P type is comprised of polysilicon and p type impurity injection, and its resistance is at 2～3Kohm; There is no metal silicide 111 on this polysilicon, because utilize silica or silicon nitride 106 to play the effect of protective layer on this polysilicon in the technique that metal silicide 111 forms, form metal silicide 111 on this polysilicon to stop, to reach the purpose of the P type polysilicon resistance that forms high value;
Negative electrode contact jaw 108 is comprised of polysilicon resistance 103, contact hole and the plain conductor of the low resistance of N-type, and its resistance is at 10～20ohm; Wherein, in the polysilicon resistance 103 of the low resistance of N-type, metal silicide 111 is arranged on polysilicon;
Wherein, the polysilicon resistance that the cathode and anode contact jaw passes through respectively the high value of N, P type connects, and is specific as follows:
Negative electrode contact jaw 108 is connected to the polysilicon resistance 101 of the high value of N-type, the polysilicon resistance 101 of the high value of N-type is connected to NP diode 105, NP diode 105 is connected to the polysilicon resistance 102 of the high value of P type, and the polysilicon resistance 102 of the high value of P type is connected to anode contact jaw 107.
For above-mentioned polysilicon fuse device architecture, the process implementation method that it is concrete as shown in Figure 3, comprises step:
(1) on P type substrate 109, oxidation generates oxide layer place 110, and its thickness is 0.2～0.3 μ m;
(2) on oxide layer place 110, generate polysilicon region, its thickness is 0.2～0.3 μ m;
(3) side of polysilicon region is utilized ion implantation technology to inject p type impurity and is formed P type polysilicon, and its implantation concentration is 1 * 10
13cm
-2～8 * 10
13cm
-2, be preferably 3 * 10
13cm
-2, utilizing ion implantation technology to inject N-type impurity at opposite side and form the N-type polysilicon, its implantation concentration is 1 * 10
13cm
-2～8 * 10
13cm
-2, be preferably 2 * 10
13cm
-2, form NP diode 105 at N, P type intersection;
(4) in polysilicon resistance 101st district of the high value of polysilicon resistance 102nd district of the high value of P type and N-type, utilize CVD to produce silica or silicon nitride 106, to stop the formation of metal silicide; The thickness of this silica or silicon nitride is 0.02～0.04 μ m;
Wherein, inject p type impurity and there is no the place of metal silicide, form polysilicon resistance 102nd district of the high value of P type; Inject N-type impurity and there is no the place of metal silicide, form polysilicon resistance 101st district of the high value of N-type;
(5) utilize metal silicide technology (conventional silicide technique), form layer of metal silicide 111 on polysilicon, effect due to silica or silicon nitride 106, can not form metal silicide 111 in polysilicon resistance 101st district of polysilicon resistance 102nd district of the high value of P type and the high value of N-type, and can form metal silicide 111 at negative electrode contact jaw 108 (polysilicon resistance 103rd district of the low resistance of N-type) and anode contact jaw 107 (polysilicon resistance 104th district of the low resistance of P type), the thickness of this metal silicide is 0.02～0.04 μ m,
(6) utilize via process and back-end metal processes to form through hole and metal connecting line, complete the negative electrode contact jaw 108 of polysilicon fuse device and drawing of anode contact jaw 107.
Programmable polysilicon fuse device of the present invention, during use, as follows:
as shown in Figure 4, when applying a current potential lower than device programming voltage on the negative electrode contact jaw resistance 201 at this device, as 2.5V or lower voltage, the NP diode of this device does not have breakdown, for anti-operating state partially, the resistance of whole device: by negative electrode contact jaw resistance 201, the polysilicon resistance Rn 202 of N-type, NP diode reverse resistance 203, the polysilicon resistance Rp 204 of P type and anode contact jaw resistance 205 form, negative electrode contact jaw resistance 201 in these resistance, anode contact jaw resistance 205 is several ohm of left and right, the polysilicon resistance Rn 202 of N-type, the polysilicon resistance Rp 204 of P type is several kilohms of left and right, NP diode reverse resistance 203 is in several megohms left and right, whole resistance is determined by NP diode reverse resistance 203, see on the whole, resistance in this loop is in several megohms left and right, it is a state that opens circuit,
When (this current potential is greater than the NP diode reverse breakdown voltage) is as 3.5V when applying a current potential greater than device programming voltage on the negative electrode contact jaw resistance 201 at this device, NP diode in this device is reversed and punctures, its resistance becomes the state of several ohm once, as shown in Figure 5, at this moment the all-in resistance of this device just depends on the polysilicon resistance Rn 302 of N-type, and the polysilicon resistance Rp 304 of P type is several kilohms of left and right; This two states can well be identified as 0 and 1 two states in circuit, its effect is equivalent to the differentiation of the two states of traditional polysilicon fuse device before and after fusing.
The programmable polysilicon fuse device that the present invention develops, this device can reduce the program voltage of polysilicon fuse device significantly, these characteristics make when no longer needing extra circuit to produce a high voltage as the polysilicon fuse device programming in the application of this device and use, this not only can reduce the difficulty of circuit design, the large problem of electric leakage that simultaneously also less whole circuit causes due to high-voltage applications; The fusing mechanism that there is no physical property, the heat that makes this device produce when programming is very little, simultaneously do not have unnecessary polysilicon to separate out yet, these characteristics make the spacing between this polysilicon fuse device to dwindle greatly, in circuit, the distance of this polysilicon fuse device of other device distance also can become very little simultaneously, has improved the integrated level of this polysilicon fuse device between this.Due to compatible mutually with common logic process, the production of this device can not increase any other extra production cost; With the programming mode that the mode of electricity is carried out, make this device to need high laser cutting machine as the metal fuse device, the cost that this has reduced this device application greatly makes this device can be applied in the following technique of 0.25 μ m.
Claims (10)
1. a programmable polysilicon fuse device architecture, is characterized in that, comprising: the polysilicon resistance of the high value of N-type, the polysilicon resistance of the high value of P type, NP diode, negative electrode contact jaw, anode contact jaw; Wherein, the NP diode is formed on the interface of polysilicon resistance of high value of N, P type, and the cathode and anode contact jaw polysilicon resistance of the high value of polysilicon resistance, the P type of the high value by N-type respectively connects.
2. structure as claimed in claim 1 is characterized in that: the polysilicon resistance of the high value of described P type, and to be injected by polysilicon and p type impurity and form, its resistance is at 2～3Kohm.
3. structure as claimed in claim 1 is characterized in that: the polysilicon resistance of the high value of described N-type, formed by polysilicon and N-type Impurity injection, and its resistance is at 2～3Kohm.
4. structure as claimed in claim 1 is characterized in that: described negative electrode contact jaw, formed by polysilicon resistance, contact hole and the plain conductor of the low resistance of N-type, and its resistance is at 10～20ohm;
Wherein, in the polysilicon resistance of the low resistance of N-type, metal silicide is arranged on polysilicon.
5. structure as claimed in claim 1 is characterized in that: described anode contact jaw, formed by polysilicon resistance, contact hole and the plain conductor of the low resistance of P type, and its resistance is at 10～20ohm;
Wherein, in the polysilicon resistance of the low resistance of P type, metal silicide is arranged on polysilicon.
6. the process implementation method of programmable polysilicon fuse device as claimed in claim 1 comprises step:
(1) oxidation generation oxide layer place on P type substrate;
(2) on the oxide layer place, generate polysilicon region;
(3) side of polysilicon region is utilized ion implantation technology to inject p type impurity and is formed P type polysilicon, utilizes ion implantation technology to inject N-type impurity at opposite side and forms the N-type polysilicon, form the NP diode at N, P type intersection;
(4) in the polysilicon resistance district of the high value of the polysilicon resistance district of the high value of P type and N-type, utilize CVD to produce silica or silicon nitride;
(5) utilize metal silicide technology, polysilicon resistance district's formation layer of metal silicide of the polysilicon resistance district of the low resistance of the P type on polysilicon and the low resistance of N-type;
(6) utilize via process and back-end metal processes to form through hole and metal connecting line, complete the negative electrode contact jaw of polysilicon fuse device and drawing of anode contact jaw.
7. method as claimed in claim 6, it is characterized in that: in described step (1), (2), the thickness of oxide layer place and polysilicon region is all 0.2～0.3 μ m.
8. method as claimed in claim 6 is characterized in that: in described step (3), inject p type impurity and form P type polysilicon, its implantation concentration is 1 * 10
13cm
-2～8 * 10
13cm
-2
Inject N-type impurity and form the N-type polysilicon, its implantation concentration is 1 * 10
13cm
-2To 8 * 10
13cm
-2
9. method as claimed in claim 6 is characterized in that: in described step (4), inject p type impurity and there is no the place of metal silicide, form the high value polysilicon resistance district of P type; Inject N-type impurity and there is no the place of metal silicide, form the high value polysilicon resistance district of N-type;
The thickness of silica or silicon nitride is 0.02～0.04 μ m.
10. method as claimed in claim 6, it is characterized in that: in described step (5), the thickness of metal silicide is 0.02～0.04 μ m.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103556754A CN103107159A (en) | 2011-11-11 | 2011-11-11 | Programmable polycrystalline silicon fuse device structure and realizing method of technology of programmable polycrystalline silicon fuse device structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103556754A CN103107159A (en) | 2011-11-11 | 2011-11-11 | Programmable polycrystalline silicon fuse device structure and realizing method of technology of programmable polycrystalline silicon fuse device structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103107159A true CN103107159A (en) | 2013-05-15 |
Family
ID=48314900
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011103556754A Pending CN103107159A (en) | 2011-11-11 | 2011-11-11 | Programmable polycrystalline silicon fuse device structure and realizing method of technology of programmable polycrystalline silicon fuse device structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103107159A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104319255A (en) * | 2014-10-30 | 2015-01-28 | 上海华虹宏力半导体制造有限公司 | Method for manufacturing polycrystalline silicon resistor with low temperature coefficient |
| FR3063573A1 (en) * | 2017-03-01 | 2018-09-07 | Stmicroelectronics (Rousset) Sas | INTEGRATED FUSE DEVICE |
| CN114464595A (en) * | 2022-04-12 | 2022-05-10 | 晶芯成(北京)科技有限公司 | Electric fuse structure |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6088256A (en) * | 1998-09-25 | 2000-07-11 | Stmicroelectronics, Inc. | Integrated circuit with electrically programmable fuse resistor |
| CN101295703A (en) * | 2007-04-23 | 2008-10-29 | 台湾积体电路制造股份有限公司 | Electromigration aggravated electrical fuse structure |
| US20080296727A1 (en) * | 2007-05-30 | 2008-12-04 | Laurentiu Vasiliu | Programmable poly fuse |
| CN101681879A (en) * | 2007-05-09 | 2010-03-24 | 飞思卡尔半导体公司 | Electronic device and method for operating a memory circuit |
-
2011
- 2011-11-11 CN CN2011103556754A patent/CN103107159A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6088256A (en) * | 1998-09-25 | 2000-07-11 | Stmicroelectronics, Inc. | Integrated circuit with electrically programmable fuse resistor |
| CN101295703A (en) * | 2007-04-23 | 2008-10-29 | 台湾积体电路制造股份有限公司 | Electromigration aggravated electrical fuse structure |
| CN101681879A (en) * | 2007-05-09 | 2010-03-24 | 飞思卡尔半导体公司 | Electronic device and method for operating a memory circuit |
| US20080296727A1 (en) * | 2007-05-30 | 2008-12-04 | Laurentiu Vasiliu | Programmable poly fuse |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104319255A (en) * | 2014-10-30 | 2015-01-28 | 上海华虹宏力半导体制造有限公司 | Method for manufacturing polycrystalline silicon resistor with low temperature coefficient |
| CN104319255B (en) * | 2014-10-30 | 2017-06-06 | 上海华虹宏力半导体制造有限公司 | The manufacture method of low-temperature coefficient polysilicon resistance |
| FR3063573A1 (en) * | 2017-03-01 | 2018-09-07 | Stmicroelectronics (Rousset) Sas | INTEGRATED FUSE DEVICE |
| US10283648B2 (en) | 2017-03-01 | 2019-05-07 | STMicroelectronic (Rousset) SAS | PN junction-based electrical fuse using reverse-bias breakdown to induce an open conduction state |
| CN114464595A (en) * | 2022-04-12 | 2022-05-10 | 晶芯成(北京)科技有限公司 | Electric fuse structure |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI244767B (en) | Diode junction poly fuse | |
| CN102376359B (en) | One-time programmable, electric fuse and programmable resistive memory, and method | |
| CN102956642B (en) | Based on disposable programmable device and the correlation technique of FINFET | |
| CN102856250B (en) | Integrated circuit with fin-based fuse, and related fabrication method | |
| US8258586B1 (en) | Non-volatile anti-fuse with consistent rupture | |
| US20100277967A1 (en) | Graded metal oxide resistance based semiconductor memory device | |
| CN104064672B (en) | Resistance random access memory device | |
| CN101271881A (en) | Inverse fuse wire and memory cell without ability to cause non-linear current after fusing | |
| US8860003B2 (en) | Resistive memory device and fabrication method thereof | |
| US8685799B1 (en) | RRAM structure at STI with Si-based selector | |
| US8050077B2 (en) | Semiconductor device with transistor-based fuses and related programming method | |
| CN102365750A (en) | Switchable junction with intrinsic diode | |
| CN103107159A (en) | Programmable polycrystalline silicon fuse device structure and realizing method of technology of programmable polycrystalline silicon fuse device structure | |
| CN104007778A (en) | Reference voltage generation circuit | |
| KR20180091015A (en) | Resistive Cross-point Storage Arrays | |
| CN102201392B (en) | Electric fuse circuit and method of operation thereof | |
| CN104347629B (en) | Grid control diode antifuse unit structure and manufacture method thereof | |
| CN110024123A (en) | Two-terminal vertical-type 1T- dynamic random access memory and its manufacturing method | |
| US8883590B2 (en) | Phase change memory apparatus and fabrication method thereof | |
| CN102456412B (en) | OTP (One Time Programmable) device formed by polysilicon fuse and operation method thereof | |
| TWI541980B (en) | Multi-time programmable memory | |
| CN110140172A (en) | Reduce the RRAM process integration scheme and cellular construction of mask operation number | |
| CN104347589A (en) | Antifuse structure | |
| CN105975041A (en) | Starting key detection circuit | |
| CN206610810U (en) | Configurable ROM |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| ASS | Succession or assignment of patent right |
Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140109 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 201206 PUDONG NEW AREA, SHANGHAI TO: 201203 PUDONG NEW AREA, SHANGHAI |
|
| TA01 | Transfer of patent application right |
Effective date of registration: 20140109 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong New Area, Sichuan Road, No. 1188 Bridge Applicant before: Shanghai Huahong NEC Electronics Co., Ltd. |
|
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20130515 |