CN103094253B - A kind of grid oxide layer test structure - Google Patents
A kind of grid oxide layer test structure Download PDFInfo
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Abstract
The present invention is a kind of test structure of grid oxic horizon.This grid oxide layer test structure comprises multiple test cell, described each test cell includes source region, oxide layer and polysilicon layer, described active area comprises the first active area and the second active area, by arranging first active area with " T " structure, be connected with the second active area, add border, effective active area, further, increase the number of the first active area, when making these first active areas maintenance parallel-connection structure simultaneously, border, effective active area can be made to become multiple to increase, thus achieve when not increasing test area and test sample size, test result is made to have higher confidence level.
Description
Technical field
The present invention relates to a kind of test structure of grid oxic horizon, border, especially a kind of active area adds epistasis grid oxide layer test structure.
Background technology
Along with the rapid raising of very lagre scale integrated circuit (VLSIC) transistor integrated level, the thickness of grid oxide layer of metal-oxide-semiconductor is also more and more thinner.While grid oxygen is thinning, supply voltage but should not reduce, and under higher electric field strength, the performance of grid oxygen certainly will be made to become distinct issues.The bad MOS device electrical quantity that will cause of grid oxygen resistance to voltage is unstable, as: threshold voltage shift, mutual conductance decline, leakage current increase etc., cause puncturing of grid oxygen further, cause the inefficacy of device, whole integrated circuit is paralysed.Therefore, about the test of reliability performance of gate oxide becomes one of of paramount importance problem gradually.
Current industry mainly contains 3 kinds for the structure that reliability of the gate oxide is tested, and one is gate oxide area reinforced (area intensive), weighs point using the test area of gate oxide as one; One is border, active area reinforced (field edge intensive), is to weigh point using the boundary length of active area as one; Also having one to be polysilicon gate silicon border reinforced (poly edgeintensive), is weigh point using the boundary length of polysilicon as one.As shown in Figure 1, Fig. 1 is the active area reinforced gate oxide test structure profile of existing a kind of common aspect Silicon Wafer.In such an embodiment, between two STI (shallow trench isolation from) 102 is exactly active area 101, these active areas 101 are after boiler tube, gate oxide 103 will be grown on its surface, above polysilicon (poly) 104 can cover afterwards, forming one has polysilicon-gate oxide-body silicon, the electric capacity of so similar " sandwich " structure, gate oxide 103 upper, bottom crown is polysilicon 104 and body silicon 100 respectively.The bottom crown of all gate oxides 103 is all conducting, is drawn by P+ active area 105.The intersection of what hollow arrow marked is exactly active area 101 and STI102, namely in the reinforced test structure in border, grid oxygen active area, needs the position that reliability testing is verified.As can be seen here, in common aspect Silicon Wafer, in the reinforced structure unit of border, such active area, numerous test positions can be had, thus under certain channel width, namely can realize longer total active area boundary length.The number * 2 (two limit) of the active area that total length L=single channel width * repeats.
Refer to Fig. 2, Fig. 2 utilizes the reinforced test structure in border, active area in Fig. 1 to be placed on the profile on insulated substrate Silicon Wafer.Now, the active area 101 between two STI102, is surrounded by the oxygen buried layer 100 ' of insulated substrate silicon and STI102, and is formed as a complete totally enclosed region, cause unsettled.Original substrate terminal of being drawn by P+ active area 105, cannot make the active area 101 between all STI102 be on identical current potential.As can be seen here, as hollow arrow mark, active area 101 and the intersection of STI102 of reliability testing checking just greatly reduce.So, border, active area total length just only equals single channel width.In such a configuration, if border, active area total length will be made to increase, can only realize by improving channel width., if will reach the active area border total length suitable with common aspect Silicon Wafer, the area that reliability testing occupies required on wafer is just very huge.Obviously, be to reach the object monitoring the reinforced reliability in border, gate oxide active area in higher confidence degree situation by this structure.Certainly, we also can improve confidence degree by the total number of samples amount increasing test, but at present in order to reach such object, nothing but just just by increasing the area of test structure, or the quantity increasing test wafer realizes.This mode exchanging the reliability data of high confidence degree for improve testing cost is worthless.
Summary of the invention
In view of this, the present invention proposes a kind of grid oxygen test structure reinforced for border, active area, this test structure can improve effective active area boundary length of single test sample book, thus ensures the confidence degree of test result.
For achieving the above object, the invention provides a kind of grid oxide layer test structure, comprise multiple test cell, described each test cell includes source region, oxide layer and polysilicon layer, and described active area comprises:
At least one first active area, this first active area is " T " structure, and wherein, be somebody's turn to do the both ends of " T " structure level part for leakage, source region, remainder is grid region;
Second active area, be connected with the vertical component of above-mentioned " T " word structure, this second active area is substrate;
Described polysilicon layer is positioned on active area, and this polysilicon layer is " convex " structure, and the ledge being wherein somebody's turn to do " convex " structure covers on grid region, and the base portion of being somebody's turn to do " convex " structure is hollow structure, surrounds and exposes above-mentioned second active area;
Described oxide layer is between active area and polysilicon layer, and wherein polysilicon layer and the overlapping up-and-down boundary of grid region horizontal component and the right boundary overlapping with grid region vertical component form the border, active area of this oxide layer jointly.
Optionally, described active area comprises multiple first active area further, and the plurality of first active area is connected on the second active area respectively by the vertical component of " T " structure.
Optionally, described polysilicon layer is " convex " structure with multiple ledge, the quantity of corresponding above-mentioned first active area of quantity of this ledge, wherein, those multiple ledges are covered in the grid region part of the first corresponding active area respectively, and this base portion is surrounded and exposed the second active area.
Optionally, described active area comprises multiple first active area further, and the horizontal component of the plurality of first active area forms parallel-connection structure by vertical component, and the tail end of this parallel-connection structure is connected on the second active area.
Optionally, the length of the ledge of described polysilicon layer is greater than the length of above-mentioned parallel-connection structure, makes this ledge cover the gate regions of the plurality of first active area.
Optionally, described polysilicon layer forms the border, multi-crystal silicon area of this oxide layer jointly with the overlapping right boundary of grid region horizontal component and the horizontal boundary overlapping with grid region vertical component, and wherein the ratio on the border, active area of this oxide layer and the border, multi-crystal silicon area of this oxide layer is greater than 18: 1.
Optionally, described polysilicon layer forms the border, multi-crystal silicon area of this oxide layer jointly with the overlapping right boundary of grid region horizontal component and the horizontal boundary overlapping with grid region vertical component, and wherein the ratio on the border, active area of this oxide layer and the border, multi-crystal silicon area of this oxide layer is 19: 1.
Optionally, shallow channel isolation area is provided with between the horizontal component of described first active area and the second active area.
By in above-mentioned test structure, first active area of structure that setting has " T " is connected with the second active area, add border, effective active area, further, increase the number of the first active area, when making these first active areas maintenance parallel-connection structure, border, effective active area can be made to become multiple to increase simultaneously, thus achieve when not increasing test area and test sample size, make test result have higher confidence level.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the active area reinforced gate oxide test structure profile of existing a kind of common aspect Silicon Wafer.
Fig. 2 utilizes the reinforced test structure in border, active area in Fig. 1 to be placed on the profile on insulated substrate Silicon Wafer.
The grid oxide layer test structure vertical view that Fig. 3 A-3C provides for first embodiment of the invention.
Fig. 4 is the grid oxygen test structure vertical view of the second embodiment of the present invention.
Fig. 5 is the grid oxygen test structure vertical view of the third embodiment of the present invention.
Fig. 6 is the grid oxygen test structure vertical view of the fourth embodiment of the present invention.
Fig. 7 is the grid oxygen test structure vertical view of the fifth embodiment of the present invention.
Fig. 8 is the grid oxygen test structure vertical view of the sixth embodiment of the present invention.
Embodiment
Just as described in the background section, after border, existing active area reinforced grid oxygen test structure is put on insulated substrate silicon, due to active area by STI and insulated substrate silicon unsettled, the border, active area allowed to for testing grid oxygen reliability greatly reduces, cause test result to be not enough to reflect truth, namely test confidence degree not high.
For this situation, the present invention proposes a kind of grid oxygen test structure reinforced for border, active area, this test structure can improve effective active area boundary length of single test sample book, thus ensures the confidence degree of test result.
Grid oxygen test structure provided by the present invention is described in detail below in conjunction with accompanying drawing.
With reference to the grid oxide layer test structure vertical view that figure 3A-3C, Fig. 3 A-3C provides for first embodiment of the invention.For ease of understanding, Fig. 3 A and Fig. 3 B is the exploded view of active area and polysilicon layer in Fig. 3 C respectively.As shown in the figure, active area 200 comprises the first active area 210 and the second active area 220.Wherein the first active area 210 is " T " structure, comprises horizontal component 211 and vertical component 212, second active area and is connected with the first active area 210 by vertical component 212.Wherein be provided with shallow channel isolation area 203 between horizontal component 211 and the second active area 220.
Polysilicon layer 230 is " convex " structure, comprises ledge 231 and base portion 232, and wherein base portion 232 is a hollow structure.
When polysilicon layer 230 covers after on active area 200, first active area 210 is distinguished into drain region 213, source region 214 and grid region 215, wherein drain region 213 and source region 214 are positioned at horizontal component 211 two ends not by the place that polysilicon layer 230 covers, and 215, grid region is covered by the ledge 231 of polysilicon layer 230.The base portion 232 of polysilicon layer 230 is surrounded and exposes the second active area 220 simultaneously.
Oxide layer is (not shown) between polysilicon layer 230 and active area 220 then.During concrete test, using polysilicon layer 230 as grid, a step voltage is applied to it.Using the second active area 220 as substrate, to its ground connection.Due to the first active area and the second active area mutual conduction, so now the current potential of grid region 215 and the second active area 220 is equal.According to the definition on grid oxygen border, border, effective active area is that polysilicon layer 230 coboundary 241, two lower boundary 242 overlapping with grid region 215 horizontal component and left and right two border 243 overlapping with grid region 215 vertical component form jointly, and effective border, multi-crystal silicon area two right boundary 244 overlapping with grid region 215 horizontal component that are polysilicon layer 230 and the horizontal boundary 245 overlapping with grid region 215 vertical component form jointly.By changing the length and width size of the first active area 210, suitable active area boundary length can be obtained.Usually the boundary length of active area is made to account for more than 90% of whole grid oxygen border, i.e. active area boundary length: multi-crystal silicon area boundary length > 18: 1, to reduce the impact of border, multi-crystal silicon area on test result.Preferably, make active area boundary length: boundary length=19, multi-crystal silicon area: 1, test result more accurately can be obtained.
Refer to Fig. 4, Fig. 4 is the grid oxygen test structure vertical view of second embodiment of the invention.As shown in the figure, in this embodiment, active area comprises two the first active areas 300 and 300 '.These two first active areas are connected on the second active area 320 respectively by respective vertical component, form " king " structure.Polysilicon layer 330 there are two ledges 331 and 331 ', respectively corresponding first active area 300 and 300 '.These two ledges lay respectively at the both sides of base portion 332, formed one " in " structure.In the present embodiment, polysilicon layer 330 covers generation two grid regions 315,315 ', when testing, the current potential in these two grid regions 315,315 ' is all equal with the second active area 320, therefore grid oxygen active area length is also extended to 2 times in the first embodiment, increases the effective length of active area further.
Refer to Fig. 5, Fig. 5 is the grid oxygen test structure vertical view of the third embodiment of the present invention.The present embodiment is on the basis of embodiment two, and the first active area quantity is increased to four, and these four the first active areas 401,402,403,404 are connected on four sides of the second active area 420.Meanwhile, the ledge of polysilicon layer 430 does corresponding change, make the ledge of polysilicon layer be covered to corresponding grid region part respectively, and its base portion 431 is still surrounded and exposed the second active area 420.So, the active area boundary length of grid oxygen has just been extended to original 4 times.
Refer to Fig. 6, Fig. 6 is the grid oxygen test structure vertical view of the fourth embodiment of the present invention.In the present embodiment, two the first active areas 601,602 can be arranged on the same side of the second active area 620, and now polysilicon layer 630 also has two ledges 631,631 ' being positioned at the same side.Equally, the present embodiment is not limited to the situation of two, can be changing into multiple first active area further.
Refer to Fig. 7, Fig. 7 is the grid oxygen test structure vertical view of the fifth embodiment of the present invention.As shown in the figure, in the present embodiment, active area 700 comprises multiple first active area further, and the horizontal component of the plurality of first active area forms parallel-connection structure by vertical component, and the tail end of this parallel-connection structure is connected on the second active area.Now, the ledge 731 of polysilicon layer 730 has certain length, and this length is greater than the length of the parallel-connection structure that above-mentioned multiple first active area is formed, and makes this ledge 731 can cover the gate regions of the plurality of first active area.
Refer to Fig. 8, Fig. 8 is the vertical view of the grid oxygen test structure of the sixth embodiment of the present invention.As shown in the figure, in the present embodiment, substrate 80 has multiple grid oxygen test structure 81, the plurality of test structure 81 can be any one in each embodiment above-mentioned.Described multiple test structure 81, by repeatedly regularly arranged, gathers on substrate 80.Between two wherein adjacent test structures, connected by the vertical component of the first active area in single test structure, make all test structures form parallel relationship, further increase the active area boundary length of the required sampling of test, improve the confidence level of test result.
Please again see Fig. 2, for existing grid oxide layer test structure, because each active area is all surrounded by the insulator silicon of STI isolation and bottom, therefore be all completely isolated between active area and active area, cause when carrying out grid oxic horizon test, only have the active area be connected with as substrate lead-out wire, its border is only the structure of Validity Test, and the border of other active areas does not all have tested arriving.So, if these not tested to structure on there is impurity or other defect, also just have no idea effectively to be detected.And grid oxide layer test structure of the present invention, be then output a passage in the middle of these STI, just as bridge, each active area be all together in parallel.This bridge block is exactly the vertical component of each the first active area.There are these bridges, each horizontal active area not only can have been made can to remain on same current potential with substrate and (be generally earthed voltage), border, effective active area can also be increased, make border, active area increase to original many times.So, the test voltage of the applying on gate polysilicon layer, can guarantee all have identical test effect to the grid oxic horizon on all active areas.If namely test result shows that the puncture voltage of grid oxic horizon is really on standard value, so whole gate oxide integrities is out of question, and once there be which position to occur defect, then puncture voltage certainly will be less than normal, coordinate other detection means again, confirm the concrete position punctured, and judge grid oxic horizon produced problem with this, thus overcome these defect problems after manufacture craft is improved, improve the reliability of whole semiconductor device.
Make the method for this kind of grid oxide layer test structure particularly, be then technical at common STI, when carrying out etching groove, utilize light shield, groove being made into the structure with " middle bridge ".Namely retain the active area of bridge area, become the vertical active area connecting adjacent two horizontal active areas, and then square deposition of gate oxide layer and gate polysilicon layer on the active area, realize grid oxide layer test structure of the present invention.
In sum, the present invention proposes a kind of test structure of grid oxic horizon.This grid oxygen test structure is connected with the second active area by arranging first active area with " T " structure, adds border, effective active area.Compared with prior art, grid oxide layer test structure of the present invention has following feature when testing:
First: for single test cell, border, effective active area is completely depending on the number of the first active area and the concrete size of the first active area, if under namely needing to allow test result be based upon the prerequisite of a high confidence degree, then can by the number of parallel of increase by first active area, simultaneously by calculating, design the length and width ratio of the first active area, the ratio on border, active area and grid polycrystalline silicon border is improved as far as possible.Thus equivalence be equivalent to acquisition one test sample book in a big way, improve test confidence degree.
Second: for whole substrate, because test cell is above more, if all tested all test cells, then the time cost testing cost is larger.The present invention then can by the bridge function of the active area of each test cell by vertical component, form a large parallel-connection structure, so only need apply grid test voltage and Substrate ground voltage on a test cell, just can realize the unified test to all test cells, while test border, effective active area increases, also improve testing efficiency.In addition because each test cell defines parallel-connection structure, make the resistance decreasing of integrated testability, advantageously in the accuracy of test result.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (8)
1. a grid oxide layer test structure, comprises multiple test cell, and each described test cell includes source region, oxide layer and polysilicon layer, it is characterized in that:
Described active area comprises:
At least one first active area, this first active area is " T " structure, and wherein, be somebody's turn to do the both ends of " T " structure level part for leakage, source region, remainder is grid region;
Second active area, be connected with the vertical component of above-mentioned " T " word structure, this second active area is substrate;
Described polysilicon layer is positioned on active area, and this polysilicon layer is " convex " structure, and the ledge being wherein somebody's turn to do " convex " structure covers on grid region, and the base portion of being somebody's turn to do " convex " structure is hollow structure, surrounds and exposes above-mentioned second active area;
Described oxide layer is between active area and polysilicon layer, and wherein polysilicon layer and the overlapping up-and-down boundary of grid region horizontal component and the right boundary overlapping with grid region vertical component form the border, active area of this oxide layer jointly.
2. grid oxide layer test structure as claimed in claim 1, it is characterized in that: described active area comprises multiple first active area further, the plurality of first active area is connected on the second active area respectively by the vertical component of " T " structure.
3. grid oxide layer test structure as claimed in claim 2, it is characterized in that: described polysilicon layer is " convex " structure with multiple ledge, the quantity of corresponding above-mentioned first active area of quantity of this ledge, wherein, the plurality of ledge is covered in the grid region part of the first corresponding active area respectively, and this base portion is surrounded and exposed the second active area.
4. grid oxide layer test structure as claimed in claim 1, it is characterized in that: described active area comprises multiple first active area further, the horizontal component of the plurality of first active area forms parallel-connection structure by vertical component, and the tail end of this parallel-connection structure is connected on the second active area.
5. grid oxide layer test structure as claimed in claim 4, is characterized in that: the length of the ledge of described polysilicon layer is greater than the length of above-mentioned parallel-connection structure, makes this ledge cover the gate regions of the plurality of first active area.
6. grid oxide layer test structure as claimed in claim 1, it is characterized in that: described polysilicon layer forms the border, multi-crystal silicon area of this oxide layer jointly with the overlapping right boundary of grid region horizontal component and the horizontal boundary overlapping with grid region vertical component, and wherein the ratio on the border, active area of this oxide layer and the border, multi-crystal silicon area of this oxide layer is greater than 18:1.
7. grid oxide layer test structure as claimed in claim 1, it is characterized in that: described polysilicon layer forms the border, multi-crystal silicon area of this oxide layer jointly with the overlapping right boundary of grid region horizontal component and the horizontal boundary overlapping with grid region vertical component, and wherein the ratio on the border, active area of this oxide layer and the border, multi-crystal silicon area of this oxide layer is 19:1.
8. grid oxide layer test structure as claimed in claim 1, is characterized in that: be provided with shallow channel isolation area between the horizontal component of described first active area and the second active area.
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| CN104465614B (en) * | 2013-09-18 | 2017-02-22 | 中芯国际集成电路制造(上海)有限公司 | Test structure and corresponding test method |
| CN104701298B (en) * | 2013-12-05 | 2017-11-03 | 中芯国际集成电路制造(上海)有限公司 | Gate oxide integrity (GOI) test structure and method of testing |
| CN105448734A (en) * | 2014-09-02 | 2016-03-30 | 无锡华润上华半导体有限公司 | Method for improving double-hump effect of device, and semiconductor device |
| US9406572B2 (en) | 2014-10-30 | 2016-08-02 | Infineon Technologies Ag | Method for processing a substrate and a method of process screening for integrated circuits |
| US11164800B2 (en) * | 2018-11-20 | 2021-11-02 | Nanya Technology Corporation | Test structure, semiconductor device and method for obtaining fabricating information in semiconductor device |
| CN113497001B (en) | 2020-04-03 | 2024-03-29 | 长鑫存储技术有限公司 | Semiconductor structure |
| CN111896856B (en) * | 2020-08-12 | 2023-05-23 | 江西乾照光电有限公司 | Chip electrical performance testing system and method |
| CN115954343B (en) * | 2023-03-09 | 2023-06-09 | 合肥晶合集成电路股份有限公司 | Gate oxide layer test structure |
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