CN103081018B - Location mode in phase transition storage is determined - Google Patents

Abstract

The method and apparatus being used for determining the state of phase-changing memory unit is provided。Unit is carried out multiple measurement, measures the subthreshold current comparison voltage characteristic depending on unit。Process to measure and depend on the current ratio tolerance to the slope of voltage characteristic to obtain。Then according to being different from absolute unit resistance, being not substantially affected by the state of this measure determining unit of drift effect。

Description

Location mode in phase transition storage is determined

Technical field

Present invention relates generally to phase transition storage, and more particularly relate to the method and apparatus determining the state of phase-changing memory unit。

Background technology

Phase transition storage (PCM) is the novel non-volatile solid state memory technology of the reversible switching utilizing some chalcogenide material between at least two state with different conductivity。PCM quickly, there is fine indwelling and desirable attributes and have shown that and upgrade to lithography node in the future。Think for those reasons its potential alternative or supplementary main flow memorizer of today and storage application in flash memory。

Commercially can PCM device in, it is possible to by apply heat basic storage cell (" unit ") is arranged to one of crystalline state and amorphous state the two state。In the amorphous state state representing Binary Zero, the resistance of unit is high。Chalcogenide material temperature more than heating to its crystalline temperature is transformed into conductive crystalline state when then cooling down。This low resistive state represents binary one。If then by high temperature more than unit heating to chalkogenide fusing point, then chalcogenide material recovers the amorphous state state to it when cooling rapidly。In order to PCM cell write data, apply voltage or current impulse to heat to proper temperature chalcogenide material to cause desired location mode after cooling to unit。In order to read unit, cell resistance is used to determine the state of unit as tolerance。By by unit biasing in a certain constant voltage level and measurement flow through it electric current or by transmit constant current and measure cross over unit formed voltage carry out measuring unit resistance。In subthreshold value (sub-threshold) region of the current ratio voltage characteristic of unit, (namely at threshold switching voltage, (namely chalkogenide switches to voltage when conducting " on " state, electric current can flow through unit to heat it by Joule heating in this state, therefore causes phase transformation potentially) in area below) perform this measurement。In this sub-threshold range, it is possible to read unit and do not affect location mode, high resistance measurement instruction Binary Zero and low-resistance measure instruction binary one。

It is make cost/potential drop to multi-level unit (MLC) ability with the level of MLC flash technology competition that PCM becomes the key request of main flow。Multilevel memory cell can be configured to s different resistance stages, wherein s > 2, thus allows for the position that the storage of each unit is more than one。Such as NOR flash memory can store level Four by each unit, namely two。43nm Technology can be used to carry out every single flash memory cells store four figures currently available according to the MLCNAND flash chip of (namely 16 grades)。In PCM cell, by utilizing the part amorphous state state of chalkogenide unit to realize MLC operation。Different units level can be set by the effective volume of the amorphous state state in change chalcogenide material。This is change unit resistance then。Although the current each unit storage of commercially available PCM chip only, but in PCM chip of having demonstrated experimentally, each unit stores four。

Problem in PCM device is referred to as the physical phenomenon of short-term resistance drift or structure Relaxation, and this phenomenon is often simply referred to as " drift "。This problem is especially notable and bring notable technology barrier to the reliable MLC ability in PCM in MLC device。Think that structure Relaxation is reset owing to the local atomic in the Amorphous Phase of phase-change material, thus affecting their conductivity。Specifically, in MLCPCM in amorphous state state or at the resistance upward displacement in time of PCM cell of part amorphous state state programming and also temperature influence。Therefore, the trend fluctuation that observation increases according to increasing over time in the cell resistance of different time instantaneous measurement。This resistance is shifted contributive event is random in character and time of occurrence, is therefore difficult to prediction and alleviates。Owing to resistance shifts, therefore corresponding from different units state (configuration in the amorphous state enlivened in volume/crystalline material phase) different resistance stages can be overlapped in random time moment, thus causing the random error that location mode is determined。

Have been proposed that many technology are to solve resistance displacement problem。A kind of technology relates to use reference unit, the purpose that wherein alleviates for drift and retain certain part that memory unit is overall。Each reference unit in these reference units is programmed to discrete cell state, and monitors that the resistance of these unit is to observe the estimation of the resistance drift for other unit (namely for the unit of actual user data storage) according to regular intervals。Then, to obtain without, for the purpose of the resistance stages of drift effect, removing, to measuring of subscriber unit, the drift estimated。Such effect offset based on the drift of reference level depends on the hypothesis of the similar drift characteristic of status and appearance of similar units。But it being inevitably present between remarkable unit transmutability (being caused by the change in process increased at more junior unit yardstick) and during unit intrinsic parameter change (mainly being caused by changes in material), the effectiveness of this hypothesis is doubtful thus causing that defective drift is offset。

Drift is accelerated to be another proposal for tackling drift。During memory cell is programmed (or afterwards), in a certain (of a sufficiently low) temperature, unit is annealed a period of time, to accelerate drift effect thus according to Arrhenius relation (Arrheniusrelation)。Assume that cell resistance is not significantly drifted about after anneal。Experiment not yet fully confirms the effectiveness of this mode。Additionally, due to hot activation phase transition phenomena, so unit annealing may result in less desirable location mode disturbance。

Also have been proposed that coding techniques is to tackle drift。Here, it does not have programming and read memory cell individually but in the cell block (code word)。The redundancy added in these code words is intended to make code word not by drift effect, and provides the inerrancy when decoding to fetch information。Although drift coding can be potential powerful technology, but its effectiveness generally stretches along with the redundancy of code used。More high redundancy is unfavorable for can be used for storing the memory span of actual user data。Generally only allow minimum redundancy, and this is likely to reduced the code effectiveness when reply drift。

Summary of the invention

A kind of method that one embodiment of one aspect of the invention provides state for determining phase-changing memory unit。The method includes:

Carry out depending on multiple measurements of the subthreshold current comparison voltage characteristic of unit；

Process to measure and depend on the described current ratio tolerance to the slope of voltage characteristic to obtain；And

State according to described measure determining unit。

In some embodiments of the invention, using following tolerance, this tolerance depends on the slope of subthreshold current comparison voltage (I/V) characteristic of unit, i.e. I/V characteristic slope below threshold switching voltage。The slope of subthreshold value I/V characteristic depends on resistance deviation (i.e. resistance derivative) but is not dependent on any absolute resistance value。Although cell resistance significantly changes as discussed above over time, but the slope of I/V characteristic keeps almost constant over time in sub-threshold range。This is because subthreshold value I/V slope is the function of the effective volume of the Amorphous Phase in unit。Effective amorphous state volume is again the good measurement measured and be not affected by drift effect in particular of location mode, because it is known that drift does not affect the geometry (but assume that drift is buried in oblivion owing to the defect in Amorphous Phase and do not affect total amorphous state volume) of Amorphous Phase。

The certain methods embodying the present invention utilizes subthreshold value I/V slope to obtain substantially not along with the location mode tolerance of drift change。Specifically, the tolerance used in some embodiments of the invention is not substantially affected by drift effect, and namely it keeps substantial constant over time except inevitable noise fluctuations。Owing to subthreshold value I/V slope is the function of the effective amorphous state volume in unit, and therefore it is the function measured of location mode, so aforementioned tolerance is also the characteristic of location mode and therefore can be used to distinguish between the different conditions in MLCPCM then。As described further below, the experimental result of actual PCM cell array is demonstrated the effectiveness of this statement and efficiency that this tolerance is measured as location mode。Therefore, by using the tolerance described, some embodiments of the present invention provide for the information to fetch not by the method for the state determining PCM cell in the way of drift effect。Method according to some embodiments of the invention can be not in relation to drift character itself and carry out any it is assumed that and the inherent of user's memory capacity can not be caused to lose。Therefore some embodiments of the present invention can provide to improve determines for the location mode of PCM array thus promoting the efficient operation of MLC ability and the PCM device strengthened generally。

Aforementioned tolerance can directly or indirectly depend on the slope of subthreshold value I/V characteristic with various ways according to this slope。Being characterized by tolerance relevant with subthreshold value I/V slope in a certain manner, and be therefore not directly dependent on the absolute resistance of unit, the latter is as discussed above by drift effect。In other words, according to some embodiments of the present invention, it is possible to based on independence or be substantially independent of the tolerance of absolute unit resistance and determine PCM cell state。According to some embodiments of the present invention, for tolerance of deriving, unit being carried out at least two measurement, these measurements (directly or indirectly) depend on subthreshold value I/V slope。As described further below, it is possible to carry out more than two and measure to allow average and improve accuracy。Then can process gained with various ways to measure to obtain the final tolerance for evaluation unit state。Such as, some embodiments can include the multiple measurements carrying out cell current with different units bias voltage, and tolerance depends on the function difference of the cell current measured with different bias voltages。It is likewise possible to cross over the voltage of unit for different applying unit current measurements, and measure the function difference of the cell voltage that may rely on measurement。Alternatively, for instance the difference on subthreshold value I/V curve can carry out multiple measurements of cell resistance, and measure the function difference that may rely on the cell resistance measured in described difference。In these examples, the specified function of the measured value of discussion can be simply measured value itself or can be a certain more complicated function of this value, for instance logarithm。

Concrete mode according to measure determining unit state can also change in different embodiments。The details of this step may rely on the precise forms of cell type (progression), tolerance itself, and any technology can also used except Elementary Measures derivation method, for instance for further enhancing any additional correction technology reading accuracy。In some preferred embodiments, it is possible to simply by comparing the tolerance (having or without any further process) of derivation one or more reference value with instruction different units state to determine location mode。Although some embodiments of the present invention can apply to two-stage PCM cell, but it is especially advantageous to be applied to multi-level unit, because drifting in MLC device more problematic。When being applied to the state determining multi-level unit (i.e. s level unit, wherein s > 2), it is preferable that method can include multiple reference values of tolerance by comparing derivation and the s level of indicating member and determine the state of unit。Such reference value can be used various ways, such as limit cell level in predetermined threshold, and these predetermined thresholds limit for measuring the border of scope, and these measurement scopes are mapped to difference and read back level。

One embodiment of second aspect present invention provides the device of a kind of state for determining phase-changing memory unit。This device includes:

Measuring circuit, for carrying out depending on multiple measurements of the subthreshold current comparison voltage characteristic of unit；And

Controller, depends on the described current ratio tolerance to the slope of voltage characteristic for processing described measurement to obtain, and its middle controller is suitable to the state according to described measure determining unit。

According to still another embodiment of the invention, based on independence or be substantially independent of the tolerance of absolute unit resistance and determine PCM cell state。

One embodiment of third aspect present invention provides a kind of phase change memory device, and this phase change memory device includes:

Memorizer, including multiple phase-changing memory units；And

Read/write device, for reading and the data in recording phase change memory unit, wherein read/write device includes the device of the state for determining described memory cell according to a second aspect of the present invention。

Accompanying drawing explanation

It is said that in general, herein with reference to when realizing the method Expressive Features of the present invention, it is possible to character pair is provided in embodying assembly of the invention or equipment。

By example, the preferred embodiments of the present invention are described now with reference to the following drawings:

Fig. 1 is the schematic block diagram of the phase change memory device embodying the present invention；

Fig. 2 illustrates and on average programs curve for eight grades of PCM cell；

Fig. 3 illustrates the time dependence executing alive PCM cell resistance in difference；

Fig. 4 illustrates the simple difference value metric counting circuit for generating location mode tolerance in the device of Fig. 1；

Fig. 5 illustrates the result of the Fig. 3 after average removal process；

Fig. 6 a and Fig. 6 b respectively illustrates the difference metric used in the device of Fig. 1 time dependence before and after average is removed；

The time dependence of Fig. 7 comparing unit resistance and the time dependence of difference metric；

Fig. 8 a and Fig. 8 b respectively illustrates the numeral of the measuring circuit of the device of Fig. 1 and the operation of simulated implementation mode；

Fig. 9 compares the impact on the drift measured for location mode not at the same level of the difference metric of the device using initial resistance tolerance and Fig. 1。

Figure 10 illustrates how mean difference tolerance changes along with the cell level of storage；And

Figure 11 is the schematic diagram of PCM cell, effective amorphous state thickness of this schematic diagram indicating member。

Detailed description of the invention

Fig. 1 is the rough schematic view of the phase change memory device embodying the present invention。Device 1 includes the phase transition storage 2 for storing data in one or more integrated array of multistage PCM cell。Although illustrating as single piece in the drawings, but it is said that in general, memorizer 2 can include any desired configuration of PCM memory cell, the scope of this configuration is such as from one single chip or nude film to multiple storage groups of each self-contained multiple storage chip packaging bodies。Read and performed by read/write device 3 to memorizer 2 write data。Device 3 include for PCM cell write data and for carrying out unit measurement thus allowing to determine the data write of the data of location mode and storage of therefore reading back and reading measuring circuit 4。Indivedual PCM cell can be addressed by applying appropriate voltage to the wordline in memorizer overall 2 and digit line array by circuit 4 for write and the purpose read。This process is performed by the known manner except in the way of being such as detailed description below。As described more specifically below, the operation of the overall upper controller 3 of read/write control device 5, and include for carrying out derivation unit state measurement according to reading measurement and determining the function of (i.e. level detection) for this tolerance being used for location mode。Generally speaking, it is possible in hardware or software or its combination, implement the function of controller 5, but for speed of operation reason and it is generally preferred that use hard-wired logic circuits。Suitable implementation is by clear by those skilled in the art according to description here。Shown in block 6 in Fig. 6, the write being generally subject to a certain form to the user data of equipment 1 input before supplying to read/write device 3 as write data processes, such as the coding of error correction purpose。Similarly, the data of reading back of device 3 output generally are processed to recover former input user data by the reading process module 7 such as performing codeword detection and error-correction operation。Such process of module 6 and 7 is independent of location mode gauging system to be described, and here without specifically being discussed。

Each multi-level unit in multi-level unit in memorizer 2 can be arranged to s corresponding to amorphous state/crystalline state different from unit predefined resistance stages, wherein s > 2。Limit resistance value not at the same level and be not generally spaced not etc., typically drop in log-domain。In this object lesson, s=8, wherein each unit can store eight grades, thus providing three storages of each unit。In order to given unit write data, circuit 4 applies potential pulse so that unit to be arranged to the state corresponding with proper resistor level。Fig. 2 illustrates how cell resistance changes along with the applying voltage for PCM cell。It is the logarithm obtaining (on average) cell resistance R for the applying potential pulse of increasing degree Vg that this width illustrates the average programming curve of the array for 60 8 grades of PCM cell。Eight predefined resistance stages R0 to R7 are indicated by the horizontal line in figure。The resistance of left side (left side of dotted line vertical line at Vg=1.5 volt) the demonstration programming of programming curve is how initially along with voltage increases from 0 volt and reduces。This increases owing to the crystallization in the chalcogenide material of unit。Vg=1.5 volt corresponds to maximum crystalline state at this。Subsequently, increase voltage and cause increase fusing, thus the bigger effective volume of the Amorphous Phase in generation unit。This makes to increase along right programming curve shown in the right side of dotted line vertical line in the resistance such as figure of programming。Traditionally, by unit programming is come to the unit write data in the device of Fig. 1 by the right programming slope of the curve at Fig. 2。

Read the state that memory cell relates to determining unit, which predefined level that namely detection unit is configured in predefined level R0 to R7。In conventional device, this is by carrying out directly having measured of cell resistance。Specifically, carry out the measurement of cell current for the given voltage that applies, and calculate and use cell resistance as the location mode tolerance comparing to determine location mode with predefined level。The subthreshold region of current ratio voltage (I/V) characteristic of unit performing this measurement, not affecting location mode thus measuring。I/V characteristic is strong nonlinearity in subthreshold region, wherein will measure different resistance at different bias voltages。The drawing of the logarithm R of this comparison time from Fig. 3 is made apparent from, illustrated therein is the measurement resistance of PCM cell and reduce along with applying voltage increase。This width figure illustrates the drift impact on resistance measurement with will also recognize that。Specifically, the resistance of Amorphous Phase increases approx according to the following formula over time: R (t)=R₀(t/t₀)^v, wherein logR (t)=logR₀+Vlog(t/t₀), wherein v is considered as the drift exponent proportional to the volume of the Amorphous Phase in the active regions of PCM cell。Have shown that drift exponent increases along with temperature and increases。Drift is the random phenomenon that can be considered as nonstationary noise, is therefore difficult to prediction。

The device 1 of Fig. 1 uses a kind of method for determining location mode, and the method uses the tolerance of the slope depending on subthreshold value I/V characteristic。This can provide the tolerance independent of absolute unit resistance。In order to read unit, read measuring circuit 4 and carry out depending on multiple measurements of the subthreshold value I/V characteristic of unit。In this example embodiment, it is thus achieved that the simple metric relevant with subthreshold value I/V slope is at a certain bias voltage V₁Cell resistance R₁Logarithm from different voltage V₂Cell resistance R₂Logarithm between difference。Owing to subthreshold value I/V slope keeps nearly constant over time, so difference metric LogR₁-LogR₂To have same nature。Although it is true that LogR₁And LogR₂The two will significantly fluctuate and increase over time on average, but their fluctuation will remove being correlated with in a large number due to the such mode of common component drifting about caused of they they to be subtracted each other。Residual components is owing to mainly unrelated and be not by the noise that causes of drift and other fluctuation。Noting, this mode not drift character about the function as the time is specifically assumed。Can effectively remove any any drift characteristic (being considered as the function of time)。

In the read operation of device 1, measuring circuit 4 detects and is applying first (subthreshold value) voltage V₁Time flow through the electric current I of unit₁With apply second (subthreshold value) voltage V₂Time electric current I₂。Gained resistance measurement R is exported to controller 5₁=V₁/I₁And R₂=V₂/I₂。Then controller 5 calculates difference metric logR₁-logR₂。This can be implemented in controller 5 in numeral or analog domain via simple differencing amplifier circuit as shown in Figure 4。Owing to gained tolerance depends on resistance difference, so tolerance depends on the slope of I/V characteristic, but it is not dependent on any absolute resistance (therefore for absolute current or voltage) value。As discussed much earlier, subthreshold value I/V slope is the function of the effective amorphous state volume in unit and is therefore that location mode is measured。Then difference metric is also the characteristic of location mode。Therefore difference metric can be used to distinguish between different storage levels and be not substantially affected by drift effect for reason explained above。The following description of result by experiment is demonstrated by this。

First look back Fig. 3, observe that the measurement of the log ((t)) at different voltages differs only by constant。Therefore, the structure Relaxation (drift) of material should at least in low-voltage (without annealing) independent of voltage。Adopt with drag to illustrate to measure:

R (t, V_i)=R_i+w(t)

Wherein w (t) is zero-mean time function, R_iOnly rely upon V_i, and r () is for representing log (R ())。Therefore:

The average E of average obtained relative to the time is given by:

E [r (t, V_i)]=Ri,

And therefore:

R (t, V_i)-E [r (t, V_i)]=w (t) is for all (i)。

This is supported by Fig. 5, the figure shows the result of Fig. 3 after average is removed。If presently contemplated at different voltage V_i、V_kDifference DR (t, V between the paired r (t) measured_{I, k}):

DR (t, V_{I, k})=r (t, V_i)-r (t, V_k)=R_i-R_k

This difference is independent of (t), and namely comparison time is constant。Therefore, all waveform DR (t, V_{I, k}) should be constant (slope=0) over time。Noting, this difference metric does not assume that any of drift characteristic knows (namely w (t) can be arbitrary)。These predictions are clearly subject to Fig. 6 a and Fig. 6 b and support。Fig. 6 a for different voltages to V_i、V_kDepict difference metric by logarithmic time, and Fig. 6 b illustrates and removes (DR (t, V in average_{I, k})-E [DR (t, V_{I, k})]) after identical result。

Fig. 7 illustrates and measures directly comparing between (by the absolute resistance of logarithmic scale) at the difference metric D of the function as logarithmic time with conventional initial resistance。Solid line provides the fitting a straight line of the result for each trace。This difference metric of more clearly demonstrating less depends on raw metric。Therefore difference metric can provide and substantially do not change with drift and do not understand drift characteristic (such as whether logR (t) is proportional to log (t) or other drift model any) still exercisable measurement。

Although naive model used above is to illustrate to measure, it may be assumed that the power law behavior of R comparison time considers the model of more refining (common drift model) of the R (t) in different voltage measurements。According to standard drift model:

Log [R (t)]=α (R₀)+vlogt, wherein R₀=R (0), v: drift power law index, and assume t₀=1 and without loss of generality。

Use is refined model:

Log [R (t, V_i)]=α (R₀, V_i)+(v+w_i)logt

Wherein average E_i{_wi}=0, v depends on R level and w_i< < v, difference metric takes following form:

Log [R (t, V_i)]-log [R (t, V_k)]=[α (R₀, V_i)-α(R₀, V_k)]+(w_i-w_k)logt。

Section 1 in square brackets is here the measurement of R (0) and has along with | V_i-V_k| the value of growth。Section 2 is the minorant (w of time_i< < v)。May then pass through the quality (time invariance, variance) on average improving tolerance:

E{log [R (t, V_i)]-log [R (t, V_k)]=E [α (R₀, V_i)-α(R₀, V_k)]

This formula illustrates without time dependence。Here Vi, Vk can be averaged by multiple different voltages。Such averaging process can be implemented in a simple manner decoupled in the device of Fig. 1。During unit read operation, measuring circuit 4 detects in some different cell current applying bit line (BL) voltage。This in Fig. 8 a for digital circuit mode and in figure 8b for simulation embodiment illustrated。Supplying the gained resistance measurement (V/I) at each voltage to controller 5, this controller calculates the difference between these resistance values paired and by result on average to obtain final mean difference tolerance。

The slope of slope and the equivalent waveform being used for original (definitely) resistance tolerance that the mean difference for different units level is measured comparison time waveform by Fig. 9 compares。These slopes are the estimations of drift exponent, and result is clearly shown that the more dominance energy that mean difference is measured。

Drift-the resistance of difference metric of having demonstrated is that location mode is measured, and solves now level and distinguishes problem。In order to effectively, tolerance is certainly necessarily dependent upon level and realizes the level detection with good nargin ideally。Figure 10 illustrates that how mean difference tolerance changes along with the resistance stages of storage, wherein as described above to multiple voltages to being averaged。This demonstration difference metric is fully distinguished between the memory resistor level that will act as the measurement of effective location mode。Can by being compared to perform level detection by the mean difference obtained for unit tolerance and multiple predetermined reference values in the controller 5 of device 1。Reference value can such as corresponding to limiting the precalculated metric of different units level or such as lower threshold value, these threshold values are limited to the border between the corresponding metric scope being considered as being mapped to different units level。Therefore the tolerance simply comparing calculating in the controller 5 produce the cell level of storage with reference value。As discussed above, then gained data of reading back are exported for further reading process so that restoring user data by controller 5。

It will be appreciated that by utilizing the location mode tolerance described, above-described embodiment can implement a kind of new technique determined for PCM cell state, and the information wherein fetched is not substantially affected by drift effect。This technology can not carry out any about drift character itself it is assumed that it does not cause any inherent user's memory capacity loss yet。Therefore device 1 may be constructed novel MLCPCM device, the enhancing performance that the location mode measurement technology that this devices use is new is combined with implementation simplicity with offer。

Will of course be understood that and example described above embodiment can be carried out many changes and amendment。Such as it is contemplated that other tolerance various depending on PCM cell subthreshold value I/V characteristic。Another difference being simply measured as between the logarithm of the cell current of different bias voltage Vi, Vk or the difference being equivalent between the logarithm measuring voltage of different constant current level can be obtained。Although using the logarithm of the quantity detected here, but other function that these quantity can be used when calculating difference metric or the value itself even detected。In addition, there is provided the rough figure to I/V slope to approach (but this rough figure is approached and had the characteristic (time invariance, R level dependency) similar to I/V slope) although simple difference is measured, but be it desired to, more preferably numerical radius and this utilization more preferably numerical radius can be used can to provide the accuracy of raising。Numerical radius to function derivative is the theme done much research on, and various probabilities here will be clear for those skilled in the art。Other relevant with subthreshold value I/V slope is likely in the consideration of the difference metric that tolerance proposes from this background of analysis expression formula to the conduction sub-threshold range to be above made apparent from。Below with reference to Figure 11, object lesson is described。

Figure 11 is the schematic diagram of PCM cell, wherein shade hemisphere representative unit, thickness be t_gstThe effective volume of the Amorphous Phase enlivened in volume。Amorphous state volume has effective thickness u as shown in FIG._a。Think that conduction in amorphous state chalkogenide is jumped owing to carrier hot activation between local defect state (trap)。It is the pul (Poole) conduction (Ielmini-Zhang) for high defect concentration for two main models of the conduction limited by trap in Amorphous Phase and the pul-Frank (Poole-Frenkel) for fabricating low-defect-density conducts。These models are at temperature T, effective amorphous state thickness U_aThe cell current I dependency to applying voltage V is expressed with other parameter aspects various。In pul conduction model, it is possible to show difference metric:

$\mathrm{DIM}=\ln \left(R_2\right)-\ln \left(R_1\right)$

$=\ln \left(I_2\right)-\ln \left(I_1\right)+\ln (V_2/V_1)$

$=\frac{\mathrm{qdz}}{{2k}_B{\mathrm{Tu}}_a}*(V_1-V_2)+\ln (V_2/V_1)$

Wherein dz is average trap spacing, k_BIt is Boltzmann constant, and q is the electric charge on electronics。It is likewise possible to estimate u_aFor:

$u_a=\frac{\mathrm{qdz}}{{2k}_B{\mathrm{Tu}}_a}*\left[\frac{V_1-V_2}{\ln \left(I_1\right)-\ln \left(I_2\right)}\right]$

The effective amorphous state thickness u estimated in this way_aLocation mode tolerance can be used as in the alternative of the present invention。

Similarity analysis for pul-Frank model shows difference metric:

$\mathrm{DIM}=\ln \left(R_2\right)-\ln \left(R_1\right)$

$=\ln \left(I_2\right)-\ln \left(I_1\right)+\ln (V_2/V_1)$

$=\frac{q^{3/2}}{k_{B}T\sqrt{\mathrm{\&pi;\&epsiv;}}\sqrt{u_a}}*(\sqrt{V_1}-\sqrt{V_2})$

Wherein ε is effective dielectric constant。It is likewise possible to estimateFor:

$\sqrt{u_a}=\frac{q^{3/2}}{k_{B}T\sqrt{\mathrm{\&pi;\&epsiv;}}\sqrt{u_a}}*\left(\frac{\sqrt{V_1}-\sqrt{V_2}}{\ln \left(I_1\right)-\ln \left(I_2\right)-\ln (V_1/V_2)}\right)$

The parameter estimated in this wayLocation mode tolerance can also be used as in an alternative embodiment。

Note that hope, then embodiments of the invention can utilize other technology to improve performance with units described above state measurement system。Location mode gauging system can give the performance of especially enhancing as coding combines advisably to tackle to drift about with other technology。As another example, it is possible to by based on based on the correction technology of reference unit or model, on dynamic basis, such as update termly level detect in use reference value。Can also by along route discussed above by result on average suppress measure in uncorrelated noise。

Can to describe example embodiment carry out many other change and amendment and without departing from the scope of the present invention。

Claims (12)

1. the method for determining the state of phase-changing memory unit, described method includes:

Carry out depending on multiple measurements of the subthreshold current comparison voltage characteristic of described unit；

Process described measurement and depend on the described current ratio tolerance to the slope of voltage characteristic to obtain, including the multiple measurements carrying out cell resistance at different bias voltages, described tolerance depends on the measurement of the difference between the logarithm of the cell resistance measured by different bias voltage places；And

The state of described unit is determined according to described tolerance。

2. the method for claim 1, for determining the state of s level phase-changing memory unit, wherein s > 2, described method includes the state by multiple reference values of described tolerance with the described s level indicating described unit are compared to determine described unit。

3. method as described in claim 1 or 2, it is additionally included in different units bias voltage and carries out multiple measurements of cell current, wherein said tolerance depends on the difference of the function in the cell current measured by described different bias voltage places, and the function of wherein said measured cell current includes the logarithm of this value。

4. method as described in claim 1 or 2, also include the multiple measurements carrying out crossing over the voltage of described unit for different applying unit electric currents, wherein said tolerance depends on the difference of the function in the cell voltage measured by different applying electric current places, and the function of wherein said measured cell voltage includes the logarithm of this value。

5. the method for claim 1, wherein said tolerance depends on the effective amorphous state thickness (u in described unit_a)。

6. method as claimed in claim 5, wherein said tolerance includes the effective amorphous state thickness (u in described unit_a) estimation。

7. method as described in claim 1 or 2, carries out the described measurement of more than two, and wherein said process includes meaning process。

8., for determining a device for the state of phase-changing memory unit, described device includes:

Measuring circuit (4), for carrying out depending on multiple measurements of the subthreshold current comparison voltage characteristic of described unit, wherein said measuring circuit (4) is suitable to carry out multiple measurements of cell resistance at different bias voltage places；And

Controller (5), the described current ratio tolerance to the slope of voltage characteristic is depended on to obtain for processing described measurement, wherein said controller (5) is suitable to determine that according to described tolerance the state of described unit, wherein said tolerance depend on the difference between the logarithm of the cell resistance measured by different bias voltage places。

9. device as claimed in claim 8, for determining the state of s level phase-changing memory unit, wherein s > 2, described controller (5) is suitable to the state by multiple reference values of described tolerance with the described s level indicating described unit are compared to determine described unit。

10. the device as described in claim 8 or 9, wherein said measuring circuit (4) is further adapted for carrying out multiple measurements of cell current at different units bias voltage place, and wherein said tolerance depends on the difference in the function of the cell current measured by described different bias voltage places, and the function of wherein said measured cell current includes the logarithm of this value。

11. the device as described in claim 8 or 9, wherein said measuring circuit (4) is further adapted for carrying out crossing over multiple measurements of the voltage of described unit for different applying unit electric currents, and wherein said tolerance depends on the difference of the function in the cell voltage measured by different applying electric current places, the function of wherein said measured cell voltage includes the logarithm of this value。

12. a phase change memory device (1), including:

Memorizer (2), including multiple phase-changing memory units；And

Read/write device (3), for reading and write the data in described phase-changing memory unit, wherein said read/write device (3) includes the device of the state for memory cell as described in determining as described in any claim in claim 8 to 11。