CN103065750A - Piezoresistor with preset invalidity breakdown points and preparation method of piezoresistor - Google Patents
Piezoresistor with preset invalidity breakdown points and preparation method of piezoresistor Download PDFInfo
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- CN103065750A CN103065750A CN2013100255222A CN201310025522A CN103065750A CN 103065750 A CN103065750 A CN 103065750A CN 2013100255222 A CN2013100255222 A CN 2013100255222A CN 201310025522 A CN201310025522 A CN 201310025522A CN 103065750 A CN103065750 A CN 103065750A
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Abstract
The invention discloses a piezoresistor with preset invalidity breakdown points and a preparation method of the piezoresistor. The piezoresistor comprises a piezoresistor chip; and the plane of the piezoresistor chip is provided with concave points, or the plane of the piezoresistor chip is concave and is provided with the invalidity breakdown points. The preparation method comprises the following steps of: (1) firstly, compressing powder formed by ingredient granulation into a piezoresistor blank sheet with concave points or a concave piezoresistor blank sheet; (2) then, sintering the compressed piezoresistor blank sheet at a high temperature to form a piezoresistor magnet; and (3) covering metal electrodes on the two faces of the sintered piezoresistor magnet, and reducing the piezoresistor magnet to the piezoresistor chip with electric performance after passing through a high-temperature furnace. According to the invention, conductive voltage and the characteristics of service voltage are determined according to the thickness of the piezoresistor chip, and under the condition of not influencing other parameter indexes, the invalidity breakdown points are preset artificially for breakdown of fixed voltage points under special conditions, so that a protective device is convenient to be installed purposefully, and accidents can be reduced.
Description
Technical field
The present invention relates to a kind of piezo-resistance that presets the inefficacy breakdown point and preparation method thereof.
Background technology
Existing zinc oxide varistor (Metal Oxide Varistors) has special nonlinear current-voltage.In case abnormal situation in the use, such as meeting with thunderbolt, the interference of electromagnetic field, mains switch frequent movement, power system failure so that voltage is uprushed on the circuit, surpass the conducting voltage of varistor, will enter the conducting district.This moment, electric current (I) and voltage (V) were non-linear relation, generally were referred to as non linear coefficient (Nonlinearity Parameter), and its value can reach tens of or up to a hundred.At this moment, piezo-resistance impedance meeting step-down only has several ohms, allows overvoltage form burst current and flows out, and uses electronic product or expensive component that protection connects.
Owing to when piezo-resistance is used being and connecing power line two ends, failure mode is puncture short, and in the moment of losing efficacy and puncturing, voltage is sought the weak spot that stays in the chip varistor manufacture process and is punctured often, again because of the factor of material technology, the weak spot of each chip can not be determined again, so the puncture short point is to occur at random on the arbitrfary point on voltage dependent resistor chip plane, make its attached releasing mechanism that uses safety be difficult for catching, and random puncture can cause the inefficacy of protection and Niang Cheng Shi therefore.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of piezo-resistance that presets the inefficacy breakdown point and preparation method thereof for above-mentioned the deficiencies in the prior art, and this piezo-resistance can solve the randomness of puncture short, so that the product safety and reliability; This preparation method is simple, reasonable.
The technical solution adopted in the present invention is: a kind of piezo-resistance that presets the inefficacy breakdown point, it comprises voltage dependent resistor chip, it is characterized in that the plane that is provided with concave point or described voltage dependent resistor chip on the plane of described voltage dependent resistor chip is spill, formation-inefficacy breakdown point.
By technique scheme, on one side or the two sides of voltage dependent resistor chip concave point or spill are set.
By technique scheme, described concave point or spill are spherical cambered surface.
By technique scheme, the recessed degree of depth of described concave point or spill is 0.05 ~ 1mm.
By technique scheme, the concave point on the described voltage dependent resistor chip or spill are formed by compressing or grinding.
A kind of preparation method who presets the piezo-resistance of inefficacy breakdown point, it comprises the steps:
(1) powder that will prepare burden after the granulation is pressed into piezo-resistance base sheet with concave point or spill by tablet press machine and mould;
(2) the piezo-resistance base sheet after will suppressing again carries out high temperature sintering, and sintering temperature is 900 ℃ ~ 1300 ℃, and sintering time is 15-30 hours, forms the piezo-resistance magnet, and its Rockwell hardness is 6.5 ~ 8.2;
(3) with the two sides covering metal electrode of the piezo-resistance magnet behind the sintering, be reduced into the voltage dependent resistor chip with electrical property after 0.5 ~ 4 hour through high temperature furnace, the temperature in the high temperature furnace is 480 ℃ ~ 670 ℃.
By technique scheme, used mould comprises mold, bed die, middle mould in the step (1), the compacting end face of described upper/lower die, and-end is provided with salient point or two ends are provided with salient point.
By technique scheme, used mould comprises mold, bed die, middle mould in the step (1), the compacting end face of described upper/lower die, and-end is convex or two ends are convex.
The obtained beneficial effect of the present invention is:
1, because the thickness of voltage dependent resistor chip determines conducting voltage, determine again to use voltage, do not affecting under other parameter index, artificial make concave point or spill to form the inefficacy breakdown point at voltage dependent resistor chip, puncture for constant-voltage point under the unusual situation, be convenient to the protector specific aim and install, the minimizing accident occurs;
2, when concave point or spill are spherical cambered surface, be convenient to processing most;
3, this piezo-resistance has solved the randomness of puncture short, so that the product safety and reliability;
4, the preparation method of this piezo-resistance is simple, reasonable, workable, does not increase raw material, does not increase operation, does not increase input, the same course of processing, and same machining period is produced the product of safety and reliability;
5, can breakdown point be set for existing protector, the industrial chain upstream is used does not increase any cost, and cost performance is high.
Description of drawings
Fig. 1 is the structural representation of the voltage dependent resistor chip of the first embodiment of the present invention.
Fig. 2 is the compacting view among the first embodiment of the present invention.
Fig. 3 is the structural representation of the voltage dependent resistor chip of the second embodiment of the present invention.
Fig. 4 is the compacting view among the second embodiment of the present invention.
Fig. 5 is the structural representation of the voltage dependent resistor chip of the third embodiment of the present invention.
Fig. 6 is the compacting view among the third embodiment of the present invention.
Fig. 7 is the structural representation of the voltage dependent resistor chip of the 4th kind of embodiment of the present invention.
Fig. 8 is the compacting view among the 4th kind of embodiment of the present invention.
Embodiment
The invention will be further described below in conjunction with accompanying drawing.
Embodiment 1:
As shown in Figure 1, a kind of piezo-resistance that presets the inefficacy breakdown point, it comprises voltage dependent resistor chip 1, is provided with one or more concave point 2 in the one side of described voltage dependent resistor chip, forms the inefficacy breakdown point.
Described concave point 2 is spherical cambered surface.Because the edge of the electrode slice that the voltage dependent resistor chip both sides arrange is chosen as more than the 1.5mm apart from the distance priority at pressure-sensitive electrode chip edge, therefore the distance priority at the edge of described concave point 2 and voltage dependent resistor chip edge is selected more than or equal to 1.5mm, such as S zone among Fig. 1, the convenient puncture is convenient to the disengaging of hot releasing mechanism.When voltage dependent resistor chip 1 arranges a plurality of concave point, they can be the marshalling shapes, also can be mixed and disorderly unordered shapes.The recessed degree of depth of described concave point is 0.1mm.Certainly, the shape of concave point also can for taper shape or rectangle be square or oval or triangular pyramidal, also can not limit to above-mentioned shape, can be random geometry.Preferentially select in actual applications spherical cambered surface to be convenient to processing.
Operation principle of the present invention is: the characteristic of utilizing the thickness decision piezo-resistance use voltage of voltage dependent resistor chip, in manufacture process, preset-individual or a plurality of concave points, form the inefficacy breakdown point, solve the randomness of puncture short, so that the product safety and reliability.This principle is suitable for the complete series Zinc-oxide piezoresistor.
The preparation method of this piezo-resistance comprises the steps:
(1) powder that will prepare burden first after the granulation is pressed into piezo-resistance base sheet 7 with concave point by tablet press machine and mould;
(2) the piezo-resistance base sheet that will suppress again carries out high temperature sintering, and sintering temperature is 900 ℃, and sintering time is 30 hours, forms the piezo-resistance magnet, and its Rockwell hardness is 6.5;
(3) (metal electrode covers apart from the zone more than the voltage dependent resistor chip edge 1.5mm with the two sides covering metal electrode of the piezo-resistance magnet behind the sintering, such as the zone of the S among Fig. 1), be reduced into the voltage dependent resistor chip with electrical property after 4 hours through high temperature furnace, the temperature in the high temperature furnace is 480 ℃.
As shown in Figure 2, used mould comprises mold 3, bed die 4, middle mould 5 in the step (1), and the compacting end face of described mold 3 is provided with one or more salient points 6, when a plurality of salient point 6 is set, they can be the marshalling shapes, also can be mixed and disorderly unordered shapes.The shape of described salient point 6 is corresponding with the shape of concave point 2.
Fig. 3 shows another specific embodiment of the present invention, and as seen from Figure 3, the structure of this piezo-resistance is substantially the same manner as Example 1, and difference is: concave point 2 is arranged on the two sides of voltage dependent resistor chip 1, and it can be symmetric also can be asymmetric distribution.The recessed degree of depth of concave point is 1mm among this embodiment.
The preparation method of this piezo-resistance comprises the steps:
(1) powder that will prepare burden first after the granulation is pressed into piezo-resistance base sheet 7 with concave point by tablet press machine and mould;
(2) the piezo-resistance base sheet that will suppress again carries out high temperature sintering, and sintering temperature is 1100 ℃, and sintering time is 26 hours, forms the piezo-resistance magnet, and its Rockwell hardness is 7.1;
(3) with the piezo-resistance magnet two sides covering metal electrode behind the sintering, be reduced into the voltage dependent resistor chip with electrical property after 3 hours through high temperature furnace, the temperature in the high temperature furnace is 510 ℃.
As shown in Figure 4, the compacting end face of described mold 3 and the compacting end face of bed die 4 are respectively equipped with one or more salient points 6, and when a plurality of salient point 6 was set, they can be the marshalling shapes, also can be mixed and disorderly unordered shapes.The shape of described salient point 6 is corresponding with the shape of concave point 2.
Fig. 5 shows another specific embodiment of the present invention, as seen from Figure 5, the structure of this piezo-resistance is substantially the same manner as Example 1, and difference is: a plane of described voltage dependent resistor chip is the spherical arc shape spill, and the recessed degree of depth of this embodiment middle concave is 0.8mm.
The preparation method of this piezo-resistance comprises the steps:
(1) powder that will prepare burden first after the granulation is pressed into piezo-resistance base sheet 7 with concave point by tablet press machine and mould;
(2) the piezo-resistance base sheet that will suppress again carries out high temperature sintering, and sintering temperature is 1200 ℃, and sintering time is 20 hours, forms the piezo-resistance magnet, and its hardness is 7.5;
(3) with the piezo-resistance magnet two sides covering metal electrode behind the sintering, be reduced into the voltage dependent resistor chip with electrical property after 2 hours through high temperature furnace, the temperature in the high temperature furnace is 620 ℃.
As shown in Figure 6, the compacting end face of described mold 3 is the spherical arc shape of protrusion.
Fig. 7 shows an again specific embodiment of the present invention, as seen from Figure 7, the structure of this piezo-resistance is substantially the same manner as Example 3, and difference is: the spherical arc shape spill all is arranged on the two sides of described voltage dependent resistor chip 1, and the recessed degree of depth of the spill on two sides is 0.05mm among this embodiment.
The preparation method of this piezo-resistance comprises the steps:
(1) powder that will prepare burden first after the granulation is pressed into piezo-resistance base sheet 7 with concave point by tablet press machine and mould;
(2) the piezo-resistance base sheet that will suppress again carries out high temperature sintering, and sintering temperature is 1300 ℃, and sintering time is 15 hours, forms the piezo-resistance magnet, and its Rockwell hardness is 8.2;
(3) with the two sides covering metal electrode of the piezo-resistance magnet behind the sintering, be reduced into the voltage dependent resistor chip with electrical property after 0.5 hour through high temperature furnace, the temperature in the high temperature furnace is 670 ℃.
As shown in Figure 8, the compacting end face of the compacting end face of described mold 3 and bed die 4 all is the spherical arc shape of protrusion.
Except above-mentioned preparation method, also can adopt conventional method to suppress piezo-resistance base sheet, after high temperature sintering becomes the piezo-resistance magnet, be processed into again the voltage dependent resistor chip of arbitrary shape in above-described embodiment through mechanical grinding.
Above-described embodiment is better embodiment of the present invention; but embodiments of the present invention are not restricted to the described embodiments; other any do not deviate from change, the modification done under Spirit Essence of the present invention and the principle, substitutes, combination, simplify; all should be the substitute mode of equivalence, be included within protection scope of the present invention.
Claims (8)
1. piezo-resistance that presets the inefficacy breakdown point, it comprises voltage dependent resistor chip, it is characterized in that the plane that is provided with concave point or described voltage dependent resistor chip on the plane of described voltage dependent resistor chip is spill, forms the inefficacy breakdown point.
2. a kind of piezo-resistance that presets the inefficacy breakdown point according to claim 1 is characterized in that on one side or the two sides of voltage dependent resistor chip concave point or spill being set.
3. a kind of piezo-resistance that presets the inefficacy breakdown point according to claim 2 is characterized in that described concave point or spill are spherical cambered surface.
4. according to claim 1 and 2 or 3 described a kind of piezo-resistances that preset the inefficacy breakdown point, the recessed degree of depth that it is characterized in that described concave point or spill is 0.05 ~ 1mm.
5. a kind of piezo-resistance that presets the inefficacy breakdown point according to claim 1 and 2 is characterized in that concave point or the spill on the described voltage dependent resistor chip formed by compressing or grinding.
6. a preparation method who presets the piezo-resistance of inefficacy breakdown point is characterized in that it comprises the steps:
(1) powder that will prepare burden after the granulation is pressed into piezo-resistance base sheet with concave point or spill by tablet press machine and mould;
(2) the piezo-resistance base sheet after will suppressing again carries out high temperature sintering, and sintering temperature is 900 ℃ ~ 1300 ℃, and sintering time is 15-30 hours, forms the piezo-resistance magnet, and its Rockwell hardness is 6.5 ~ 8.2;
(3) with the two sides covering metal electrode of the piezo-resistance magnet behind the sintering, be reduced into the voltage dependent resistor chip with electrical property after 0.5 ~ 4 hour through high temperature furnace, the temperature in the high temperature furnace is 480 ℃ ~ 670 ℃.
7. a kind of preparation method who presets the piezo-resistance of inefficacy breakdown point according to claim 12, it is characterized in that used mould comprises mold, bed die, middle mould in the step (1), the compacting end face of described upper/lower die ,-end is provided with salient point or two ends are provided with salient point.
8. a kind of preparation method who presets the piezo-resistance of inefficacy breakdown point according to claim 12, it is characterized in that used mould comprises mold, bed die, middle mould in the step (1), the compacting end face of described upper/lower die ,-end is convex or two ends are convex.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2013100255222A CN103065750A (en) | 2013-01-22 | 2013-01-22 | Piezoresistor with preset invalidity breakdown points and preparation method of piezoresistor |
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| CN2013100255222A CN103065750A (en) | 2013-01-22 | 2013-01-22 | Piezoresistor with preset invalidity breakdown points and preparation method of piezoresistor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109256247A (en) * | 2017-07-13 | 2019-01-22 | 成都铁达电子有限责任公司 | The ceramic matrix and varistor of varistor |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4157527A (en) * | 1977-10-20 | 1979-06-05 | General Electric Company | Polycrystalline varistors with reduced overshoot |
| US4364021A (en) * | 1977-10-07 | 1982-12-14 | General Electric Company | Low voltage varistor configuration |
| CN1962539A (en) * | 2006-11-30 | 2007-05-16 | 华南理工大学 | Zinc oxide base high potential gradient pressure-sensitive ceramic material and its preparation method and uses |
-
2013
- 2013-01-22 CN CN2013100255222A patent/CN103065750A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4364021A (en) * | 1977-10-07 | 1982-12-14 | General Electric Company | Low voltage varistor configuration |
| US4157527A (en) * | 1977-10-20 | 1979-06-05 | General Electric Company | Polycrystalline varistors with reduced overshoot |
| CN1962539A (en) * | 2006-11-30 | 2007-05-16 | 华南理工大学 | Zinc oxide base high potential gradient pressure-sensitive ceramic material and its preparation method and uses |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109256247A (en) * | 2017-07-13 | 2019-01-22 | 成都铁达电子有限责任公司 | The ceramic matrix and varistor of varistor |
| CN109256247B (en) * | 2017-07-13 | 2020-07-24 | 成都铁达电子股份有限公司 | Ceramic matrix of piezoresistor and piezoresistor |
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Application publication date: 20130424 |