CN103051829B - Raw image data noise reduction system based on FPGA platform and noise-reduction method - Google Patents
Raw image data noise reduction system based on FPGA platform and noise-reduction method Download PDFInfo
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- CN103051829B CN103051829B CN201210526985.2A CN201210526985A CN103051829B CN 103051829 B CN103051829 B CN 103051829B CN 201210526985 A CN201210526985 A CN 201210526985A CN 103051829 B CN103051829 B CN 103051829B
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Abstract
A kind of raw image data noise reduction system based on FPGA platform and noise-reduction method, including: template generation module, mean filter module, data analysis select module and data outputting module, and above-mentioned each sequence of modules is connected;Template generation module arranges 5 FIFO memory;Mean filter module carries out mean filter process to raw image data, noise variance;Data analysis selects module, and according to view data and corresponding noise, the value under different step-lengths calculates the scope of each step-length hypograph signal, selects optimum step-length according to this scope.The present invention uses mean filter to filter noise, calculates the average under different step-length, by analyzing noise information, the mean filter result of adaptively selected optimal step size.The present invention is applied to the noise reduction of real-time video initial data, has the advantages that implementation complexity is low, anti-acoustic capability is good.
Description
Technical field
The present invention relates to the technical field of Computer Vision, a kind of original image number based on FPGA platform
According to noise reduction system and noise-reduction method.
Background technology
The noise being mixed into during imageing sensor gathers picture signal is mainly Gaussian noise and salt-pepper noise, wherein
Gaussian noise becomes Gauss distribution, is mainly produced by resistive components and parts are internal, and that the cutting of salt-pepper noise mainly image causes is black
White point noise on image or photoelectric conversion process produce poisson noise.The main target of video image denoising is to filter wherein
Noise, kept detailed information as far as possible simultaneously, and required the video image after noise reduction reduces owing to filtering introduces
Vision degrades.
Video image denoising technology is not only able to noise, the raising video image subjective vision matter filtering in video image
Amount, and significant for subsequent treatment tasks such as compressed encoding, target recognition and tracking, frame frequency liftings.Existing regards
Frequently image noise reduction algorithm can be divided into two classes: pixel domain noise reduction algorithm in early days and Transformation Domain noise reduction algorithm in recent years.
According to the filter range of wave filter, pixel domain noise reduction algorithm can be divided into time-domain filtering algorithm and space-time filtering is calculated
Method.Time-domain filtering algorithm utilizes the dependency in video image time domain to suppress noise, is typically based on motion estimation/motion compensation
Method obtains time domain prediction;And space-time filtering algorithm be utilize in video image three dimensions empty time dependency filter and make an uproar
Sound.The major defect of pixel domain noise reduction algorithm is exactly to be readily incorporated time domain in the video image after noise reduction to degrade, excessively smooth
Spatial domain degrades, and does not the most also have a kind of noise reduction algorithm being suitable for multiple level of noise.Additionally, in pixel domain noise reduction algorithm
The relevant informations used in estimation acquisition time domain more, but the existence of noise easily affects the accuracy of estimation, thus
Reduce anti-acoustic capability.
Summary of the invention
The technical problem to be solved in the present invention be to provide a kind of raw image data noise reduction system based on FPGA platform and
Noise-reduction method.
The present invention solves that technical problem is adopted the technical scheme that present in known technology:
The raw image data noise reduction system based on FPGA platform of the present invention, it is characterised in that including: template generation mould
Block, mean filter module, data analysis select module and data outputting module, and above-mentioned each sequence of modules is connected;Template generation
Module arranges 5 FIFO memory, respectively FIFO1, FIFO2, FIFO3, FIFO4 and FIFO5;Mean filter module is to former
Beginning view data, noise variance carry out mean filter process, and its output result selects the input of module as data analysis;Data
Analyze and select module to be connected between mean filter module and data outputting module.
The raw image data noise-reduction method based on FPGA platform of the present invention, comprises the following steps:
A, vedio data are input to template generation module, the neighborhood template of use 1 × 5 row data to video image
Process, respectively odd-numbered line vedio data and even number line vedio data are processed, result is cached
To 5 FIFO, each FIFO can cache data line, and when the 5th row data arrive, 5 FIFO have cached a line
Data, have cached the 1st row data in FIFO1, cached the 2nd row data in FIFO2, and FIFO3 has cached the 3rd row data, FIFO4
Cache the 4th row data, FIFO5 has cached the 5th row data, calculate corresponding noise side according to the amplitude size of input noise
Difference;
B, the 5 row raw video image data and the noise variance that are produced template generation module by mean filter module are entered
Row mean filter processes, and calculates raw video image data average under 1,1 × 2,3 × 4 three class step-lengths, and each corresponding
Noise variance average, by result output to data analysis select module;
C: according to vedio data and corresponding noise, the value under different step-lengths calculates each step-length hypograph signal
Scope, select optimum step-length according to this scope;
D, export data by data outputting module.
The present invention has the advantage that with good effect:
In the raw image data noise reduction system based on FPGA platform of the present invention and noise-reduction method, use mean filter
Filter noise, calculate the average under different step-length, by analyzing noise information, the mean filter of adaptively selected optimal step size
Result.The present invention is applied to the noise reduction of real-time video initial data, has the advantages that implementation complexity is low, anti-acoustic capability is good.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the raw image data noise reduction system based on FPGA platform of the present invention.
Detailed description of the invention
Referring to the drawings and embodiment the present invention will be described in detail.
Fig. 1 is the schematic diagram of the raw image data noise reduction system based on FPGA platform of the present invention.
As it is shown in figure 1, the raw image data noise reduction system based on FPGA platform of the present invention, it is characterised in that including:
Template generation module, mean filter module, data analysis select module and data outputting module, and above-mentioned each sequence of modules is connected
Connect;Template generation module arranges 5 FIFO memory, respectively FIFO1, FIFO2, FIFO3, FIFO4 and FIFO5;Average
Filtration module carries out mean filter process to raw image data, noise variance, and its output result selects mould as data analysis
The input of block;Data analysis selects module to be connected between mean filter module and data outputting module.
The ultimate principle of mean filter is: use the initial value that the average of point the most adjoining for certain some A replaces A.This
Invention have employed the mean filter of different step-length, respectively 1,1 × 2,3 × 4, use this three classes step-length, can be effectively real
The primary Calculation of existing noise reduction.
The raw image data noise-reduction method based on FPGA platform of the present invention, comprises the following steps:
A, vedio data are input to template generation module, the neighborhood template of use 1 × 5 row data to video image
Process, respectively odd-numbered line vedio data and even number line vedio data are processed, result is cached
To 5 FIFO, each FIFO can cache data line, and when the 5th row data arrive, 5 FIFO have cached a line
Data, have cached the 1st row data in FIFO1, cached the 2nd row data in FIFO2, and FIFO3 has cached the 3rd row data, FIFO4
Cache the 4th row data, FIFO5 has cached the 5th row data, calculate corresponding noise side according to the amplitude size of input noise
Difference;
B, the 5 row raw video image data and the noise variance that are produced template generation module by mean filter module are entered
Row mean filter processes, and calculates raw video image data average under 1,1 × 2,3 × 4 three class step-lengths, and each corresponding
Noise variance average, by result output to data analysis select module;
C: according to vedio data and corresponding noise, the value under different step-lengths calculates each step-length hypograph signal
Scope, select optimum step-length according to this scope;
D, export data by data outputting module.
The above, be only presently preferred embodiments of the present invention, and the present invention not makees any pro forma restriction, though
So the present invention is open as above with preferred embodiment, but, it is not limited to the present invention, any technology people being familiar with this specialty
Member, in the range of without departing from technical solution of the present invention, can utilize the technology contents of announcement to make a little change or modification certainly, becomes
For the Equivalent embodiments of equivalent variations, as long as being the content without departing from technical solution of the present invention, the technical spirit of the foundation present invention
Any simple modification, equivalent variations and the modification being made above example, belongs in the range of technical solution of the present invention.
Claims (1)
1. an initial data noise-reduction method for raw image data noise reduction system based on FPGA platform, comprises the following steps:
A, vedio data are input to template generation module, use the neighborhood template of 1 × 5 to enter the row data of video image
Row processes, and processes odd-numbered line vedio data and even number line vedio data respectively, result is cached to 5
Individual FIFO, each FIFO can cache data line, and when the 5th row data arrive, 5 FIFO have cached a line
Data, have cached the 1st row data in FIFO1, cached the 2nd row data in FIFO2, and FIFO3 has cached the 3rd line number
According to, FIFO4 has cached the 4th row data, has cached the 5th row data in FIFO5, calculates according to the amplitude size of input noise
Corresponding noise variance;
B, the 5 row raw video image data and the noise variance that are produced template generation module by mean filter module are carried out
Mean filter processes, and calculates raw video image data average under 1,1 × 2,3 × 4 three class step-lengths, and each corresponding
Noise variance average, by result output to data analysis select module;
C, go out each step-length hypograph letter according to vedio data and noise variance mean value computation corresponding under different step-lengths
Number scope, according to this scope select optimum step-length;
D, export data by data outputting module.
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CN105915762B (en) * | 2016-01-18 | 2019-11-29 | 上海斐讯数据通信技术有限公司 | Noise pixel adaptive filter method and noise pixel Avaptive filtering system |
CN106327447B (en) * | 2016-08-30 | 2019-05-03 | 天津天地伟业物联网技术有限公司 | Airspace and pixel domain based on FPGA platform mix noise-reduction method |
CN109544469A (en) * | 2018-11-07 | 2019-03-29 | 南京信息工程大学 | A kind of discrete Kalman's self-adapting image denoising system based on FPGA |
CN110992239B (en) * | 2019-11-14 | 2023-03-24 | 中国航空工业集团公司洛阳电光设备研究所 | Image time domain filtering and displaying method based on single DDR3 chip |
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CN1968419A (en) * | 2005-11-16 | 2007-05-23 | 三星电子株式会社 | Image encoding method and apparatus and image decoding method and apparatus using characteristics of the human visual system |
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