CN103051409B - A kind of short wave channel synchronizer and short wave channel synchronous switching control system - Google Patents

A kind of short wave channel synchronizer and short wave channel synchronous switching control system Download PDF

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CN103051409B
CN103051409B CN201210573969.9A CN201210573969A CN103051409B CN 103051409 B CN103051409 B CN 103051409B CN 201210573969 A CN201210573969 A CN 201210573969A CN 103051409 B CN103051409 B CN 103051409B
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channel
clock
pulse
time
unit
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CN103051409A (en
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胡俊
刘毅敏
朱振飞
张跃宝
王程林
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China Research Institute of Radio Wave Propagation CRIRP
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China Research Institute of Radio Wave Propagation CRIRP
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Abstract

The invention discloses a kind of short wave channel synchronizer and short wave channel synchronous switching control system, described device comprises: reference clock generation unit, for based on synchronous triggering command, receives local clock pulse, and with 1 millisecond for scale, send reference pulse to clock alignment unit; Clock alignment unit, the accumulated error of standard second pulse to local clock sent for utilizing standard clock source is calibrated, and exports the reference pulse after calibration to clock synchronization unit; Clock synchronization unit, for when current time is alignd with channel switch time, starts the reference pulse that receive clock alignment unit sends, and when the number of times receiving reference pulse reaches the times N of setting, output switching trigger impulse; Wherein, N meets N × 1ms and equals channel residence time.Pulse per second (PPS) can be converted into the pulse of 1 millisecond of time scale with local clock by the present invention, reaches the time interval of the random time scale of Millisecond by configuration output accuracy.

Description

A kind of short wave channel synchronizer and short wave channel synchronous switching control system
Technical field
The present invention relates to the channel synchronization technical field of Shortwave Communication System, particularly relate to a kind of short wave channel synchronizer and short wave channel synchronous switching control system.
Background technology
The dispersive channel become when short-wave ionospheric radio channel is a kind of, its channel parameter, if path loss, time delay spread, Noise and Interference etc. are all constantly change with frequency, place, time, therefore in shortwave sky wave communications, shortwave frequency-selecting is the most important prerequisite of transmission success.For a long time, frequency-selecting is carried out in the long-term forecasting of radiothermy frequency, and this method utilizes the optimum frequency under the Changing Pattern prediction average condition of ionospheric structure and Ionospheric Parameters, can instruct the design of short-wave link.But when long-term forecasting being applied to concrete link and special time, often occur sizable error, causing can the problem such as the low and bad channel quality of passband, greatly hinders the development of short wave communication.In recent years, short wave communication link adopt Real-time Channel valuation (RTCE) carry out real-time prediction frequency information and carry out real time frequency selection, from overcoming the fatal disadvantages such as the communication quality caused due to short wave channel parameter time varying is low, unreliable to a great extent.
Real-time Channel estimate method is for particular link, send the detectable signal of certain form, receiving end measures various parameter in one group of predetermined channel, by processing measured data in real time, determine the communication quality index that may reach when this certain communication service of group channel, thus provide reliable frequency resource information for communication line.Therefore no matter Real-time Channel estimate method is adopt in independently detection system, still directly adopts in a communications system, all based on scan channel detection.In asynchronous system, transmitting-receiving two-end be made to stop on the same channel, usually take the way extending transmitting time to improve the reliability of reception, so greatly reduce the real-time of channel guess value.Therefore, the mode of synchronizing channel scanning probe is usually adopted to realize Real-time Channel valuation.In channel synchronization problem, the accurate aligning of channel switch time how is kept to be the key problem that needs solve.
At present, for the wireless communication system of overlength distance, the time synchronizing method the most often used utilizes global GPS/ Big Dipper synchronous satellite, and in system, each equipment of distant distance provides unified reference clock source, the clock cycle property of each equipment and reference clock carry out synchronously.The prerequisite that this method of synchronization can be applied to Real-time Channel valuation system is, the error sum of reference clock and local clock is within channel switch time accuracy allowed band.The time interval between channel switches is the every channel residence time in scan channel detection, determined by the switching capability of detection information length, detection waveform transmission rate and hardware device, generally with millisecond note, need hundreds of to several thousand milliseconds, therefore, channel switch time needs to be accurate to Millisecond.At present, GPS can provide error to be less than the pulse per second (PPS) of 50 nanoseconds, and it is even higher that local clock stable accuracy degree is easy to reach 1ppm, and therefore 1 millisecond of its worst error was no more than for 1 nanosecond, can provide enough synchronised clocks accurately in theory.But, every channel residence time is not the integral multiple of whole second usually, therefore channel switch time may differ certain intervals with whole second, cannot directly utilize GPS pulse per second (PPS) to control switching time, also cannot only utilize GPS pulse per second (PPS) to produce with channel residence time as time scale channel switching interval.Therefore, how to design a kind of scheme, make it that local clock can be utilized GPS pulse per second (PPS) cutting to 1 millisecond calibration clock, and can arbitrary disposition channel residence time as required, export the time interval being time scale with channel residence time, ensure that in communication system, each device synchronization is switched on identical channel, becomes technical problem urgently to be resolved hurrily at present.
Summary of the invention
In view of the above problems, the present invention is proposed to provide a kind of the short wave channel synchronizer and the short wave channel synchronous switching control system that overcome the problems referred to above.
Concrete, according to one aspect of the present invention, provide a kind of short wave channel synchronizer, comprising:
Reference clock generation unit, for based on synchronous triggering command, receives local clock pulse, and with 1 millisecond for scale, sends reference pulse to clock alignment unit;
Clock alignment unit, the accumulated error of standard second pulse to local clock sent for utilizing standard clock source is calibrated, and exports the reference pulse after calibration to clock synchronization unit;
Clock synchronization unit, for when current time is alignd with channel switch time, starts the reference pulse receiving the transmission of described clock alignment unit, and reaches the times N of setting at the number of times receiving reference pulse ' time, output switching trigger impulse; Wherein, N ' meets N ' × 1ms and equals channel residence time.
Further, in device described in the embodiment of the present invention, described reference clock generation unit, specifically for after an initial power up, detect the standard second pulse whether receiving sign on and standard clock source transmission, if, then start to receive local clock pulse, and be scale with millisecond, when reaching for every millisecond, send reference pulse to described clock alignment unit.
Further, in device described in the embodiment of the present invention, described reference clock generation unit, specifically comprises:
Logical block L1, for when receiving the standard second pulse of sign on and standard clock source transmission, is judged to receive synchronous triggering command, to timer T1 output logic 1;
Counter C1, for receiving the reference pulse after described clock alignment sing1e unit calibration, and when receiving reference pulse at every turn, doing mould 1000 and being added and obtaining new count value by current count value and 1;
Logical block L2, for the count value at described counter C1 0 ~ 998 time, to timer T1 output logic 1; Otherwise, output logic 0;
Timer T1, for when the equal output logic 1 of described logical block L1 and logical block L2, from the pulse of local clock receive clock, and with 1 millisecond for scale, to the pulse of described clock alignment unit output reference.
Further, in device described in the embodiment of the present invention, described timer T1, just timing is added 1 specifically for often receiving a local clock pulse, and when the number of times receiving local clock pulse reaches K/1000 time, output reference pulse, and restart from zero timing, repeat said process; Wherein, K is clock frequency.
Further, in device described in the embodiment of the present invention, described clock alignment unit, specifically for being calibration accuracy with per second, during in per second 1st ~ 999 milliseconds, export the reference pulse that described reference clock generation unit sends to described clock synchronization unit, the 1000th millisecond time, the standard second pulse of standard clock source is sent to described clock synchronization unit, realizes the calibration to local clock accumulated error.
Further, in device described in the embodiment of the present invention, described clock synchronization unit specifically comprises:
Timer C2, for receiving the reference pulse that described clock alignment unit exports, and when receiving reference pulse at every turn, adds 1 by current count value;
Logical block L4, for reading the count value of described counter C2, and compares this count value and start time interval X, when described count value is equal with X, judges that current time is alignd with channel switch time, all the time to timer T2 output logic 1; Wherein, interval X of described start time is the time interval of channel switching instant and a nearest whole second;
Timer T2, for when described logical block L4 output logic 1, start the reference pulse receiving the transmission of described clock alignment unit, and reach the times N of setting at the number of times receiving reference pulse ' time, to the channel switching unit output switching trigger impulse of device rear end.
According to another aspect of the present invention, provide a kind of short wave channel synchronous switching control system, comprising: main control unit, channel switching unit and short wave channel synchronizer of the present invention;
Described main control unit, for being described short wave channel synchronizer and channel switching unit configurating channel handoff parameter, and sends sign on to described short wave channel synchronizer;
Described channel switching unit, for the handover trigger pulse sent according to described short wave channel synchronizer, delivery channel switching command, realizes channel switching controls.
Preferably, in system described in the embodiment of the present invention, described main control unit is that the channel handoff parameter of described short wave channel synchronizer configuration at least comprises: the time interval X of channel residence time and channel switching instant and a nearest whole second; Described main control unit is that the channel handoff parameter of described channel switching unit configuration at least comprises: the time point set with certain is as benchmark, and the absolute time utilizing standard clock source to provide converts the relative time Tx corresponding to current time obtained.
Preferably, in system described in the embodiment of the present invention, the mode of the time interval X of described main control unit configurating channel switching instant and a nearest whole second comprises: time interval X=k*t-Tx-1; Wherein, t is channel residence time, and k is the smallest positive integral meeting X>0;
The switching command that described channel switching unit exports comprises the channel number of switching; Wherein, the account form of described channel number comprises: wherein, t is channel residence time, N is channel number.
Beneficial effect of the present invention is as follows:
Device of the present invention and system, the pulse per second (PPS) that can be provided by standard clock source realizes the accurate calibration between each equipment of total system, and pulse per second (PPS) can be converted into the pulse of 1 millisecond of time scale with local clock, the time interval of the random time scale of Millisecond is reached by configuration output accuracy; Present invention also offers the channel synchronization handover control system based on this short wave channel synchronizer simultaneously, can ensure that in communication system, each device synchronization is switched on identical channel at any time, this system can be combined with shortwave detection system or communication system, realizes synchronous Real-time Channel scanning probe.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
The structural representation of a kind of short wave channel synchronizer that Fig. 1 provides for the embodiment of the present invention;
The structural representation of the another short wave channel synchronizer that Fig. 2 provides for the embodiment of the present invention;
The structural representation of a kind of short wave channel synchronous switching control system that Fig. 3 provides for the embodiment of the present invention;
The structural representation of the another short wave channel synchronous switching control system that Fig. 4 provides for the embodiment of the present invention;
Fig. 5 is the sequential chart of unit each in system described in the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
The embodiment of the present invention provides a kind of short wave channel synchronizer and short wave channel synchronous switching control system, described device can utilize local clock by the clock of standard second pulse (GPS pulse per second (PPS)) cutting to 1 millisecond scale, can arbitrary disposition channel residence time as required, the time interval that to export with channel residence time be time scale; Meanwhile, by this interval output switching instruction, can ensure that in communication system, each device synchronization is switched on identical channel.Below just by several specific embodiment, the specific implementation process of device of the present invention and system is described in detail.
Embodiment one
As shown in Figure 1, the embodiment of the present invention provides a kind of short wave channel synchronizer, specifically comprises: reference clock generation unit 110, clock alignment unit 120 and clock synchronization unit 130;
Reference clock generation unit 110, for based on synchronous triggering command, receives local clock pulse, and with 1 millisecond for scale, sends reference pulse to clock alignment unit 120;
Clock alignment unit 120, the accumulated error of standard second pulse to local clock sent for utilizing standard clock source is calibrated, and exports the reference pulse after calibration to clock synchronization unit 130;
Clock synchronization unit 130, for when current time is alignd with channel switch time, starts the reference pulse receiving the transmission of described clock alignment unit 120, and reaches the times N of setting at the number of times receiving reference pulse ' time, output switching trigger impulse; Wherein, N ' meets N ' × 1ms and equals channel residence time.
Based on said apparatus structure framework and the general principle realizing the pulse that output is scale with channel residence time, below the specific implementation process of above-mentioned each unit is described in detail:
(1) in the present embodiment, described reference clock generation unit 110, specifically for after an initial power up, detect the standard second pulse whether receiving sign on and standard clock source transmission, (if namely receiving synchronous triggering command), then start to receive local clock pulse, and be scale with millisecond, when reaching for every millisecond, send reference pulse to clock alignment unit 120.
Preferably, described reference clock generation unit 110 realizes the output of reference pulse by following device: reference clock generation unit 110 specifically comprises: logical block L1, counter C1, logical block L2 and timer T1, wherein:
Logical block L1, for when receiving the standard second pulse of sign on and standard clock source transmission, is judged to receive synchronous triggering command, to timer T1 output logic 1;
Counter C1, for receiving the reference pulse after described clock alignment sing1e unit calibration, and when receiving reference pulse at every turn, doing mould 1000 and being added and obtaining new count value by current count value and 1;
Logical block L2, for the count value at described counter C1 0 ~ 998 time, to timer T1 output logic 1; Otherwise, output logic 0;
Timer T1, for when the equal output logic 1 of described logical block L1 and logical block L2, from the pulse of local clock receive clock, and with 1 millisecond for scale, to the pulse of described clock alignment unit output reference.
Preferably, described timer T1 is especially by such as under type output reference pulse: timer T1 often receives a local clock pulse and just timing added 1, and when the number of times receiving local clock pulse reaches K/1000 time, output reference pulse, and restart from zero timing, repeat said process; Wherein, K is clock frequency.
(2) in the embodiment of the present invention, described clock alignment unit 120, specifically for being calibration accuracy with per second, during in per second 1st ~ 999 milliseconds, export the reference pulse that reference clock generation unit 110 sends to clock synchronization unit 130, the 1000th millisecond time (during arrival per second), the standard second pulse of standard clock source is sent to clock synchronization unit 130, realizes the calibration to local clock accumulated error.
Preferably, clock alignment unit 120, by the count value of monitoring counter C1, realizes the accurate control of every millisecond.That is, clock alignment unit 120 reads the value of counter C1, when the count value of counter C1 is 0 ~ 998 (1st ~ 999 milliseconds), exports the reference pulse received, and when the count value of counter C1 is 999, exports GPS pulse per second (PPS).
(3), in the embodiment of the present invention, clock synchronization unit 130 specifically comprises:
Timer C2, for receiving the reference pulse that described clock alignment unit exports, and when receiving reference pulse at every turn, adds 1 by current count value;
Logical block L4, for reading the count value of described counter C2, and compares this count value and start time interval X, when described count value is equal with X, judges that current time is alignd with channel switch time, all the time to timer T2 output logic 1; Wherein, interval X of described start time is the time interval of channel switching instant and a nearest whole second;
Timer T2, for when described logical block L4 output logic 1, start the reference pulse receiving the transmission of described clock alignment unit, and reach the times N of setting at the number of times receiving reference pulse ' time, to the channel switching unit output switching trigger impulse of device rear end.
Embodiment two
The embodiment of the present invention provides a kind of short wave channel synchronizer, this embodiment and embodiment one to realize principle identical, difference is to be launched to set forth by each unit in embodiment one in the present embodiment, by the connection between each device and processing procedure, realize the further description to short wave channel synchronizer.
Short wave channel synchronizer described in the embodiment of the present invention, switches start time for providing channel for shortwave synchronous switching control system and to aim at and with the synchronised clock that is scale any channel residence time t second.
Short wave channel synchronizer described in the embodiment of the present invention can realize on one piece of fpga chip, as shown in Figure 2, comprises logical block L1, L2, L3 and L4, timer T1 and T2 and counter C1 and C2.Wherein, logical block control timer sum counter starts or quits work under correct logical relation, thus eliminates the accumulative error of different time scale; Timer, by the Puled input of scale acquisition sometime, exports pulse, to complete the conversion of different time scale by another time scale; Counter assists logical block to produce correct logical relation, to obtain unanimously and to start timing time accurately.Particularly:
Whether logical block L1, for arranging one of condition of timer T1 unlatching, by exporting 1 or 0 to timer T1, meet in order to characterize this unlocking condition.Namely judge that two inputs: whether sign on and GPS pulse per second (PPS) arrive all, when both fail to arrive, export 0; Once both arrive, keep exporting is 1 always.
Whether logical block L2, for arranging the condition two that timer T1 opens, by exporting 1 or 0 to timer T1, meet in order to characterize this unlocking condition.L2 initially exports 1, when the input value obtained from counter C1 is 0-998, keeps output to be 1; Otherwise, output is changed to 0.
Timer T1, with the pulse signal of local clock for benchmark produces 1 millisecond of pulse.When the input obtained from logical block L1 and L2 is all 1, T1 opens timing, stops timing when input is not all 1.When timer is opened, timing is just added 1 by the pulse that T1 often receives a local clock, and when receiving K/1000 time, T1 restarts from 0 timing, and K is clock frequency; When T1 timing is 0, export a pulse to logical block L3, the output pulse that just in time to be formed with 1 millisecond be scale; When timer cuts out, outwards do not export pulse.
Logical block L3, utilizes GPS pulse per second (PPS) to calibrate the accumulated error of local clock, and exports 1 millisecond of pulse after calibration to timer T2, counter C1 and C2.Logical block L3 can obtain the pulse from not two kinds of time scales of homology, namely T1 produce 1 millisecond of pulse and GPS pulse per second (PPS), the clock source of 1 millisecond of pulse is local clock, the accumulation of its time jitter can cause the synchronous error between different shortwave equipment, and the clock source of GPS pulse per second (PPS) is common clock, available its is calibrated local clock thus eliminates accumulated error.Specific practice is, when L3 is 0-998 from the input value that counter C1 obtains, the 1 millisecond of pulse produced by T1 exports; When L3 is 999 from the input value that counter C1 obtains, GPS pulse per second (PPS) is exported.
Counter C1, for providing accurate 1 millisecond of step-by-step counting for logical block L2 and L3, auxiliary L2 arranges the condition that timer T1 opens, and auxiliary L3 arranges the condition receiving the input of different clocks source.Counter C1 initial value is 0, often receives 1 millisecond of pulse that a secondary logical unit (SLU) L3 sends here, just current count value and 1 is done mould 1000 and is added and obtains new count value.
Counter C2, for providing accurate 1 millisecond of step-by-step counting for logical block L4, auxiliary L4 arranges the condition that timer T2 opens.Counter C2 initial value is 0, often receives 1 millisecond of pulse that a secondary logical unit (SLU) L3 sends here, just current count value is delivered to logical block L4, then count value is added 1.
Logical block L4, for arranging the initial time that timer T2 opens, makes this initial time align with channel switch time.Whether L4, by exporting 1 or 0 to timer T2, meets in order to characterize this unlocking condition.When the count value that counter C2 sends here and start time, interval X was unequal, it is 0 that L4 exports, once equal, export and just remains 1.Start time interval X refers to the time interval of channel switching instant and a nearest whole second, when channel residence time t is the multiple of whole second, and X=0; When t is not the multiple of whole second, 0<X<1000 millisecond.
Timer T2, for being with the pulse that is scale channel residence time t second by 1 millisecond of pulses switch.When obtain from logical block L4 place be input as 1 time T2 from timing.T2 often receive pulse that L3 sends here then timing add 1, when receiving 1000*t subpulse, T2 restarts from 0 timing, when T2 timing is 0, outwards exports a pulse, is just in time formed with the output pulse that is scale t second.
Embodiment three
As shown in Figure 3, the embodiment of the present invention provides a kind of short wave channel synchronous switching control system, switch to same channel for controlling Shortwave Communication System at any time by the method for synchronization, described control system specifically comprises: main control unit, channel switching unit and the short wave channel synchronizer described in embodiment one/embodiment two.
In system described in the present embodiment, the frequency of the local clock of employing is K hertz, and clock accuracy stability 1ppm is even higher, powers up latter every millisecond and transmits K/1000 pulse to short wave channel synchronizer; System described in the present embodiment adopts GPS/ Big Dipper module to send once current absolute time T by serial ports is per second to main control unit, and provide pulse per second (PPS) by Transistor-Transistor Logic level alignment short wave channel synchronizer, precision can reach for 50 nanoseconds.
Particularly, in system described in the present embodiment: main control unit, be the administrative unit of whole system, be responsible for instruction and running parameter that unit in system sends self-application layer, coordinate each unit and carry out the work.Main control unit is core with ARM, and major function comprises: (1) receives the sign on from application layer, configurating channel residence time t; (2) receive and resolve gps data, the absolute time T reported and submitted by GPS is converted into and arranges with certain the relative time Tx that start time is starting point; (3) calculate channel and switch start time interval X, X=k*t-Tx-1, wherein t is channel residence time, and k is the smallest positive integral meeting X>0; (4) sign on and the parameter such as start time interval X, channel residence time t is transmitted to lock unit; (5) relative time Tx is transmitted to channel switching unit.
In system described in the present embodiment, described short wave channel synchronizer take fpga chip as core, switches start time to aim at and with the synchronised clock that is scale any channel residence time t second, concrete principle is as described in embodiment one, two for providing channel.
In system described in the present embodiment, described channel switching unit take dsp chip as core, for calculating current switching channels F (Tx) according to relative time Tx, and based on the pulse-triggered of short wave channel synchronizer, sends switching command to radio station.Wherein, switching command comprises the channel number of switching.If scanning channel group comprises N number of channel, channel number is followed successively by n=0,1 ..., N-1, then the communication equipment of different location can calculate corresponding channel number according to Tx dsp chip is also responsible for the realization of scan channel flow process, scan channel flow process is relevant with the concrete frequency mode of Shortwave Communication System, this flow process determines, the need of at switching channels on corresponding opportunity, because scan channel flow process is not emphasis of the present invention, not specifically describe at this.
Embodiment four
The embodiment of the present invention provides a kind of short wave channel synchronous switching control system, and this embodiment is in conjunction with concrete example elaborating further system described in device described in embodiment one, two and embodiment three.
As shown in Figure 4, for the structural representation of system described in the embodiment of the present invention, in the present embodiment, if Shortwave Communication System carries out synchronous scanning to the channel group comprising 80 channels in 1.2 seconds by channel residence time, local clock is 5MHz clock, with 00:00:00 second on the same day for start time, adopts short wave channel synchronous switching control system described in the embodiment of the present invention, 13 time 11 points within 20 seconds, assign sign on after, the process of carrying out synchronizing channel switching to radio station each in Shortwave Communication System is as follows.
As shown in Figure 5, be the sequential chart of system described in the present embodiment, after system power-up, GPS/ Big Dipper module and local clock clk transmit pulse to short wave channel synchronizer constantly, wherein, GPS/ Big Dipper module transmitted pulsatile once every 1 second, and local clock transmits pulsatile once every 200 nanoseconds; In lock unit all timers and timer power up after initial value be 0, logical block L1 and L4 initial output value be 0, logical block L2 initial output value be 1.
Main control unit after receiving application layer sign on, configurating channel residence time t=1.2 second; Read the absolute time that GPS serial ports is sent here, when now the time is 13 11 points 20 seconds, so the absolute time that switches of channel should within next second, when namely T is 13 11 points 21 seconds; T (when 13 11 points and 21 seconds) is converted into relative time Tx=13x3600+11x60+21=47481 second; Know that k is the smallest positive integral being greater than (Tx+1)/t according to definition, calculate k=39569, bring X=k*t-Tx-1 into and obtain channel switching start time interval X=39569*1.2-47481-1=800 millisecond, namely within 47481.8 seconds, start to switch at relative time; Sign on, start time interval X=800, channel residence time t=1.2 is transmitted respectively to the logical block L1 in lock unit, L4 and timer T2; Relative time Tx=47481 is transmitted to channel switching unit.
Short wave channel synchronizer, according to the input of main control unit, utilizes local clock and GPS pulse per second (PPS) to carry out time alignment and time synchronized.Detailed process is as follows:
Logical block L1, after obtaining the sign on of main control unit, waits for that GPS pulse per second (PPS) arrives, once receive GPS pulse per second (PPS), just output valve is set to 1, and keeps this output valve until power-off always.As seen from Figure 5,13 time, 11 points exported before 21 seconds L1 is 0, and exporting afterwards is 1.
It is 1 that logical block L2 exports after power, to 13 time 11 points of 1 millisecond of outputs before 22 seconds be 0, then 13 time 11 points to export after 22 seconds be 1, front 999 milliseconds of outputs namely per second are 1, arrange timer T1 and open; Last 1 millisecond of output is 0, arranges timer T1 and closes.
Timer T1 opens when L1 and L2 is 1, open stage often receives a clk pulse and just timing is added 1, time timing 5000 times (200 nanosecond x5000=1 millisecond), T1 restarts from 0 timing, when T1 timing is 0, a pulse is exported, the output pulse that just in time to be formed with 1 millisecond be scale to logical block L3.
Logical block L3 is 0-998 from the input value that counter C1 obtains, and the 1 millisecond of pulse produced by T1 exports; When L3 is 999 from the input value that counter C1 obtains, GPS pulse per second (PPS) is exported.Logical block L3 formation for time scale is by pulse, exports timer C1 and C2 with 1 millisecond to, and timer T2.
Counter C1 often receives 1 millisecond of pulse that a secondary logical unit (SLU) L3 sends here, just current count value and 1 is done mould 1000 and is added and obtains new count value.
Counter C2, often receives 1 millisecond of pulse that a secondary logical unit (SLU) L3 sends here, just count value is added 1, stops when count value increases to maximum.
The count value of counter C2 and start time interval X=800 are made comparisons by logical block L4, and when the two does not wait, L4 exports is 0, once equal, export and just remain 1.As seen from Figure 5, it is 0 that L4 exported before 47481.8 seconds, and exporting afterwards is 1.
Timer T2 opens when logical block L4 output is 1, namely opens after 47481.8 seconds.T2 often receive pulse that L3 sends here then timing add 1, when receiving 1200 subpulse, T2 restarts from 0 timing, when T2 timing is 0, outwards exports a pulse, just in time formed with the output pulse that is scale t=1.2 second, this pulse exports switch unit to.
Channel switching unit sends switching command to radio station, the pulse-triggered that switching command is transmitted by lock unit according to the opportunity that scan channel flow process is needing, and comprises the channel number of switching.If the relative time switched is Tx=47481 second, then can calculate corresponding channel number according to Tx namely sort as n=0 for channel, 1 ..., the channel group of 79, by when absolute time 13 11 points 21 seconds 800 milliseconds, relative time sends an instruction for 47481.8 seconds and controls radio station and be switched to the channel that channel number is 34; Then control radio station every 1200 milliseconds and be switched to next channel, namely when absolute time 13 11 points 23 seconds, relative time 47483 seconds sends an instruction and controls radio station and be switched to the channel that channel number is 35; By that analogy, the scanning sequence switching a channel every 1.2 seconds is formed.
In sum, device described in the embodiment of the present invention and system, the pulse per second (PPS) that can be provided by standard clock source realizes the accurate calibration between each equipment of total system, and pulse per second (PPS) can be converted into the pulse of 1 millisecond of time scale with local clock, the time interval of the random time scale of Millisecond is reached by configuration output accuracy; Present invention also offers the channel synchronization handover control system based on this short wave channel synchronizer simultaneously, can ensure that in communication system, each device synchronization is switched on identical channel at any time, this system can be combined with shortwave detection system or communication system, realizes synchronous Real-time Channel scanning probe.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.

Claims (8)

1. a short wave channel synchronizer, is characterized in that, comprising:
Reference clock generation unit, for based on synchronous triggering command, receives local clock pulse, and with 1 millisecond for scale, sends reference pulse to clock alignment unit;
Clock alignment unit, the accumulated error of standard second pulse to local clock sent for utilizing standard clock source is calibrated, and exports the reference pulse after calibration to clock synchronization unit; Concrete, described clock alignment unit, it is calibration accuracy with per second, during in per second 1st ~ 999 milliseconds, export the reference pulse that described reference clock generation unit sends to described clock synchronization unit, the 1000th millisecond time, the standard second pulse of standard clock source is sent to described clock synchronization unit, realizes the calibration to local clock accumulated error;
Clock synchronization unit, for when current time is alignd with channel switch time, starts the reference pulse receiving the transmission of described clock alignment unit, and reaches the times N of setting at the number of times receiving reference pulse ' time, output switching trigger impulse; Wherein, N ' meets N ' × 1ms and equals channel residence time.
2. short wave channel synchronizer as claimed in claim 1, it is characterized in that, described reference clock generation unit, specifically for after an initial power up, detect the standard second pulse whether receiving sign on and standard clock source transmission, if, then start to receive local clock pulse, and be scale with millisecond, when reaching for every millisecond, send reference pulse to described clock alignment unit.
3. short wave channel synchronizer as claimed in claim 2, it is characterized in that, described reference clock generation unit, specifically comprises:
Logical block L1, for when receiving the standard second pulse of sign on and standard clock source transmission, is judged to receive synchronous triggering command, to timer T1 output logic 1;
Counter C1, for receiving the reference pulse after described clock alignment sing1e unit calibration, and when receiving reference pulse at every turn, doing mould 1000 and being added and obtaining new count value by current count value and 1;
Logical block L2, for the count value at described counter C1 0 ~ 998 time, to timer T1 output logic 1; Otherwise, output logic 0;
Timer T1, for when the equal output logic 1 of described logical block L1 and logical block L2, from the pulse of local clock receive clock, and with 1 millisecond for scale, to the pulse of described clock alignment unit output reference.
4. short wave channel synchronizer as claimed in claim 3, it is characterized in that, described timer T1, just timing is added 1 specifically for often receiving a local clock pulse, and when the number of times receiving local clock pulse reaches K/1000 time, output reference pulse, and restart from zero timing, repeat said process; Wherein, K is clock frequency.
5. the short wave channel synchronizer as described in any one of Claims 1-4, is characterized in that, described clock synchronization unit specifically comprises:
Counter C2, for receiving the reference pulse that described clock alignment unit exports, and when receiving reference pulse at every turn, adds 1 by current count value;
Logical block L4, for reading the count value of described counter C2, and compares this count value and time started interval X, when described count value is equal with X, judges that current time is alignd with channel switch time, all the time to timer T2 output logic 1; Wherein, interval X of described time started is the time interval of channel switching instant and a nearest whole second;
Timer T2, for when described logical block L4 output logic 1, start the reference pulse receiving the transmission of described clock alignment unit, and reach the times N of setting at the number of times receiving reference pulse ' time, to the channel switching unit output switching trigger impulse of device rear end.
6. a short wave channel synchronous switching control system, is characterized in that, comprising: main control unit, channel switching unit and the short wave channel synchronizer described in any one of claim 1 to 5;
Described main control unit, for being described short wave channel synchronizer and channel switching unit configurating channel handoff parameter, and sends sign on to described short wave channel synchronizer;
Described channel switching unit, for the handover trigger pulse sent according to described short wave channel synchronizer, delivery channel switching command, realizes channel switching controls.
7. short wave channel synchronous switching control system as claimed in claim 6, is characterized in that,
Described main control unit is that the channel handoff parameter of described short wave channel synchronizer configuration at least comprises: the time interval X of channel residence time and channel switching instant and a nearest whole second;
Described main control unit is that the channel handoff parameter of described channel switching unit configuration at least comprises: the time point set with certain is as benchmark, and the absolute time utilizing standard clock source to provide converts the relative time Tx corresponding to current time obtained.
8. short wave channel synchronous switching control system as claimed in claim 7, is characterized in that,
The mode of the time interval X of described main control unit configurating channel switching instant and a nearest whole second comprises: time interval X=k*t-Tx-1; Wherein, t is channel residence time, and k is the smallest positive integral meeting X>0;
The switching command that described channel switching unit exports comprises the channel number of switching; Wherein, the account form of described channel number comprises: wherein, F (Tx) is channel number, and t is channel residence time, N is channel number.
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