CN103022281B - A kind of manufacture method of nano patterned substrate - Google Patents
A kind of manufacture method of nano patterned substrate Download PDFInfo
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- CN103022281B CN103022281B CN201210564314.5A CN201210564314A CN103022281B CN 103022281 B CN103022281 B CN 103022281B CN 201210564314 A CN201210564314 A CN 201210564314A CN 103022281 B CN103022281 B CN 103022281B
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Abstract
The invention provides a kind of manufacture method of nano patterned substrate, comprising: substrate is provided, form conductive layer over the substrate; Described conductive layer uses electrodeposition technology plated metal, and form metal nanoparticle, described metal is different from the material of conductive layer, and the described electrodeposition technology time is much smaller than the electrodeposition technology film forming time; Using described metal nanoparticle as mask, etch described conductive layer, form patterned conductive layer; With described patterned conductive layer for mask, etch described substrate; Remove described patterned conductive layer and metal nanoparticle, form nano patterned substrate.The method utilizes the mark of electrodeposition technology formation rule arrangement on the electrically conductive, and then form metal nanoparticle in mark, and then utilize metal nanoparticle for mask etching conductive layer, then etched substrate is to form nano patterned substrate.It is simple that the method has technique, the advantage that process costs is low.
Description
Technical field
The present invention relates to LED manufacture technology field, particularly relate to a kind of manufacture method of nano patterned substrate.
Background technology
In LED manufacture technology technique, because saphire substrate material and epitaxial material all differ greatly from lattice constant, thermal expansion factor to refractive index.These physical property differences directly cause the epitaxial material of Grown of low quality, cause LED internal quantum efficiency (IQE) to be restricted, and then affect the raising of external quantum efficiency (EQE) and light efficiency.
In order to improve LED efficiency, industry introduces patterned low temperature buffer layer, and described patterned low temperature buffer layer can improve internal quantum efficiency, specifically, first at substrate Epitaxial growth low temperature buffer layer, then carry out graphically to described low temperature buffer layer, other epitaxial loayer of regrowth afterwards.So, namely need epitaxial growth-graphical-epitaxial growth three steps again, make complex process, time-consuming.
Therefore, graphical sapphire substrate (PatternedSapphireSubstrate, PSS) technology is introduced into, it is with method difference before, figure on original low temperature buffer layer has been accomplished on substrate by PSS technology, that is patterned substrate and non-patterned low temperature buffer layer, so just overcomes above-mentioned shortcoming.The principle that PSS technology can improve LED efficiency is effectively to reduce difference row density, reduces epitaxial growth defect, promotes epitaxial wafer quality, reduce non-radiative recombination center, improve interior quantum effect; In addition, PSS structure adds the order of reflection of photon at sapphire interface place, the probability of photon effusion LED active area is increased, thus light extraction efficiency is improved.The main Making programme of PSS comprises: mask layer makes, mask layer is graphical, mask pattern removes four steps to the transfer of substrate and mask layer.Photoetching technique conventional on micron order just can meet mask layer patterning process demand, but, along with the pattern of PSS technology is seted out towards nanoscale by micron order, cost and the difficulty of the process of conventional patterned substrate cannot be applicable to large-scale production.
The patterned method of current nanoscale PSS (NPSS:nano-PSS) technology mask layer is mainly nano impression.The basic thought of nano impression is by forming nano level pattern on mould, die marks is being formed on the medium on substrate, the medium polymer film that normally one deck is very thin, by methods such as the hot pressing of mould to medium or the irradiation through mould, media structure is hardened, thus retain figure.The resolution, planarization, uniformity, surface etc. of nano impression to mould have very high requirement, and, in moulding process, aiming between mould with impression materials, the depth of parallelism, pressure uniformity, temperature homogeneity, ejection technique etc. all also exist more problem.
Summary of the invention
The invention provides a kind of manufacture method of nano patterned substrate, utilize electrodeposition technology on the electrically conductive formation rule arrangement mark, then metal nanoparticle is formed in mark, and then utilize metal nanoparticle for mask etching conductive layer, then etched substrate is to form nano patterned substrate.The method has the advantage that technique is simple, process costs is low.
The invention provides a kind of manufacture method of nano patterned substrate, comprising:
Substrate is provided, forms conductive layer over the substrate;
The raised or sunken mark of formation rule arrangement on described conductive layer;
Described conductive layer uses electrodeposition technology form metal nanoparticle in described mark, described metal is different from the material of conductive layer;
Using described metal nanoparticle as mask, etch described conductive layer, form patterned conductive layer;
With described patterned conductive layer for mask, etch described substrate;
Remove described patterned conductive layer and metal nanoparticle, form nano patterned substrate.
Optionally, described conductive layer is metal level or the ito film layer of Ag, Au, Cu formation.
Optionally, the thickness of described conductive layer is 10nm ~ 100nm.
Optionally, the metal material of described electrodeposition technology deposition is Ag, Au or Cu.
Optionally, the electrodeposition technology time forming metal nanoparticle is 5 seconds ~ 15 seconds.
Optionally, describedly conductive layer described in wet-etching technology or plasma etching is utilized.
Optionally, the etching liquid of described wet-etching technology is FeCl
3.
Optionally, focused ion beam microscope is utilized to form raised or sunken mark.
Optionally, utilize wet-etching technology or plasma etching industrial to etch described substrate
Optionally, the method for cmp or etching is utilized to remove described patterned conductive layer and metal nanoparticle.
The invention provides a kind of manufacture method of nano patterned substrate, the manufacture method of described nano patterned substrate forms conductive layer on substrate, then the raised or sunken mark of formation rule arrangement on the electrically conductive, then electrodeposition technology is carried out, metal nanoparticle is formed in mark by controlling the electrodeposition technology time, afterwards using metal nanoparticle as mask etching conductive layer, be finally mask etching substrate with conductive layer, to form the nano patterned substrate of figure.The method need not use high-precision photoetching equipment, also impresses without mould, has technique simple, the advantage that process costs is low.
Accompanying drawing explanation
Fig. 1 is the flow chart of the manufacture method of the nano patterned substrate of the embodiment of the present invention;
Fig. 2 A ~ 2F is the generalized section of each step of the manufacture method of the nano patterned substrate of the embodiment of the present invention.
Embodiment
Mention in the introduction, existing NPSS method has respective defect, has higher requirement to process costs.The invention provides a kind of manufacture method of nano patterned substrate, the manufacture method of described nano patterned substrate forms conductive layer on substrate, then the raised or sunken mark of formation rule arrangement on the electrically conductive, then electrodeposition technology is carried out, metal nanoparticle is formed in mark by controlling the electrodeposition technology time, afterwards using metal nanoparticle as mask etching conductive layer, be finally mask etching substrate with conductive layer, to form the nano patterned substrate of figure.The method need not use high-precision photoetching equipment, also impresses without mould, has technique simple, the advantage that process costs is low.
Below in conjunction with accompanying drawing, the present invention is described in more detail, which show the preferred embodiments of the present invention, the described those skilled in the art of understanding should can revise the present invention described here, and still realize advantageous effects of the present invention.Therefore, following description is appreciated that extensively knowing for those skilled in the art, and not as limitation of the present invention.
In order to clear, whole features of practical embodiments are not described.They in the following description, are not described in detail known function and structure, because can make the present invention chaotic due to unnecessary details.Will be understood that in the exploitation of any practical embodiments, a large amount of implementation detail must be made to realize the specific objective of developer, such as, according to regarding system or the restriction about business, change into another embodiment by an embodiment.In addition, will be understood that this development may be complicated and time-consuming, but be only routine work to those skilled in the art.
In the following passage, more specifically the present invention is described by way of example with reference to accompanying drawing.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only in order to object that is convenient, the aid illustration embodiment of the present invention lucidly.
Please refer to Fig. 1, it is the flow chart of the manufacture method of the nano patterned substrate of the embodiment of the present invention, and described method comprises the steps:
Step S021, provides substrate, forms conductive layer over the substrate;
Step S022, the raised or sunken mark of formation rule arrangement on the electrically conductive;
Step S023, described conductive layer uses electrodeposition technology plated metal, and form metal nanoparticle, described metal is different from the material of conductive layer, and the described electrodeposition technology time is much smaller than the electrodeposition technology film forming time;
Step S024, using described metal nanoparticle as mask, etches described conductive layer, forms patterned conductive layer;
Step S025, with described patterned conductive layer for mask, etches described substrate;
Step S026, removes described patterned conductive layer and metal nanoparticle, forms nano patterned substrate.
The core concept of the method is, substrate forms conductive layer, then utilize focused ion beam microscope on the electrically conductive formation rule arrangement raised or sunken mark, carry out electrodeposition technology on the electrically conductive afterwards, metal nanoparticle is formed in mark by controlling the electrodeposition technology time, using metal nanoparticle as mask etching conductive layer, be finally mask etching substrate with conductive layer, to form the nano patterned substrate of figure.
With reference to Fig. 2 A, perform step S021, substrate is provided, forms conductive layer over the substrate.In the present embodiment, described substrate 101 is Sapphire Substrate, and conductive layer provides place for follow-up electrodeposition technology, for conductive material, be preferably Ag, Au, Cu or ITO(Indiumtinoxide tin indium oxide), in the present embodiment, conductive layer is ito thin film layer, and thickness is 10nm ~ 100nm.
With reference to figure 2B, perform step S022, the raised or sunken mark 106 of formation rule arrangement on conductive layer 102.Focused ion beam microscope (FIB, FocusedIonbeam) can be utilized to form raised or sunken mark 106.Raised or sunken mark 106 place can form metal nanoparticle in the process of follow-up electro-deposition.Utilize the evaporation function of focused ion beam microscope, the position can designed on conductive layer 102 forms protruding mark, concrete, provides organic metallic vapour on conductive layer 102 surface, the ion beam of FIB is utilized to decompose organic metal steam, at the corresponding region plated metal on conductive layer 102 surface.The selective etch function of focused ion beam microscope is utilized to form the mark of depression with the position of design on conductive layer 102, concrete, utilize the position that Ions Bombardment conductive layer 102 surface is specified, corrosive gas can be provided on conductive layer 102 surface simultaneously, accelerate the removal of conductive layer 102 material.In the present embodiment, FIB is utilized to form protruding mark 106 on conductive layer 102 surface.
With reference to figure 2C, perform step S023, described conductive layer 102 use electrodeposition technology form metal nanoparticle 103, electrodeposition technology is usually for film forming, and in its incipient stage, metal ion is separated out by electrochemical reaction and formed nucleus at conductive layer 102 from electric depositing solution, under electrochemical action, metal ion continues to form nucleus on the electrically conductive on the one hand, enter nucleus on the other hand, make nucleus growth, finally form continuous print membrane structure on the electrically conductive.In the scheme of the application, electrodeposition technology is to form metal nanoparticle, without the need to forming continuous print film, thus the time of electrodeposition technology is controlled, make it much smaller than the time forming continuous print membrane structure, nano level metallic crystal is only formed like this on conductive layer 102 surface, that is, metal nanoparticle 103.Further, owing to defining raised or sunken mark 106 before on the electrically conductive, during electro-deposition, raised or sunken place current potential is higher, and metal ion can preferentially at these positions, electric discharge forms nucleus, makes metal nanoparticle 103 by indicia distribution on conductive layer 102.Make owing to needing to utilize metal nanoparticle 103 to carry out etching conductive layer 102 as mask in subsequent step, therefore the material of metal nanoparticle 103 needs different from conductive layer 102 material, be preferably Ag, Au or Cu, in the present embodiment, the material of metal nanoparticle 103 elects Ag as, and the time of electrodeposition technology is 5 seconds ~ 15 seconds.
With reference to figure 2C, perform step S023, using described metal nanoparticle 103 as mask, etch described conductive layer 102, form patterned conductive layer 102 '.Wet etching or plasma etching can be utilized to etch described conductive layer 102, and utilize wet-etching technology in the present embodiment, etching liquid elects FeCl as
3solution.Those skilled in the art can come selective etching mode and etching liquid or etching gas according to the concrete material of conductive layer 102 and metal nanoparticle 103.
With reference to figure 2D, perform step S024, with described patterned conductive layer 102 ' for mask, etch described substrate 101.Wet etching or plasma etching can be utilized to etch described substrate 101.Preferably the graphical described substrate 101 of wet-etching technology is adopted in the present embodiment, such as, can select described substrate 101 etch rate higher, and the etching liquid of the conductive layer 102 ' of etched features hardly, to form hole 104 smoothly on substrate, form patterned substrate 101 '.Certainly, as selected the etching liquid that can etch to patterned conductive layer 102 and Sapphire Substrate 101, the temperature of etching technics and process time being controlled, completing steps S023 and step S024 in a step can be realized.
With reference to figure 2E, perform step S025, remove described patterned conductive layer 102 ' and metal nanoparticle 103, form nano patterned substrate 101 '.Described patterned conductive layer 102 ' and metal nanoparticle 103 can be removed by the method for cmp or etching.Afterwards, complete patterned Sapphire Substrate 101 ' and the techniques such as follow-up epitaxial growth can be entered.
In sum, the invention provides a kind of manufacture method of nano patterned substrate, the manufacture method of described nano patterned substrate forms conductive layer on substrate, then the raised or sunken mark of formation rule arrangement on the electrically conductive, then electrodeposition technology is carried out, metal nanoparticle is formed in mark by controlling the electrodeposition technology time, afterwards using metal nanoparticle as mask etching conductive layer, last is mask etching substrate with conductive layer, to form the nano patterned substrate of figure.The method need not use high-precision photoetching equipment, also impresses without mould, has technique simple, the advantage that process costs is low.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (9)
1. a manufacture method for nano patterned substrate, comprising:
Substrate is provided, forms conductive layer over the substrate;
The raised or sunken mark of formation rule arrangement on described conductive layer, described mark utilizes focused ion beam microscope to be formed;
Described conductive layer uses electrodeposition technology form metal nanoparticle in described mark, described metal nanoparticle is different from the material of conductive layer;
Using described metal nanoparticle as mask, etch described conductive layer, form patterned conductive layer;
With described patterned conductive layer for mask, etch described substrate;
Remove described patterned conductive layer and metal nanoparticle, form nano patterned substrate.
2. the manufacture method of nano patterned substrate as claimed in claim 1, is characterized in that: described conductive layer is metal level or the ito film layer of Ag, Au, Cu formation.
3. the manufacture method of nano patterned substrate as claimed in claim 1, is characterized in that: the thickness of described conductive layer is 10nm ~ 100nm.
4. the manufacture method of nano patterned substrate as claimed in claim 1, is characterized in that: the metal material of described electrodeposition technology deposition is Ag, Au or Cu.
5. the manufacture method of nano patterned substrate as claimed in claim 1, is characterized in that: the electrodeposition technology time forming metal nanoparticle is 5 seconds ~ 15 seconds.
6. the manufacture method of nano patterned substrate as claimed in claim 1, is characterized in that: utilize wet-etching technology or plasma etching industrial to etch described conductive layer.
7. the manufacture method of nano patterned substrate as claimed in claim 6, is characterized in that: the etching liquid of described wet-etching technology is FeCl
3.
8. the manufacture method of nano patterned substrate as claimed in claim 1, is characterized in that: utilize wet-etching technology or plasma etching industrial to etch described substrate.
9. the manufacture method of nano patterned substrate as claimed in claim 1, is characterized in that: utilize cmp or etching technics to remove described patterned conductive layer and metal nanoparticle.
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| CN104733569B (en) * | 2013-12-19 | 2017-07-04 | 北京北方微电子基地设备工艺研究中心有限责任公司 | The preparation method of nanometer-scale pattern substrate |
| CN105984862B (en) * | 2015-02-16 | 2018-08-28 | 北京大学深圳研究生院 | Method for growing carbon nanotube |
| CN106206896B (en) * | 2016-08-22 | 2019-03-26 | 厦门市三安光电科技有限公司 | The production method of compound pattern Sapphire Substrate and its epitaxial wafer |
| CN109239815A (en) * | 2017-07-10 | 2019-01-18 | 上海箩箕技术有限公司 | Cover board and forming method thereof, cover board motherboard, electronic equipment |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101250719A (en) * | 2007-12-05 | 2008-08-27 | 南京大学 | Method for one-step synthesing and assembling cuprum nanometer particle |
| CN102447024A (en) * | 2011-10-27 | 2012-05-09 | 华灿光电股份有限公司 | Method for manufacturing nanometer-level PSS (Patterned Sapphire Substrate) |
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| WO2012083578A1 (en) * | 2010-12-22 | 2012-06-28 | 青岛理工大学 | Device and method for nano-imprinting full wafer |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101250719A (en) * | 2007-12-05 | 2008-08-27 | 南京大学 | Method for one-step synthesing and assembling cuprum nanometer particle |
| CN102447024A (en) * | 2011-10-27 | 2012-05-09 | 华灿光电股份有限公司 | Method for manufacturing nanometer-level PSS (Patterned Sapphire Substrate) |
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Effective date of registration: 20180626 Address after: 201306 N1128 room 23, 2 New Town Road, mud town, Pudong New Area, Shanghai Patentee after: Gallium semiconductor technology (Shanghai) Co., Ltd. Address before: 201306 1889 Hong Yin Road, Lingang industrial area, Pudong New Area, Shanghai Patentee before: EnRay Tek Optoelectronics (Shanghai) Co., Ltd. |
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