CN102830337A - System for testing direct current performance of wide bandgap semiconductor chip - Google Patents

System for testing direct current performance of wide bandgap semiconductor chip Download PDF

Info

Publication number
CN102830337A
CN102830337A CN2012103120400A CN201210312040A CN102830337A CN 102830337 A CN102830337 A CN 102830337A CN 2012103120400 A CN2012103120400 A CN 2012103120400A CN 201210312040 A CN201210312040 A CN 201210312040A CN 102830337 A CN102830337 A CN 102830337A
Authority
CN
China
Prior art keywords
semiconductor chip
wide bandgap
bandgap semiconductor
test
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2012103120400A
Other languages
Chinese (zh)
Inventor
默江辉
李静强
马杰
李亮
崔玉兴
付兴昌
蔡树军
杨克武
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CETC 13 Research Institute
Original Assignee
CETC 13 Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CETC 13 Research Institute filed Critical CETC 13 Research Institute
Priority to CN2012103120400A priority Critical patent/CN102830337A/en
Publication of CN102830337A publication Critical patent/CN102830337A/en
Pending legal-status Critical Current

Links

Images

Abstract

The invention discloses a system for testing direct current performance of a wide bandgap semiconductor chip and belongs to the field of test methods for direct current performance of semiconductor chips. The system comprises a gate supply, a drain supply, a gate ammeter, a drain ammeter, a test signal generator, a test signal modulator and a probe station, wherein the gate supply and the drain supply provide direct current power, and the probe station is used for holding a target test chip. A test platform is built based on an existing mature device, and the direct current performance of the wide bandgap semiconductor chip can be tested by a simple method. The testing system is low in cost, convenient to operate and maintain, stable in performance and high in reliability. The manufacturing cost of the wide bandgap semiconductor chip is also lowered. The efficiency in testing the wide bandgap semiconductor chip is improved. Valuable data for representing characteristics of the wide bandgap semiconductor chip is accumulated, and improvement on properties of the wide bandgap semiconductor chip is reliably guaranteed.

Description

A kind of wide bandgap semiconductor chip dc performance test macro
Technical field
The present invention relates to the method for testing field of semi-conductor chip dc performance, be specially a kind of wide bandgap semiconductor chip dc performance test macro.
Background technology
Semiconductor material such as GaN and SiC has good characteristics such as the forbidden band is wide, high heat conductance, high carrier saturation drift velocity because of it, determined they are widely applied among wide band gap semiconductor device is made.
Can make chip based on half-breadth forbidden band conductor materials such as GaN and SiC, be called device after the chip process wide bandgap semiconductor Chip Packaging.Chip need be measured its dc performance before encapsulation, guaranteed that chip is qualified.
Wide bandgap semiconductor chip dc performance is by following parameter characterization: saturation current, mutual conductance, pinch-off voltage, voltage breakdown etc., measured chip dc performance are promptly accomplished above-mentioned parameter and are measured.
The chip of GaN and SiC material has WV height, characteristics that working current is big, and its WV is generally 28-48V, and is more much higher than GaAs, and working current is generally 1A-10A by its output power decision.We call little grid width chip to saturation current less than GaN and the SiC chip of 2A, and saturation current is called big grid width chip greater than GaN and the SiC chip of 2A.As stated, big grid width GaAs chip is low pressure, big electric current chip, and big grid width GaN and SiC chip are called high pressure, big electric current chip.For little grid width chip, measure its dc parameter and adopt general graphic instrument to realize.But for big grid width chip, a lot of problems can appear in common graphic instrument.Especially when measuring saturation current, mutual conductance, pinch-off voltage, because the power that device bears is DC power, test voltage and measuring current are bigger, and DC power is up to tens watts, and heat dissipation is very big, and heat is burnt easily.When the measured chip saturation current, because chip is in the ON state duty, electric current is bigger, is prone to self-excitation phenomena, causes chip to burn easily.
The big grid width chip high voltage of wide bandgap semiconductor heavy DC performance test at present is one of difficult point of wide bandgap semiconductor chip manufacturing.Though existing at present company has released and has been specifically designed to the graphic instrument of measuring big electric current, its manufacturing cost is up to ten thousand yuan of 15-130, and is comparatively expensive.And reliability is lower, and volume is big, weight is big.This kind graphic instrument can adopt pulsed mode, but the ubiquity testing efficiency is low, impulsive condition can not continuously adjustable shortcoming.Can't satisfy the needs of large-scale production.
In order to reduce cost; A kind of method of testing commonly used is the big grid width wide bandgap semiconductor chip dc performance of deriving with little grid width wide bandgap semiconductor chip dc performance; But this kind method can not truly reflect the chip dc performance, can't satisfy the needs of large-scale production equally.
Summary of the invention
To the problem that exists in the test of wide bandgap semiconductor chip dc performance; The invention provides a kind of wide bandgap semiconductor chip dc performance test macro; This system with implemented with low cost wide bandgap semiconductor chip dc performance test; And the dirigibility and the accuracy of dc performance test have been improved, simultaneously for the sign of wide bandgap semiconductor chip characteristics has accumulated valuable data, for the raising of wide band gap semiconductor device performance and the reduction of cost provide the foundation.
For solving the problems of the technologies described above; The technical scheme that the present invention adopts is: a kind of wide bandgap semiconductor chip dc performance test macro comprises being used to that grid power supply and drain power, grid current table and drain current table, measuring signal generator, the test signal modulator of direct supply is provided and being used for the probe station drop target test chip, that have gate input and drain electrode input end; The output terminal of said grid power supply is connected with the gate input of probe station via the grid current table, and said drain power is successively via being connected with the drain electrode input end of probe station behind drain current table, the test signal modulator; The output terminal of said measuring signal generator is connected with the trigger end of test signal modulator.
Between the gate input of said grid current table and probe station, also be provided with the test signal modulator; The output terminal of said measuring signal generator is connected with the trigger end of test signal modulator.
Also comprise the test signal monitor, the input end of said test signal monitor is connected with the output terminal of test signal modulator.
Said test signal monitor is an oscillograph.
Also comprise filtration module, said filtration module is located between grid current and the probe station or/and between test signal modulator and the probe station.
Said grid power supply and drain power are D.C. regulated power supply.
Said grid current table and drain current table are desk-top multimeter.
The present invention utilizes the instrument and meter of existing maturation to build a cover test macro, has successfully realized the dc performance test of wide bandgap semiconductor chip; Used instrument and meter cost is very low, and takies that volume is little, consumed power is little, has more easily detachable advantage; Used instrument and meter is often using in device detection at present, and maturity is high, and reliability is high, and cost of equipment maintenance is very low; The problem that the said system high voltage that runs in the wide bandgap semiconductor chip testing that adopts the voltage steps mode successfully to solve, big electric current cause test component to burn easily; Also can reduce simultaneously the cost of manufacture of wide bandgap semiconductor chip; Improved the testing efficiency of wide bandgap semiconductor chip greatly; For the sign of wide bandgap semiconductor chip characteristics has accumulated valuable data, for the raising of wide band gap semiconductor device performance provides reliable guarantee.
Description of drawings
Fig. 1 is a composition structural drawing of the present invention;
Fig. 2 is the composition structural drawing of the embodiment of the invention 1;
Fig. 3 is the composition structural drawing of the embodiment of the invention 2.
Embodiment
Embodiment 1
Know by illustrated in figures 1 and 2,
A kind of wide bandgap semiconductor chip dc performance test macro comprises being used to that grid power supply and drain power, grid current table and drain current table, measuring signal generator, the test signal modulator of direct supply is provided and being used for the probe station drop target test chip, that have gate input and drain electrode input end; The output terminal of said grid power supply is connected with the gate input of probe station via the grid current table, and said drain power is successively via being connected with the drain electrode input end of probe station behind drain current table, the test signal modulator; The output terminal of said measuring signal generator is connected with the trigger end of test signal modulator; This test macro also comprises the test signal monitor, and the input end of said test signal monitor is connected with the output terminal of test signal modulator.Said test signal monitor is an oscillograph.
In case of necessity; This test macro can also comprise filtration module; Said filtration module is located between grid current and the probe station or between test signal modulator and the probe station, also can be respectively equipped with filtration module between grid current and the probe station and between test signal modulator and the probe station.
Said grid power supply and drain power are D.C. regulated power supply; Said grid current table and drain current table are desk-top multimeter.
On the basis of Fig. 1, select for use pulse signal as test signal, be present embodiment.The concrete performance test operation steps of utilizing present embodiment to carry out is:
1) prepares 2 of D.C. regulated power supplies, as the grid power supply and the drain power that are used to provide direct supply; Pulse signal generator and pulse signal modulation device each 1 as measuring signal generator and test signal modulator; 1 of oscillograph is as the test signal monitor; 2 in desk-top multimeter is as grid current table and drain current table;
2) prepare various connecting lines, need make filtration module in case of necessity;
3) using various connecting lines with the above-mentioned the 1st) various device in going on foot couples together; Use cable that the output terminal of pulse signal generator is connected with the trigger end of pulse signal modulation device; Make pulse signal generator start pulse signal modulator; And the output terminal of oscillographic input end with the pulse signal modulation device be connected, utilize the output waveform of oscillograph monitoring pulse signal modulation device, that is will be carried in the signal waveform on the target test chip; Use connecting line will as the D.C. regulated power supply of grid power supply and drain power respectively with corresponding connection of desk-top multimeter as grid current table and drain current table; Output terminal with the drain current table is connected through the input end of connecting line with the pulse signal modulation device again;
4) use that connecting line will input end be corresponding is connected with the gate input of probe station and drain electrode respectively as the output terminal of the output terminal of the desk-top multimeter of grid current table, pulse signal modulation device; In case of necessity, can insert filtration module between desk-top multimeter and the probe station or between pulse signal modulation device and the probe station, perhaps all insert filtration module between desk-top multimeter and the probe station and between pulse signal modulation device and the probe station;
5) after above-mentioned connection is accomplished, the probe of probe station is contacted with the respective ends of target test chip; Put into probe station to the target test chip; Then, instrument, instrument energising; The setting pulse signal modulator is in the external trigger state;
6) adjustment pulse signal generator output parameter reaches setting, increases stabilized voltage supply voltage to setting, reads parameters such as saturation current that desk-top multimeter can the measurement target test chip, mutual conductance, pinch-off voltage.
In the above-mentioned steps, each instrument effect is described below:
Said grid power supply links to each other with the input end of grid current table through connecting, and the output terminal of grid current table links to each other with the gate input of probe station through connecting line.Grid power supply can provide continuous voltage output; The voltage steps precision can reach 0.001V; The stepping of common graphic instrument grid voltage is merely 0.1V; Therefore the stepping accuracy of native system measuring voltage is much larger than existing graphic instrument, and adopts independently the grid power supply can be from better control survey signal on the precision, thus corresponding raising measuring accuracy.When drain voltage one timing, measure parameters such as the mutual conductance of chip to be measured, pinch-off voltage through changing grid voltage.High-precision voltage steps can guarantee to measure the accuracy of mutual conductance, pinch-off voltage.
Said drain power links to each other with drain current table input end through connecting line, and the output terminal of drain current table links to each other with the input end of pulse signal modulation device through connecting line, and the output terminal of pulse signal modulation device links to each other with the drain electrode input end of probe station.Drain power also provides DC voltage, and passes through the input end that the drain current table gets into the pulse signal modulation device, becomes the pulse voltage of testing usefulness through the DC voltage after the modulators modulate, and continuous vdct is become the pulse voltage test.Said pulse signal generator triggers input end with the pulse signal modulation device and links to each other, but parameters such as the pulsewidth of the pulse voltage that pulse signal generator pulse signals modulator produces, dutycycle are accurately controlled., dutycycle less when pulsewidth hour, the drain electrode pulse voltage that measuring process produces is less, therefore the DC voltage of equivalence is also less, and then the drain current that produces also just reduces thereupon.Because the product of drain voltage and drain current is the dc power of test chip, drain current, drain voltage are more little, and the power consumption of chip to be measured is more little, and chip to be measured is difficult for self-excitation more, is not easy more to burn.Therefore, the existence of pulse signal modulation device has reduced the dc power of chip to be measured, has improved the reliability of test.
Said filtration module can be connected between grid current table and the probe station, perhaps between pulse signal modulation device and the probe station, can avoid the chip self-excitation like this, has improved the chip testing reliability.
Oscillograph links to each other with the output terminal of pulse signal modulation device, can monitor the parameters such as waveform, pulsewidth, dutycycle of the pulse voltage of pulse signal modulation device output, guarantees drain electrode pulse output accuracy.
Embodiment 2
Know that by shown in Figure 3 different with embodiment 1 is between the gate input of said grid current table and probe station, also to be provided with the test signal modulator; The output terminal of said measuring signal generator is connected with the trigger end of test signal modulator; Also be provided with the test signal monitor of monitor signal at the output terminal of test signal modulator.
Because grid voltage is very little usually, the necessity that therefore converts thereof into pulse voltage is not very big.If when test, also need gate voltage switches be become impulse form, so the pulse signal modulation device can be set between the gate input of grid current table and probe station, to realize this function.
The present invention has been successfully applied to the DC test of SiC MESFET 24mm grid width chip.Embodiment is described below:
Chip is described: 1) grid width: 24mm; 2) test condition-pulsewidth 50 μ s, dutycycle 5%; 3) test parameter: saturation current, mutual conductance, pinch-off voltage.
The concrete operations step is following:
1) builds required DC test system according to description of the invention;
2) guarantee to open all devices again after all devices knob makes zero, and guarantee that energising is normal;
3) triggering mode of setting pulse signal modulator is an external trigger, setting pulse signal generator pulse output condition: pulsewidth 50 μ s, dutycycle 5%;
4) be placed on chip to be measured on the probe station, the respective electrode of chip correctly is connected with the input end of probe station, the dc parameter that begins chip to be measured is measured;
5) measurement of saturation current: the output voltage of setting grid power supply is 0V; The output voltage that progressively increases drain power reads grid current table numerical value to test voltage 10V, is the grid current value this moment; Read drain current table numerical value, be the saturation current value this moment;
6) measurement of pinch-off voltage: keeping the output voltage of drain power is 10V, progressively increases the output voltage of grid power supply, remains unchanged until drain current, reads the output voltage of grid power supply, is pinch-off voltage this moment;
7) measurement of mutual conductance: keeping the output voltage of drain power is 10V, and the output voltage that reduces grid power supply is until the above-mentioned the 6th) numerical value of the pinch-off voltage that measures in the step 3/4, read drain current I this moment DS1, reduce grid power supply output voltage to pinch-off voltage numerical value 3/4 subtract 1V again, at this moment, read drain current I DS2, mutual conductance is Gm=I DS1-I DS2
8) reducing the drain power output voltage is 0V, and reducing the grid power supply output voltage is 0V, and powered-down is measured and finished.
Table 1 is depicted as the comparison that utilizes the right 24mm grid width SiC chip DC test result of DC test system of the present invention and existing graphic instrument.
Table 1
? Saturation current (A) Mutual conductance (mS) Pinch-off voltage (V)
Graphic instrument 5.8 400 -12.0
Native system 5.7 390 -12.1
Data through table 1 can know, utilize the result of DC test system testing gained of the present invention very nearly the same with the test result of utilizing existing graphic instrument, and this measuring accuracy that DC test of the present invention system also is described can guarantee fully.
But the cost of whole DC test of the present invention system is very low, about 3000 yuan of D.C. regulated power supply; About 2000 yuan of desk-top multimeter, 5000 yuan of pulse signal modulation devices, 20000 yuan of pulse signal generators; 3000 yuan of oscillographs are built the used fund of total system and are amounted to 3.8 ten thousand yuan, far below the price of existing graphic instrument; And the instrument of native system is the most frequently used instrument, need not to purchase in addition, builds flexibly during use; Can also continue independence when need not the system of building being, greatly reduce the cost of test, improve the dirigibility of test.
The used instrument of the present invention is the modal equipment in this area, so unit type no longer clearly provides.In actual application, select the equipment use of suitable types to get final product according to actual needs.
Obviously, embodiment described in the invention only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.

Claims (7)

1. a wide bandgap semiconductor chip dc performance test macro is characterized in that comprising being used to that grid power supply and drain power, grid current table and drain current table, measuring signal generator, the test signal modulator of direct supply is provided and being used for the probe station drop target test chip, that have gate input and drain electrode input end; The output terminal of said grid power supply is connected with the gate input of probe station via the grid current table, and said drain power is successively via being connected with the drain electrode input end of probe station behind drain current table, the test signal modulator; The output terminal of said measuring signal generator is connected with the trigger end of test signal modulator.
2. a kind of wide bandgap semiconductor chip dc performance test macro according to claim 1 is characterized in that between the gate input of said grid current table and probe station, also being provided with the test signal modulator; The output terminal of said measuring signal generator is connected with the trigger end of test signal modulator.
3. a kind of wide bandgap semiconductor chip dc performance test macro according to claim 1 and 2 is characterized in that also comprising the test signal monitor, and the input end of said test signal monitor is connected with the output terminal of test signal modulator.
4. a kind of wide bandgap semiconductor chip dc performance test macro according to claim 3 is characterized in that said test signal monitor is an oscillograph.
5. a kind of wide bandgap semiconductor chip dc performance test macro according to claim 1 and 2 is characterized in that also comprising filtration module, and said filtration module is located between grid current and the probe station or/and between test signal modulator and the probe station.
6. a kind of wide bandgap semiconductor chip dc performance test macro according to claim 1 is characterized in that said grid power supply and drain power are D.C. regulated power supply.
7. a kind of wide bandgap semiconductor chip dc performance test macro according to claim 1 is characterized in that said grid current table and drain current table are desk-top multimeter.
CN2012103120400A 2012-08-29 2012-08-29 System for testing direct current performance of wide bandgap semiconductor chip Pending CN102830337A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2012103120400A CN102830337A (en) 2012-08-29 2012-08-29 System for testing direct current performance of wide bandgap semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2012103120400A CN102830337A (en) 2012-08-29 2012-08-29 System for testing direct current performance of wide bandgap semiconductor chip

Publications (1)

Publication Number Publication Date
CN102830337A true CN102830337A (en) 2012-12-19

Family

ID=47333540

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2012103120400A Pending CN102830337A (en) 2012-08-29 2012-08-29 System for testing direct current performance of wide bandgap semiconductor chip

Country Status (1)

Country Link
CN (1) CN102830337A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103064005A (en) * 2012-12-21 2013-04-24 上海宏力半导体制造有限公司 Performance testing method of low power consumption chip
CN103913690A (en) * 2014-04-04 2014-07-09 中国科学院微电子研究所 Method and system for measuring frequency dispersion characteristic of transistor output resistance
CN106680545A (en) * 2016-12-30 2017-05-17 江苏中科君芯科技有限公司 Dynamic test clamp for IGBT and FRD chips
CN111562481A (en) * 2020-05-25 2020-08-21 中国电子科技集团公司第十三研究所 Compound semiconductor chip on-chip test circuit based on power-on probe

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101216528A (en) * 2008-01-15 2008-07-09 中国科学院上海微***与信息技术研究所 On-chip test method for microwave power amplifier chip and its test system
CN102023238A (en) * 2010-11-04 2011-04-20 中国电子科技集团公司第十三研究所 Clamp used for SiC MESFET (Metal Semiconductor Field Effect Transistor) direct current test
CN102456592A (en) * 2010-10-15 2012-05-16 北京京东方光电科技有限公司 Method and device for testing characteristics of thin film transistor on array substrate
CN102565650A (en) * 2010-12-07 2012-07-11 中国科学院微电子研究所 Measuring system of GaN HEMT device transconductance frequency scattering characteristic and method thereof
CN202748447U (en) * 2012-08-29 2013-02-20 中国电子科技集团公司第十三研究所 Wide-gap semiconductor chip direct current performance test system

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101216528A (en) * 2008-01-15 2008-07-09 中国科学院上海微***与信息技术研究所 On-chip test method for microwave power amplifier chip and its test system
CN102456592A (en) * 2010-10-15 2012-05-16 北京京东方光电科技有限公司 Method and device for testing characteristics of thin film transistor on array substrate
CN102023238A (en) * 2010-11-04 2011-04-20 中国电子科技集团公司第十三研究所 Clamp used for SiC MESFET (Metal Semiconductor Field Effect Transistor) direct current test
CN102565650A (en) * 2010-12-07 2012-07-11 中国科学院微电子研究所 Measuring system of GaN HEMT device transconductance frequency scattering characteristic and method thereof
CN202748447U (en) * 2012-08-29 2013-02-20 中国电子科技集团公司第十三研究所 Wide-gap semiconductor chip direct current performance test system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
欧阳思华等: "基于Agilent VEE的HEMT器件直流参数自动测试***", 《第五届中国测试学术会议论文集》, 31 May 2008 (2008-05-31) *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103064005A (en) * 2012-12-21 2013-04-24 上海宏力半导体制造有限公司 Performance testing method of low power consumption chip
CN103913690A (en) * 2014-04-04 2014-07-09 中国科学院微电子研究所 Method and system for measuring frequency dispersion characteristic of transistor output resistance
CN106680545A (en) * 2016-12-30 2017-05-17 江苏中科君芯科技有限公司 Dynamic test clamp for IGBT and FRD chips
CN111562481A (en) * 2020-05-25 2020-08-21 中国电子科技集团公司第十三研究所 Compound semiconductor chip on-chip test circuit based on power-on probe

Similar Documents

Publication Publication Date Title
CN104345262A (en) Universal circuit board test system
CN108761284A (en) Drain leakage test circuit in field-effect tube breakdown voltage characteristics and method
CN102608508B (en) Automatic real-time pulse measuring device and method for threshold voltage parameter of field-effect transistor
CN102830337A (en) System for testing direct current performance of wide bandgap semiconductor chip
CN107345996A (en) FET test circuit and method of testing
CN106772208B (en) Single three-phase meter integrated reliability test board
CN103048600A (en) Reverse breakdown voltage test system for semiconductor apparatus
CN101865946B (en) Alternating current parameter testing system and method of programmable digital integrated circuit
CN105137364A (en) Automatic test system of switch power supply
CN202119855U (en) System for measuring open circuit or short circuit of integrated circuit
CN105044536A (en) Novel packaging defect detection method and novel packaging defect detection system
CN204694799U (en) A kind of novel package detection system
CN202748447U (en) Wide-gap semiconductor chip direct current performance test system
CN103630729A (en) One-step wiring device and method for testing 1000kV lightning arrester reference voltage and leakage current
CN103792445A (en) Fully intelligent electric power overcurrent protection tester
CN105334468B (en) Solar cell capacitance waving map device and test method
CN202275140U (en) Avalanche energy test system for metal oxide semiconductor field effect transistor (MOSFET) device
CN202119878U (en) High voltage test power supply special circuit for simulating integrated circuit test system
CN103163443A (en) Instrument for automatically testing parameters of avalanche photo diode (APD)
CN106597320B (en) A kind of special for automatic test macro for microwave components power supply
CN208098658U (en) A kind of new RTC chip automatic sorting system
CN204575748U (en) A kind of test macro of semiconductor devices transient capacitance
CN101464501A (en) Calibrating apparatus for electric energy quality test analyzer
CN105242228A (en) Current blanking method and device of transformer iron core grounding current online monitoring equipment
CN103487745A (en) Automatic testing circuit of transforming amplifier and testing method

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C12 Rejection of a patent application after its publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20121219