CN102801405A - Method and device for switching chip mode - Google Patents

Method and device for switching chip mode Download PDF

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Publication number
CN102801405A
CN102801405A CN2012102129569A CN201210212956A CN102801405A CN 102801405 A CN102801405 A CN 102801405A CN 2012102129569 A CN2012102129569 A CN 2012102129569A CN 201210212956 A CN201210212956 A CN 201210212956A CN 102801405 A CN102801405 A CN 102801405A
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China
Prior art keywords
chip
mode
interface
sequence signal
predetermined sequence
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CN2012102129569A
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Chinese (zh)
Inventor
谢韶波
齐凡
刘小灵
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Chipsea Technologies Shenzhen Co Ltd
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Chipsea Technologies Shenzhen Co Ltd
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Priority to CN2012102129569A priority Critical patent/CN102801405A/en
Publication of CN102801405A publication Critical patent/CN102801405A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a method for switching a chip mode. The method comprises the following steps of: after a chip is powered on, resetting the chip, and sending a preset sequence signal to the chip through a communication input/output (I/O) interface; in a preset time period, detecting the preset sequence signal; and according to a detection result, switching the chip to a working mode corresponding to the preset sequence signal. The invention also discloses a device for switching the chip mode. By the method for switching the working mode of the chip according to a specific sequence signal sent by the communication I/O interface in a process of chip power-on resetting delay after the chip is powered on by a power supply and the ground, the beneficial effect that the universal IO interface of the chip does not occupied; and therefore, the reliability for switching the chip mode is improved, and mis-switching of the chip mode is effectively avoided.

Description

Chip mode changing method and device
Technical field
The present invention relates to technical field of integrated circuits, relate in particular to a kind of chip mode changing method and device.
Background technology
Generally, same chip has multiple different working pattern, such as: normal mode of operation, test pattern, debugging mode, memory programming pattern etc.; In the use of chip, need switch the mode of operation of chip sometimes.
In the prior art, the changing method of chip mode usually adopts following mode to realize: through a fixing pin switching of chip mode is controlled, during like specific pin ground connection, the mode of operation of chip switches to pattern 1; Specific pin connects power supply when cutting, and the mode of operation of chip is changed to pattern 2.This chip switch mode of prior art when circuit design at the beginning, is about to the fixedly pin that a certain pin is set at mode switch; When in circuit, needing to switch the mode of operation of chip, private communication IO (Input/Output, the I/O) interface that this pin switches as chip mode; In the time of in circuit, need not switching the mode of operation of chip, this pin remains the private communication IO interface that chip mode switches, and can not be used as IO interface general in the circuit; And use this chip mode changing method of prior art, reliability is low, occurs the misoperation that chip mode switches easily.
Summary of the invention
Main purpose of the present invention provides a kind of chip mode changing method and device, is intended to solve the chip mode switching and need takies this chip universal I interface and the low problem of chip mode switching reliability.
The invention discloses a kind of chip mode changing method, may further comprise the steps:
Behind chip power,,, send the predetermined sequence signal to said chip through communication I/O IO interface with said chip reset;
In the preset time section, detect said predetermined sequence signal;
According to testing result, switch said chip to the pairing mode of operation of said predetermined sequence signal.
Preferably, in the preset time section, the step that detects said predetermined sequence signal also comprises step before:
Choose the preset time section.
Preferably, said preset time section chooses two transmission cycles that should be not less than said predetermined sequence signal.
Preferably, said communication IO interface is under the non-switching state of said chip, as the universal I interface of said chip.
The present invention also discloses a kind of chip mode switching device shifter, comprising:
The sequence sending module is used for behind chip power, with said chip reset, through communication IO interface, sends the predetermined sequence signal to said chip;
The Sequence Detection module is used in the preset time section, detects said predetermined sequence signal;
Mode switch module is used for according to testing result, switches said chip to the pairing mode of operation of said predetermined sequence signal.
Preferably, said chip mode switching device shifter also comprises:
Choose module detection time, be used to choose the preset time section.
Preferably, said preset time section chooses two transmission cycles that should be not less than said predetermined sequence signal.
Preferably, said communication IO interface is under the non-switching state of said chip, as the universal I interface of said chip.
The present invention is through after giving chip power on power supply and ground; In the process of chip power reset delay; Switch the method for chip operation pattern through the signal of communication IO interface transmission particular sequence and according to the signal of this particular sequence; Have the beneficial effect that does not take chip universal I interface, improved the reliability that chip mode switches, avoided the mistake of chip mode to switch effectively.
Description of drawings
Fig. 1 is the chip mode changing method first embodiment schematic flow sheet of the present invention;
Fig. 2 is a chip mode changing method integrated circuit structured flowchart of the present invention;
Fig. 3 is the signal timing diagram of chip mode changing method of the present invention;
Fig. 4 is the chip mode changing method second embodiment schematic flow sheet of the present invention;
Fig. 5 is the chip mode switching device shifter first example structure sketch map of the present invention;
Fig. 6 is the chip mode switching device shifter second example structure sketch map of the present invention.
The realization of the object of the invention, functional characteristics and advantage will combine embodiment, further specify with reference to accompanying drawing.
Embodiment
Further specify technical scheme of the present invention below in conjunction with Figure of description and specific embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
With reference to Fig. 1, Fig. 1 is the chip mode changing method first embodiment schematic flow sheet of the present invention; As shown in Figure 1, chip mode changing method of the present invention may further comprise the steps:
Step S01, behind chip power, with said chip reset,, send the predetermined sequence signal to said chip through communication IO interface;
With reference to Fig. 2, Fig. 2 is a chip mode changing method integrated circuit structured flowchart of the present invention; As shown in Figure 2, said chip interface mainly comprise the power vd D interface, GND interface and communication IO interface, also comprise other universal I interfaces.Utilize power vd D and ground GND to give chip power, in the process of chip power reset delay, constantly send specific sequence signal, promptly constantly send the signal of predetermined sequence through communication IO interface; At this moment, this communication IO interface is as the private communication IO interface of chip mode switching.In a preferred embodiment, said predetermined sequence signal adopts binary code 0 and 1 to define.Such as, defined nucleotide sequence signal 1 is: 01010101, and to define this predetermined sequence signal 1 pairing chip operation pattern be debugging mode; Defined nucleotide sequence signal 2 is: 11110000, and to define these predetermined sequence signal 2 pairing chip operation patterns be test pattern.
Step S02, in the preset time section, detect said predetermined sequence signal;
With reference to Fig. 3, Fig. 3 is the signal timing diagram of chip mode changing method of the present invention; As shown in Figure 3,66 expression chips are in the electrification reset delayed phase, and 88 expressions detect the preset time section of said predetermined sequence signal.In a preferred embodiment; In this preset time section 88, read the binary code of the said predetermined sequence signal of expression, according to the binary code result who reads; Obtain the pairing chip operation pattern of said predetermined sequence signal, accomplish detection said predetermined sequence signal.
Step S03, according to testing result, switch said chip to the pairing chip mode of said predetermined sequence signal.
According to the pairing chip operation pattern of signal of the predetermined sequence that detects, said chip is switched to this mode of operation and removes the reset mode of chip; Communication IO interface special-purpose when at this moment, chip mode switches can be used as the universal I interface of chip under the work at present pattern; This now circuit function is required more and more require the use of circuit hardware situation less and less simultaneously under, carry out that chip mode switches and this way of not taking chip universal I interface is significant.
Present embodiment chip mode changing method is through after giving chip power on power supply and ground; In the process of chip power reset delay; Switch the method for chip operation pattern through the signal of communication IO interface transmission particular sequence and according to the signal of this particular sequence; Have the beneficial effect that does not take chip universal I interface, improved the reliability that chip mode switches, avoided the mistake of chip mode to switch effectively.
With reference to Fig. 4, Fig. 4 is the invention chip mode changing method second embodiment schematic flow sheet; The difference of chip mode changing method second embodiment of the present invention and first embodiment is: before step S02, also comprise step S10; Present embodiment only specifically describes step S10, and related other steps of chip mode changing method of the present invention repeat no more at this please with reference to above-mentioned related embodiment.
As shown in Figure 4, in the chip mode changing method of the present invention, at step S02, in the preset time section, the step that detects said predetermined sequence signal also comprises step before:
Step S10, choose the preset time section.
Signal timing diagram with reference to Fig. 3 chip mode changing method of the present invention; In a preferred embodiment; Preset time section 88 is that the chip mode change detection time should be smaller or equal to electrification reset time of delay 66; Chip mode change detection time 88 is more little, and the possibility that the chip mode mistake switches then to occur just more little, but the chip mode change detection time 88 be greater than two transmission cycles that equal particular sequence, promptly guarantee in the chip mode change detection time 88, can detect a complete particular sequence; Can judge the pairing chip mode of signal of this predetermined sequence like this, reduce chip mode mistake switching rate.
Present embodiment can accurately be judged the pairing chip mode of this signal specific through choosing two methods that transmit the cycle that the time period of detecting the particular sequence signal is not less than this particular sequence signal, has the beneficial effect that reduces chip mode mistake switching rate.
With reference to Fig. 5, Fig. 5 is the chip mode switching device shifter first example structure sketch map of the present invention.As shown in Figure 5, chip mode switching device shifter of the present invention comprises:
Sequence sending module 01 is used for behind chip power, with said chip reset, through communication IO interface, sends the signal of predetermined sequence to said chip;
With reference to Fig. 2 chip mode changing method of the present invention integrated circuit structured flowchart, said chip interface mainly comprise the power vd D interface, GND interface and communication IO interface, also comprise other universal I interfaces.Utilize power vd D and ground GND to give chip power, in the process of chip power reset delay, sequence sending module 01 constantly sends specific sequence signal through communication IO interface, promptly constantly sends the signal of predetermined sequence; At this moment, this communication IO interface is as the private communication IO interface of chip mode switching.In a preferred embodiment, said predetermined sequence signal adopts binary code 0 and 1 to define.Such as, defined nucleotide sequence signal 1 is: 01010101, and to define this predetermined sequence signal 1 pairing chip operation pattern be debugging mode; Defined nucleotide sequence signal 2 is: 11110000, and to define these predetermined sequence signal 2 pairing chip operation patterns be test pattern.
Sequence Detection module 02 is used in the preset time section, detecting the signal of said predetermined sequence;
With reference to the signal timing diagram of Fig. 3 chip mode changing method of the present invention, 66 expression chips are in the electrification reset delayed phase, and 88 expressions detect the preset time section of said predetermined sequence signal.In preset time section 88, Sequence Detection module 02 detects the signal of the predetermined sequence of sequence sending module 01 transmission.In a preferred embodiment; In this preset time section 88; Sequence Detection module 02 reads the binary code of the said predetermined sequence signal of expression; According to the binary code result who reads, obtain the pairing chip operation pattern of said predetermined sequence signal, accomplish detection to said predetermined sequence signal.
Mode switch module 03 is used for according to testing result, switches said chip to the pairing mode of operation of said predetermined sequence.
The pairing chip operation pattern of signal of the predetermined sequence that detects according to Sequence Detection module 02, mode switch module 03 switches to this mode of operation with said chip and removes the reset mode of chip; Communication IO interface special-purpose when at this moment, chip mode switches can be used as the universal I interface of chip under the work at present pattern; This now circuit function is required more and more require the use of circuit hardware situation less and less simultaneously under, carry out that chip mode switches and this way of not taking chip universal I interface is significant.
Present embodiment chip mode switching device shifter is through after giving chip power on power supply and ground; In the process of chip power reset delay; Send the signal of particular sequence and switch the chip operation pattern through communication IO interface according to the signal of this particular sequence; Have the beneficial effect that does not take chip universal I interface, improved the reliability that chip mode switches, avoided the mistake of chip mode to switch effectively.
With reference to Fig. 6, Fig. 6 is the chip mode switching device shifter second example structure sketch map of the present invention.The difference of chip mode switching device shifter second embodiment of the present invention and first embodiment is only to have increased and chosen module 04 detection time; Present embodiment only specifically describes choosing module 04 detection time, and related other modules of present embodiment repeat no more at this please with reference to the specific descriptions of above-mentioned related embodiment.
As shown in Figure 6, chip mode switching device shifter of the present invention also comprises:
Choose module 04 detection time, be used to choose the preset time section.
Signal timing diagram with reference to Fig. 3 chip mode changing method of the present invention; In a preferred embodiment; Choosing preset time section 88 that module 04 chooses detection time should be smaller or equal to electrification reset time of delay 66; Chip mode change detection time 88 is more little, and the possibility that the chip mode mistake switches then to occur just more little, but the chip mode change detection time 88 be greater than two transmission cycles that equal particular sequence, promptly guarantee in the chip mode change detection time 88, can detect a complete particular sequence; Can judge the pairing chip mode of signal of this predetermined sequence like this, reduce chip mode mistake switching rate.
Present embodiment can accurately be judged the pairing chip mode of this signal specific through choosing two transmission cycles that the time period of detecting the particular sequence signal is not less than this particular sequence signal, has the beneficial effect that reduces chip mode mistake switching rate.
The above is merely the preferred embodiments of the present invention; Be not so limit its claim; Every equivalent structure or equivalent flow process conversion that utilizes specification of the present invention and accompanying drawing content to be done; Directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present invention.

Claims (8)

1. a chip mode changing method is characterized in that, may further comprise the steps:
Behind chip power,,, send the predetermined sequence signal to said chip through communication I/O IO interface with said chip reset;
In the preset time section, detect said predetermined sequence signal;
According to testing result, switch said chip to the pairing mode of operation of said predetermined sequence signal.
2. chip mode changing method as claimed in claim 1 is characterized in that, and is said in the preset time section, and the step that detects said predetermined sequence signal also comprises step before:
Choose the preset time section.
3. chip mode changing method as claimed in claim 2 is characterized in that, said preset time section choose two transmission cycles that should be not less than said predetermined sequence signal.
4. according to claim 1 or claim 2 chip mode changing method is characterized in that said communication IO interface is under the non-switching state of said chip, as the universal I interface of said chip.
5. a chip mode switching device shifter is characterized in that, comprising:
The sequence sending module is used for behind chip power, with said chip reset, through communication IO interface, sends the predetermined sequence signal to said chip;
The Sequence Detection module is used in the preset time section, detects said predetermined sequence signal;
Mode switch module is used for according to testing result, switches said chip to the pairing mode of operation of said predetermined sequence signal.
6. chip mode switching device shifter as claimed in claim 5 is characterized in that, also comprises:
Choose module detection time, be used to choose the preset time section.
7. chip mode switching device shifter as claimed in claim 6 is characterized in that, said preset time section choose two transmission cycles that should be not less than said predetermined sequence signal.
8. like claim 5 or 6 described chip mode switching device shifters, it is characterized in that said communication IO interface is under the non-switching state of said chip, as the universal I interface of said chip.
CN2012102129569A 2012-06-26 2012-06-26 Method and device for switching chip mode Pending CN102801405A (en)

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Application Number Priority Date Filing Date Title
CN2012102129569A CN102801405A (en) 2012-06-26 2012-06-26 Method and device for switching chip mode

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104423290A (en) * 2013-09-04 2015-03-18 罗伯特·博世有限公司 Method for adjusting control equipment
CN112782551A (en) * 2019-11-04 2021-05-11 珠海零边界集成电路有限公司 Chip and test system of chip

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Publication number Priority date Publication date Assignee Title
CN1512336A (en) * 2002-12-28 2004-07-14 深圳市中兴通讯股份有限公司 8051 monolithic system upgrading method and monitoring circuit
CN1804799A (en) * 2005-01-12 2006-07-19 华为技术有限公司 SCM online loading and updating method and system
US20060194538A1 (en) * 2005-02-25 2006-08-31 Arto Palin Method and system for VoIP over WLAN to bluetooth headset using ACL link and sniff for aligned eSCO transmission
CN101557583A (en) * 2009-03-19 2009-10-14 珠海银邮光电技术发展股份有限公司 Remote-updating and version-switching method of repeater equipment embedded software
CN101666838A (en) * 2009-09-15 2010-03-10 北京天碁科技有限公司 Chip system and mode control method thereof
CN101154183B (en) * 2006-09-29 2011-12-28 上海海尔集成电路有限公司 Microcontroller built-in type on-line simulation debugging system

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1512336A (en) * 2002-12-28 2004-07-14 深圳市中兴通讯股份有限公司 8051 monolithic system upgrading method and monitoring circuit
CN1804799A (en) * 2005-01-12 2006-07-19 华为技术有限公司 SCM online loading and updating method and system
US20060194538A1 (en) * 2005-02-25 2006-08-31 Arto Palin Method and system for VoIP over WLAN to bluetooth headset using ACL link and sniff for aligned eSCO transmission
CN101154183B (en) * 2006-09-29 2011-12-28 上海海尔集成电路有限公司 Microcontroller built-in type on-line simulation debugging system
CN101557583A (en) * 2009-03-19 2009-10-14 珠海银邮光电技术发展股份有限公司 Remote-updating and version-switching method of repeater equipment embedded software
CN101666838A (en) * 2009-09-15 2010-03-10 北京天碁科技有限公司 Chip system and mode control method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104423290A (en) * 2013-09-04 2015-03-18 罗伯特·博世有限公司 Method for adjusting control equipment
CN112782551A (en) * 2019-11-04 2021-05-11 珠海零边界集成电路有限公司 Chip and test system of chip

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Application publication date: 20121128