CN102790542A - Synchronous rectification control circuit, converter and synchronous rectification control method - Google Patents
Synchronous rectification control circuit, converter and synchronous rectification control method Download PDFInfo
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- CN102790542A CN102790542A CN2012102653450A CN201210265345A CN102790542A CN 102790542 A CN102790542 A CN 102790542A CN 2012102653450 A CN2012102653450 A CN 2012102653450A CN 201210265345 A CN201210265345 A CN 201210265345A CN 102790542 A CN102790542 A CN 102790542A
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Abstract
The invention provides a synchronous rectification control circuit, a converter and a synchronous rectification control method. The synchronous rectification control circuit comprises a detection module, a microprocessor, a control module and a drive, wherein the detection module is used for detecting voltage between a drain electrode and a source electrode of a synchronous rectification switch tube, the voltage is compared with at least one level threshold value to obtain at least one comparison result, and at least one pulse sequence corresponding to at least one level threshold value is generated according to at least one comparison result; the microprocessor is used for providing at least one front-edge blanking threshold value corresponding to at least one pulse sequence; the control module receives at least one pulse sequence and at least one front-edge blanking threshold value and is used for counting the pulse quantity of at least one pulse sequence to obtain at least one count value, and a drive control signal is generated when at least one count value reaches at least one front-edge blanking threshold value; and the drive receives the drive control signal and is used for driving the synchronous rectification switch tube according to the drive control signal. Due to the adoption of the synchronous rectification control circuit, the converter and the synchronous rectification control method, the dead time can be flexibly adjusted.
Description
Technical field
The present invention relates to the synchronous rectification field, more specifically, relate to a kind of synchronous commutating control circuit, converter and synchronous rectification control method.
Background technology
Switching Power Supply (for example, converter) can comprise transformer, resonant circuit, circuit of synchronous rectification and synchronous commutating control circuit.For example; Converter can become first alternating voltage through resonant circuit with the first DC power supply direct voltage; Alternating voltage becomes second alternating voltage through transformer; Second alternating voltage converts second direct voltage to through circuit of synchronous rectification and is added in the load, thereby accomplishes the conversion from first direct voltage to second direct voltage, and wherein synchronous commutating control circuit is realized synchronous rectification through the turning on and off of synchronous rectification switch pipe in the control circuit of synchronous rectification.
Synchronous rectification is a widely used technology in the field of switch power; It adopts the extremely low special power metal oxide layer semiconductor field-effect transistor of on state resistance (Metal Oxide Semiconductor Field Effect Transistor; MOSFET) replace rectifier diode, to reduce rectifier loss.
Simultaneously, when underloading, with the synchronous rectification switch pipe be operated in imitative diode mode (Ideal Diode Emulation, IDE).Whether inductive current is zero when turn-offing according to the synchronous rectification switch pipe; Can the mode of operation of Switching Power Supply be divided into continuous mode (Continuous Current mode; CCM), discontinuous mode (Discontinuous Current mode; DCM) and critical conduction mode (Critical Current mode, CrCM).Under the CCM pattern, inductive current was non-vanishing when the synchronous rectification switch pipe turn-offed, and under the DCM/CrCM pattern, inductive current was zero when the synchronous rectification switch pipe turn-offed.Under the DCM pattern, can eliminate output filtering circulation, reduce magnetic loss and switching loss, prevent the anti-electric current of irritating simultaneously, thereby improve reliability.
Present intelligent rectification (Smart Rectifier) circuit generally adopts analogue device to realize synchronous rectification.In the synchronous rectification process, (for example, the voltage Vds between source electrode MOSFET) and the drain electrode and utilizes comparator comparative voltage Vds and three level threshold Vth1, Vth2 and Vth3 can to detect the synchronous rectification switch pipe.Vth1 promptly turn-offs critical voltage for turn-offing level threshold, and Vth2 promptly opens critical voltage for opening level threshold, and Vth3 is the reset level threshold value, and critical voltage promptly resets.When voltage Vds reaches level threshold Vth2, produce the synchronous rectification drive signal, and keep a preset minimum ON time (Minimum On Time, MOT); When Vds reached level threshold Vth1, the drive signal of synchronous rectification was closed, and produced self-locking, thereby the oscillating voltage that is produced when preventing to turn-off makes the synchronous rectification switch pipe mislead; When Vds reached Vth3, the minimum turn-off time resetted, from and the beginning next cycle detection and control.Usually, there is Dead Time between the two in the conducting simultaneously of synchronous rectification switch Guan Yuzhu open pipe.
Yet, the conducting resistance (R of different synchronous rectification switch pipes
Don) variant, owing to adopt comparator to come comparative voltage Vds and level threshold, make level threshold be not easy to be adjusted to optimum value, therefore, make that the adjusting of Dead Time of synchronous rectification is dumb.
Summary of the invention
Embodiments of the invention provide a kind of synchronous commutating control circuit, converter and synchronous rectification control method, can regulate the Dead Time of synchronous rectification neatly.
A kind of synchronous commutating control circuit is provided on the one hand; Comprise: detection module; Be used to detect the drain electrode of synchronous rectification switch pipe and the voltage between the source electrode; And this voltage and at least one level threshold compared obtain at least one comparative result, and generate and corresponding at least one pulse train of above-mentioned at least one level threshold according to above-mentioned at least one comparative result respectively; Microprocessor is used for being provided with and providing and corresponding at least one the lead-edge-blanking threshold value of above-mentioned at least one pulse train; Control module; Be used to receive above-mentioned at least one pulse train of this detection module generation and above-mentioned at least one lead-edge-blanking threshold value that this microprocessor provides; Pulse number to above-mentioned at least one pulse train counts to get at least one count value respectively; And when above-mentioned at least one count value reaches above-mentioned at least one lead-edge-blanking threshold value, generate drive control signal; Driver is used to receive this drive control signal that this control module is exported, and drives this synchronous rectification switch pipe according to this drive control signal.
On the other hand, a kind of converter is provided, has comprised above-mentioned synchronous commutating control circuit.
On the other hand, a kind of synchronous rectification control method is provided, has comprised: the drain electrode of synchronous rectification switch pipe and the voltage between the source electrode and at least one level threshold have been compared obtain at least one comparative result; Generate and corresponding at least one pulse train of above-mentioned at least one level threshold according to above-mentioned at least one comparative result respectively; Pulse number to above-mentioned at least one pulse train counts to get at least one count value respectively, and when above-mentioned at least one count value reaches at least one lead-edge-blanking threshold value, generates drive control signal; Drive this synchronous rectification switch pipe according to this drive control signal.
Can be according to embodiments of the invention with the drain electrode of synchronous rectification switch pipe and the discrete pulse train that changes into of comparative result of voltage between the source electrode and level threshold; And the pulse number to this pulse train counts to get count value, and when this count value reaches the lead-edge-blanking threshold value of microprocessor setting, just sends the control signal of the switch of control synchronous rectification switch pipe.Because this lead-edge-blanking threshold value can be utilized the microprocessor setting, therefore, can pass through the moment of this lead-edge-blanking threshold value control synchronous rectification switch pipe conducting or shutoff, thereby can adjust Dead Time neatly.
Description of drawings
In order to be illustrated more clearly in the technical scheme of the embodiment of the invention; To do to introduce simply to the accompanying drawing of required use in the embodiment of the invention below; Obviously, below described accompanying drawing only be some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the circuit block diagram of synchronous commutating control circuit according to an embodiment of the invention.
Fig. 2 is the circuit block diagram of synchronous commutating control circuit according to another embodiment of the present invention.
Fig. 3 is the circuit block diagram of synchronous commutating control circuit according to another embodiment of the present invention.
Fig. 4 is the circuit diagram of converter according to another embodiment of the present invention
Fig. 5 is the sequential chart of synchronous rectification control under the CCM pattern according to another embodiment of the present invention.
Fig. 6 is the sequential chart of synchronous rectification control under the DCM/CrCM pattern according to another embodiment of the present invention.
Fig. 7 is the sequential chart of synchronous rectification control under the DCM/CrCM pattern according to another embodiment of the present invention.
Fig. 8 is the indicative flowchart of synchronous rectification control method according to another embodiment of the present invention.
Embodiment
To combine the accompanying drawing in the embodiment of the invention below, the technical scheme in the embodiment of the invention is carried out clear, intactly description, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
Conventional intelligent rectification circuit owing to there is not the DPWM synchronizing signal, is not easy to control the turn-off time under the CCM pattern except the adjusting of the Dead Time of synchronous rectification is dumb, only under the DCM pattern, could obtain synchronous rectification state of a control preferably.
Handle through live signal (for example, the drain electrode of synchronous rectification switch pipe and the voltage between the source electrode) being carried out discretization according to embodiments of the invention,, reach better synchronous rectification control effect to realize Digital Detecting and control flexibly.
Fig. 1 is the circuit block diagram of synchronous commutating control circuit 100 according to an embodiment of the invention.Synchronous commutating control circuit 100 comprises: detection module 110, control module 120, microprocessor 130, driver 140.
For example, the level threshold Vth1 that above-mentioned at least one level threshold can be synchronous rectification and at least one among the Vth2, Vth1 and Vth2 are negative value; And Vth1 is greater than Vth2; Wherein Vth1 is used to control the shutoff of synchronous rectification switch pipe Q1, for example, sends the control signal of turn-offing the synchronous rectification switch pipe during greater than Vth1 at above-mentioned voltage Vds; Vth2 is used to control the open-minded of synchronous rectification switch pipe; For example, during less than Vth2, send the control signal of opening synchronous rectification switch pipe Q1 at above-mentioned voltage Vds.Embodiments of the invention are called afterflow with the drain electrode of synchronous rectification switch pipe and the voltage between the source electrode greater than the state of Vth1 and cross nought state, and this voltage is called the afterflow state less than the state of Vth2.
Will be according to embodiments of the invention through the discrete high frequency series that changes into of the comparative result (being that nought state and/or afterflow state are crossed in afterflow) that more above-mentioned level threshold and above-mentioned voltage Vds obtain; Pulse number to this high frequency series counts to get count value; And, this count value just sends control signal when reaching the lead-edge-blanking threshold value of microprocessor setting, with Control Driver switch or shutoff synchronous rectification switch pipe.For example, this lead-edge-blanking threshold value is set to 5, just sends control signal when then control module 120 receives the 5th pulse of 5 detection modules 110 output.
According to embodiments of the invention Vth1 and Vth2 can be set formerly, adjust the opportunity of shutoff of synchronous rectification switch pipe or conducting then through the size of regulating the lead-edge-blanking threshold value.In other words, can adjust roughly through Vth1 and Vth2 that the synchronous rectification switch pipe turn-offs or the opportunity of conducting, come to adjust subtly further that the synchronous rectification switch pipe turn-offs or the opportunity of conducting through the size of regulating the lead-edge-blanking threshold value.
Can be according to embodiments of the invention with the drain electrode of synchronous rectification switch pipe and the discrete pulse train that changes into of comparative result of voltage between the source electrode and level threshold; And the pulse number to this pulse train counts to get count value, and when this count value reaches the lead-edge-blanking threshold value of microprocessor setting, just sends the control signal that is used to drive the synchronous rectification switch pipe.Because this lead-edge-blanking threshold value can be utilized the microprocessor setting, therefore, can adjust the opportunity of synchronous rectification switch pipe conducting or shutoff through this lead-edge-blanking threshold value, thereby can adjust Dead Time neatly.In addition, being set the lead-edge-blanking time can also avoid burr in the detected voltage signal to cause mistake to send out a control signal.
Fig. 2 is the circuit block diagram of synchronous commutating control circuit 200 according to another embodiment of the present invention.200 comprise: detection module 210, control module 220, microprocessor MCU, driver U6.The detection module 110 of the embodiment of the detection module 210 of the embodiment of Fig. 2, control module 220, MCU, driver U6 and Fig. 1, control module 120, microprocessor 130, driver 140 are similar, suitably omit detailed description at this.
According to embodiments of the invention; Detection module 210 comprises: the first comparator C omp1, the second comparator C omp2, first and door U3, second with the clock of a U4 and predeterminated frequency; Said at least one level threshold comprises the shutoff level threshold and opens level threshold; Wherein the more above-mentioned voltage Vds of the first comparator C omp1 with turn-off level threshold, and export first comparative result when turn-offing level threshold at this voltage, first receives the clock sequence that the clock of first comparative result and the predeterminated frequency of first comparator C omp1 output is exported with door; And export first pulse train, the shutoff level threshold is a negative value; The more above-mentioned voltage of the second comparator C omp2 with open level threshold; And export second comparative result when opening level threshold at this voltage; Second receives the clock sequence of clock output of second comparative result and this predeterminated frequency of second comparator C omp2 output with door U4; And export second pulse train, wherein opening level threshold is negative value, opens level threshold less than turn-offing level threshold; Turn-offing level threshold is the level threshold that is used to turn-off said synchronous rectification switch pipe, and to open level threshold be the level threshold of opening said synchronous rectification switch pipe.
For example, the shutoff level threshold is Vth1, and opening level threshold is Vth2, and first comparative result is that nought state is crossed in afterflow, and second comparative result is the afterflow state.
For example, the predeterminated frequency of clock can be 33MHz, and embodiments of the invention are not limited to this, for example, can also be other frequencies such as 25MHz, 50MHz, 100M.Can select suitable clock frequency according to the requirement of accuracy of detection, for example, clock frequency is high more, and accuracy of detection is high more.
According to embodiments of the invention; Microprocessor MCU is provided with and provides and first pulse train and the corresponding first lead-edge-blanking threshold value of second pulse train and the second lead-edge-blanking threshold value; Wherein control module 220 comprises: turn-off unit U1; Be used to receive first pulse train that the first lead-edge-blanking threshold value that microprocessor MCU provides and detection module 220 provide; Pulse number to first pulse train counts to get first count value, and under the situation of first count value greater than the first lead-edge-blanking threshold value, first control signal of output low level; Open unit U2; Be used to receive second pulse train that the second lead-edge-blanking threshold value that microprocessor MCU provides and detection module 210 provide; Pulse number to second pulse train counts to get second count value; And under the situation of second count value greater than the second lead-edge-blanking threshold value, second control signal of output high level; The 4th with the door U7; Be used to receive first control signal of the output of turn-offing unit U1 and open second control signal of the output of unit U2; And export above-mentioned drive control signal Control Driver according to first control signal and second control signal and open or turn-off the synchronous rectification switch pipe; Wherein, Control Driver was opened the synchronous rectification switch pipe when drive control signal was high level, and Control Driver was turn-offed the synchronous rectification switch pipe when drive control signal was low level.
For example, under the DCM pattern, when first control signal is low level, the 4th with a door U7 output low level, thereby Control Driver U6 turn-offs synchronous rectification switch pipe Q1; When first control signal and second control signal are high level, the 4th with a door U7 output low level, thereby Control Driver U6 opens synchronous rectification switch pipe Q1.
The synchronous commutating control circuit 200 of Fig. 2 also comprises: digital pulse width modulation (Digital Pulse Width Modulation; DPWM) engine is used to produce DPWM synchronizing signal (for example, DPWM square-wave signal); The 4th also receives this DPWM synchronizing signal of DPWM engine output with door U7; Wherein the 4th turn-off this DPWM synchronizing signal during for low level in first control signal, when second control signal and second control signal are high level, export this DPWM synchronizing signal with door U7; And when this DPWM synchronizing signal is low level; Control Driver U6 turn-offs this synchronous rectification switch pipe, and when this DPWM synchronizing signal was high level, Control Driver U6 opened synchronous rectification switch pipe Q1.
Add shutoff that DPWM synchronizing signal can further control synchronous rectification switch pipe the 4th with the input of door U7 according to embodiments of the invention; For example; Under the CCM pattern, when the DPWM synchronizing signal became low level, above-mentioned voltage Vds maybe also not ultra Vth1; At this moment, can the synchronous rectification switch pipe be turn-offed through low level DPWM synchronizing signal.Because the switch synchronizing information can be known, therefore, the control of turn-off time synchronously can more be optimized.
Alternatively, as another embodiment, open unit U2 and turn-off unit U1, and utilize this DPWM synchronizing signal to reset separately in each synchronous rectification cycle also from above-mentioned this DPWM synchronizing signal of DPWM engine reception.
For example, in each synchronous rectification cycle, open unit U2 and can reset through the high level or the low level of DPWM synchronizing signal, so that carry out the synchronous rectification control of following one-period with the register that turn-offs the counter among the unit U1 or be used for latch signal.
Fig. 2 is the circuit block diagram of synchronous commutating control circuit 300 according to another embodiment of the present invention.300 comprise: detection module 310, control module 320, microprocessor MCU, driver U6.The detection module 210 of the embodiment of Fig. 2 of the embodiment of the detection module 310 of the embodiment of Fig. 3, control module 320, MCU, driver U6 and Fig. 2, control module 220, MCU, driver U6 are similar, suitably omit detailed description at this.
According to embodiments of the invention, microprocessor MCU also is provided with and provides above-mentioned at least one level threshold of the 3rd lead-edge-blanking threshold value also to comprise the reset level threshold value.Detection module 310 also comprises: the 3rd comparator C omp3 and the 3rd with the door U5; Wherein relatively this voltage and reset level threshold value are exported the 3rd comparative result to the 3rd comparator C omp3; The 3rd receives the clock sequence of clock output of the 3rd comparative result and this predeterminated frequency of the 3rd comparator C omp3 output with door U5; And export three-pulse sequence; Wherein turn-off unit U1 and open unit U2 and also receive three-pulse sequence from the 3rd with a door U5, to the pulse number of three-pulse sequence count the 3rd count value, and reach in the 3rd count value in each synchronous rectification cycle under the situation of the 3rd lead-edge-blanking threshold value and reset separately.
For example; In each synchronous rectification cycle; Open unit U2 and can reset through three-pulse sequence, so that carry out the synchronous rectification control of following one-period, for example with the register that turn-offs the counter among the unit U1 or be used for latch signal; The 3rd lead-edge-blanking threshold value is set to 5, then can reset in the 5th pulse of pulse train.
Alternatively; As another embodiment; Microprocessor MCU also is provided with and provides the minimum turn-off time threshold for turn-offing unit U1; Turn-off unit U1 also under the situation of first count value greater than the first lead-edge-blanking threshold value; Flip-flop number obtains minimum turn-off time counting value, and turn-off unit U1 also minimum service time count value less than minimum service time during threshold value to the 4th with first control signal of door U7 output low level so that the 4th turn-off a synchronous rectification switch pipe Q1 with a door U7 Control Driver U6.
For example, the minimum turn-off time threshold can be provided with through microprocessor MCU, can adjust the suitable minimum turn-off time through regulating this minimum turn-off time threshold easily.
Alternatively, first control signal also can be exported to and open unit U2, so that open unit U2 to turn-offing synchronous rectification switch pipe Q1 with four with door U7 output low level signal.
Alternatively; As another embodiment; Microprocessor MCU also for open unit U2 be provided with and provide minimum service time threshold value, open unit U2 also under the situation of second count value greater than the second lead-edge-blanking threshold value, flip-flop number obtains minimum service time count value; Minimum service time count value send three control signal to turn-offing unit U1 less than minimum service time during threshold value, with so that turn-off unit U1 to the 4th with first control signal of door U7 output high level.
For example, minimum service time threshold value can be provided with through microprocessor MCU, can adjust suitable minimum service time through regulating this minimum service time threshold value easily.
Alternatively, as another embodiment, turn-off unit U1 in first count value during greater than the first lead-edge-blanking threshold value; To opening unit U2 output zero passage status signal; Opened unit U2 when minimum service time, counting reached this minimum service time threshold value, detect this zero passage status signal, if this zero passage status signal is a high level; The load of then confirming the circuit of synchronous rectification at this synchronous rectification switch pipe place is a underloading, and to the 4th with second control signal of door U7 output low level.
For example, under the underloading pattern, control the 4th and do not export the DPWM synchronizing signal with a door U7, then the synchronous rectification switch pipe does not have driving, only through its body diode afterflow.The conducting resistance of different synchronization rectifier switch pipe there are differences, and therefore the size of detected signal can be variant, through regulating the minimum service time threshold value and the first lead-edge-blanking threshold value, can obtain the detection of best afterflow zero crossing.
Further; In ensuing certain synchronous rectification cycle, logical unit U2 also when minimum service time, counting reached this minimum service time threshold value, detects this zero passage status signal; If this zero passage status signal is a low level; Confirm that then load is heavy duty, and can be according to the output of above-mentioned count value and lead-edge-blanking threshold value and minimum service time threshold value control DPWM synchronizing signal, to drive the synchronous rectification switch pipe.
Alternatively, as another embodiment, synchronous commutating control circuit 100 also comprises: voltage clamping circuit Q2, be connected between the drain electrode or source electrode of detection module 310 and synchronous rectification switch pipe Q1, and be used for above-mentioned voltage is carried out clamp control.
According to embodiments of the invention, a kind of converter that comprises the synchronous commutating control circuit in the foregoing description is provided.
This converter can comprise transformer; Resonant circuit; Circuit of synchronous rectification comprises: the synchronous rectification switch pipe; And synchronous commutating control circuit; Comprise: be used to detect the drain electrode of synchronous rectification switch pipe and the voltage between the source electrode; Said voltage and at least one level threshold compared obtain at least one comparative result, and generate and corresponding at least one pulse train of above-mentioned at least one level threshold according to above-mentioned at least one comparative result respectively; Setting also provides and corresponding at least one the lead-edge-blanking threshold value of above-mentioned at least one pulse train; Pulse number to above-mentioned at least one pulse train counts to get at least one count value respectively, and when above-mentioned at least one count value reaches said at least one lead-edge-blanking threshold value, generates drive control signal; Drive the synchronous rectification switch pipe according to this drive control signal.
Fig. 4 is the circuit diagram of converter according to another embodiment of the present invention.The converter of the embodiment of Fig. 4 can comprise the driver U8 of BUCK circuit, main switch Q3, the synchronous commutating control circuit 400 of synchronous rectification switch pipe Q1 to be controlled.The non-isolation of the converter using of the embodiment of Fig. 4 BUCK circuit can comprise: synchronous rectification switch pipe Q1, main switch Q3 and coil L.Synchronous commutating control circuit 400 can comprise: voltage clamping circuit Q2, detection module 410, control module 420, DPWM engine, microprocessor MCU and driver U6.Detection module 410 can comprise: comparator C omp1, comparator C omp2, level threshold VTH1, level threshold VTH2, with a door U3, with the high frequency clock of door U4 and 33MHz.Control module 420 can comprise: turn-off unit U1 with open unit U2 and with door U7.
The drain electrode of the source electrode of main switch Q3 and synchronous rectification switch pipe Q1 can be connected to the same end of coil L.Main switch Q3 is connected to the positive pole of power supply V1.The minus earth of V1.The source ground of synchronous rectification switch pipe Q1, its grid receives the driving of synchronous commutating control circuit 400.Main switch Q3 receives the driving of driver U8, and promptly the output of driver U8 is connected to the grid level of main switch Q3.Driver U8 receives the control signal (for example, DPWM square wave) of DPWM engine output.The DPWM engine is used to export the DPWM synchronizing signal SYN and the control signal that is used to drive main switch Q3 that is used to drive synchronous rectification switch pipe Q1, and two signals can not be high level simultaneously, makes that main switch Q3 and synchronous rectification switch pipe Q1 can not the while conductings.
Circuit of synchronous rectification 400 also comprises voltage clamping circuit Q2, and detection module 410 is connected to the drain electrode of synchronous rectification switch pipe Q1 through voltage clamping circuit Q2.The drain electrode of voltage clamping circuit Q2 is connected to the drain electrode of synchronous rectification switch pipe Q1; The source electrode of voltage clamping circuit Q2 is connected to detection module 410; The grid of voltage clamping circuit Q2 is through level threshold Vclamp ground connection; Be used for voltage Vds to be detected is suppressed at below the Vclamp, so that eliminate the burr in the Vds signal.Voltage clamping circuit Q2 is optional, and testing circuit 410 also can be directly connected to the drain electrode of synchronous rectification switch pipe Q1.
The in-phase input end ground connection of comparator C omp1, the inverting input of Comp1 is connected to the positive pole of level threshold VTH1, and the negative pole of level threshold VTH1 is connected to the source electrode of voltage clamping circuit Q2.The in-phase input end ground connection of comparator C omp2, the in-phase input end of Comp2 is connected to the positive pole of level threshold VTH2, and the negative pole of level threshold VTH2 is connected to the source electrode of voltage clamping circuit Q2.Voltage Vds and level threshold VTH1 that comparator C omp1 relatively receives from voltage clamping circuit Q2, and the output afterflow is crossed nought state (comparative result), comparator C omp2 comparative voltage Vds and level threshold VTH2, and output afterflow state.In other words, as Vds>during VTH1, nought state is crossed in Comp1 output afterflow, when Vds during VTH2, Comp2 output afterflow state.
The output of comparator C omp1 is connected to an input with door U3, and the output of comparator C omp2 is connected to an input with door U4.High frequency clock is connected to another input with door U3, and is connected to another input with U4.The high-frequency impulse that high frequency clock produces through with comparative result (or afterflow cross nought state) discretization of door U3 with comparator C omp1 output; Thereby export a series of sequence of high frequency pulses; Equally; The high-frequency impulse that high frequency clock produces through with comparative result (or the afterflow state) discretization of door U4 with comparator C omp2 output, thereby export a series of sequence of high frequency pulses.That the frequency that high frequency clock needs needs is enough high (for example, 33MHz), the accuracy of detection that needs with acquisition.
Microprocessor unit MCU is provided with and provides the first lead-edge-blanking time threshold, the second lead-edge-blanking time threshold, minimum service time threshold value and minimum turn-off time threshold.
Control module 420 can be according to the discretization signal of detection module 410 output (for example; Sequence of high frequency pulses) and MCU provide the first lead-edge-blanking time threshold, the second lead-edge-blanking time threshold, minimum service time threshold value and minimum turn-off time threshold control DPWM synchronizing signal SYN output to driver U6, thereby control synchronous rectification switch pipe Q1 turns on and off.Particularly, the shutoff logic of turn-offing unit U1 is used for turn-offing and door U7 output DPWM synchronizing signal SYN, even can not export DPWM synchronizing signal SYN with door U7.The enabling logic of opening unit U2 is used to make and door U7 output DPWM synchronizing signal SYN.When DPWM synchronizing signal SYN is low level, with door U7 output low level.Be connected to the input of driver U6 with the output of door U7, during with door U7 output high level, the drive signal of synchronous rectification switch pipe is opened in driver U6 output.When with door U7 output low level, the drive signal that the synchronous rectification switch pipe is turn-offed in driver U6 output.In other words; Embodiments of the invention can be to the live signal gathered (for example; The drain electrode of synchronous rectification switch pipe Q1 and the voltage between the source electrode) carry out discretization and handle; So that control module can be carried out digital processing to the signal after the discretization, and control synchronous rectification switch pipe Q1 is operated in the synchronous rectification state.
The shutoff logic of turn-offing unit U1 can realize that with the enabling logic of opening unit U2 for example, (Field Programmable Gate Array, FPGA) form with programming realizes to adopt field programmable gate array through the form of programming.Be not limited to this according to embodiments of the invention, for example, (Complex Programmable Logic Device, CPLD) grade realizes with programmable form can also to adopt CPLD.
Alternatively, as another embodiment, can replace with not gate with door U3 or with door U4, the embodiment that uses not gate equally can be with the output of Comp1 or Comp2 discretization as a result.
Should be understood that according to embodiments of the invention and also can adopt isolated BUCK circuit (transformer that for example, comprises former limit winding and secondary winding).Comprise that at the BUCK circuit under the situation of former limit winding and secondary winding, the drain electrode of synchronous rectification switch pipe Q1 can connect the secondary winding, the source electrode of main switch Q3 can be connected to former limit winding.
Sequential chart below in conjunction with the synchronous rectification of Fig. 5, Fig. 6 and Fig. 7 is controlled is described the shutoff logic of U1 and the enabling logic of U2.Synchronous rectification switch pipe opening process under CCM pattern and DCM/CrCM pattern is identical, but the synchronous rectification switch pipe is different from the turn off process under the DCM/CrCM pattern at the turn off process under the CCM pattern.
Fig. 5 is the sequential chart of synchronous rectification control under the CCM pattern according to another embodiment of the present invention.
Shutoff logic of turn-offing unit U1 and the enabling logic of opening unit U2 are described referring to Fig. 5.
Under the CCM pattern, following by the shutoff logic of turn-offing unit U1 realization:
Turn-offing unit U1 can be to be used to make the logic processor that DPWM synchronizing signal SYN is turn-offed with door U7, in other words, when turn-offing unit U1 output low level, with door U7 be low level, no longer export DPWM synchronizing signal SYN.Turn-off the DPWM synchronizing signal SYN that unit U2 can receive the output of DPWM engine at its input X1.Turn-off unit U1 and can receive first sequence of high frequency pulses with door U3 output, and can utilize the zero passage state counter that the pulse number of first sequence of high frequency pulses is counted (promptly nought state being crossed in the afterflow of Q1 counts) to obtain first count value at its input X2.Turn-off unit U1 and can also receive the first lead-edge-blanking threshold value and the minimum turn-off time threshold that microprocessor MCU provides at its input X3.Turn-offing unit U1 can receive at its input X4 and open unit U2 the control signal of the output Y2 output of opening unit U2 (this control signal is minimum service time status signal that U2 sends).
Referring to Fig. 5, at t3 constantly, after synchronous rectification switch pipe Q1 opened, the freewheel current through synchronous rectification switch pipe Q1 reduced gradually.At t4 constantly, DPWM synchronizing signal SYN becomes low level (at this moment Vds is still less than VTH1), therefore, with door U7 output low level, makes driver U6 output low level, thereby synchronous rectification switch pipe Q1 is turn-offed.In this case, because DPWM synchronizing signal SYN is low level, therefore, regardless of output Y1 that turn-offs unit U1 and the output result who opens the output Y1 of unit U2, U6 is with output low level, thereby guarantees can not to occur opening by mistake logical.
Under the CCM pattern, following by the enabling logic of opening unit U2 realization:
Opening unit U2 can be to be used to make the logic processor of exporting DPWM synchronizing signal SYN with door U7.Open unit U2 can receive the output of DPWM engine on its output X1 DPWM synchronizing signal SYN.Open unit U2 and can receive second sequence of high frequency pulses with door U4 output, and can utilize the afterflow state counter that the pulse number of second sequence of high frequency pulses is counted (promptly the afterflow state of synchronous rectification switch pipe Q1 being counted) to obtain second count value at its input X2.Open unit U2 and can receive the second lead-edge-blanking threshold value and minimum service time threshold value that microprocessor MCU provides at its input X3.Open unit U2 and can also insert the control signal that shutoff unit U1 exports on the output Y2 of shutoff unit U1 at its input X4.
At t1 constantly, the control signal that the DPWM engine is exported to driver U8 is a low level, makes U8 export the drive signal of turn-offing main switch Q1, and main switch Q1 is turned off.(DeadTime, DT) afterwards, at t2 constantly, the DPWM synchronizing signal SYN of DPWM engine output becomes high level at the process Dead Time.Simultaneously, DPWM synchronizing signal SYN will turn-off unit U1 and reset, and for example, the individual count device that turn-offs unit U1 resetted, and will make that turn-offing unit U1 exports high level at its output Y1, in its output Y2 output low level.
Have no progeny in the main pipe Q3 pass of closing referring to Fig. 5, the freewheel current that flows through synchronous rectification switch pipe Q1 increases, and Vds reduces.When Vds voltage < during VTH2 (constantly) at t3; The afterflow state counter of opening among the unit U1 begins second sequence of high frequency pulses is counted to get second count value; Opening unit U2 can compare second count value and the second lead-edge-blanking threshold value (having ignored the lead-edge-blanking time among the figure); And when second count value reaches the second lead-edge-blanking threshold value; Output is used to make the control signal with the high level of door U7 output DPWM synchronizing signal SYN on its output Y1, make driver U6 and with the drive signal of door U7 output high level, thereby control synchronous rectification switch pipe Q1 is open-minded.Simultaneously; When second count value reaches the second lead-edge-blanking threshold value; Open unit U2 and also give the input X4 that turn-offs unit U1, make that turn-offing unit U1 can output low level not give U7 in this minimum in service time in its output Y2 output low level (being minimum service time during this period of time) control signal.When finishing, counting reverts to high level automatically in the minimum service time that U2 sets opening the control signal exported on the output Y1 of unit U2.
In other words;, opened unit U2 with afterflow state (the i.e. second pulse train) quilt of door U4 output and counted to get second count value during at the voltage of Vds less than VTH2, and in second count value during greater than the second lead-edge-blanking threshold value; Make the drive signal of U6 output high level; Promptly control the open-minded of Q1, open unit U2 simultaneously and transmit control signal, make that turn-offing unit U1 opens in the gate time in the minimum of opening unit U2 setting to turn-offing unit U1 by the DPWM engine; Shielding U1 produces vibration to the shutoff control of DPWM synchronizing signal SYN to prevent drive signal.
Fig. 6 is the sequential chart of synchronous rectification control under the DCM/CrCM pattern according to another embodiment of the present invention.Under the DCM/CrCM pattern, identical under the opening process of synchronous rectification switch pipe Q1 and the CCM pattern, repeat no more at this.Different with the CCM pattern is, under the DCM/CrCM pattern, when Vds voltage>during VTH1, DPWM synchronizing signal SYN does not also become low level, at this moment, turn-offing unit U2 can be according to detected Vds voltage>result of VTH1 turn-offs synchronous rectification switch pipe Q1.
Below the main turn off process of describing synchronous rectification switch pipe Q1 under the DCM/CrCM pattern.
Referring to Fig. 6; At t3 constantly; Vds>VTH1, the zero passage state counter that turn-offs among the unit U1 begins first sequence of high frequency pulses is counted to get first count value, and turn-offing unit U1 can compare first count value and the first lead-edge-blanking threshold value; And reach the first lead-edge-blanking threshold value when (having ignored the lead-edge-blanking time among the figure) in first count value; Turn-off the low level control signal that output is used to turn-off DPWM synchronizing signal SYN on the output Y1 of unit U1, making the drive signal of U6 and U7 output low level, thus control synchronous rectification switch pipe Q1 shutoff.Simultaneously; When first count value reaches the first lead-edge-blanking threshold value; Turn-off unit U1 and also give the input X4 that opens unit U2 at the afterflow zero passage status signal of output Y2 high level; Make that open unit U2 locking U6 is low level with the control signal that U7 exports, up to the next synchronous rectification switch cycle, when DPWM synchronizing signal SYN resets when being high.When opening of turn-offing that unit U1 receiving on the input X4 control signal that unit U2 exports on its output Y2 is low level (minimum service time threshold value that U2 is preset); When shutoff unit U1 receives low level control signal on output X4; On output Y1, keep high level, promptly avoid synchronous rectification switch pipe Q1 because the vibration of Vds causes Vds voltage VTH1 and produce mistake and turn-off.
Fig. 7 is the sequential chart of synchronous rectification control under the DCM/CrCM pattern according to another embodiment of the present invention.
The process of judging the underloading pattern is described referring to Fig. 7.
Open unit U2 and can also carry out the judgement of underloading pattern according to crossing nought state from the afterflow of the output Y2 reception of shutoff unit U1 at its input X4.Under the underloading pattern, open unit U2 and can control with a door U7 and do not export DPWM synchronizing signal SYN, in this case, synchronous rectification switch pipe Q1 does not have driving, but the only body diode afterflow through synchronous rectification switch pipe Q1.
Referring to Fig. 7, < during VTH2, the afterflow state counter of opening among the unit U1 begins second sequence of high frequency pulses is counted to get second count value when Vds voltage; And when second count value reaches the second lead-edge-blanking threshold value; Open unit U2 output high level, at this moment DPWM synchronizing signal SYN is a high level, turn-offs unit U1 output high level; Therefore, U7 and U6 are output as high level.Simultaneously; When second count value reaches the second lead-edge-blanking threshold value; Open unit U2 and begin minimum service time counting; And when minimum service time, count value reached minimum service time threshold value, open unit U2 and can send minimum service time control signal, receive and detect the zero passage status signal that turn-offs unit U1 transmission simultaneously to turn-offing unit U1.To detect this zero passage status signal at the rising edge of minimum service time control signal (i.e. minimum service time count value reaches minimum service time during threshold value) be high level if open unit U2, then confirms entering underloading pattern.Under the underloading pattern, open unit U2 in Y1 output output low level all the time, make and a door U7 output low level; Make the driver U6 drive signal of output low level all the time; Thereby turn-off synchronous rectification switch pipe Q1, at this moment, the synchronous rectification switch pipe is only through the body diode afterflow.Alternatively, also can be to the input X4 output high level that turn-offs unit U1, promptly latch Vds>state of VTH1, make and a door U7 output low level, make the driver U6 drive signal of output low level all the time.If minimum service time signal rising edge to detect this zero passage status signal be low level, then open unit U2 and get into heavily loaded pattern.Under heavily loaded pattern, U2 is according to the sequential chart work of the embodiment of Fig. 5 or Fig. 6.
In other words, open unit U2 and can also judge the underloading pattern according to the output Y2 output state that turn-offs unit U1.Specifically; As Vds < during VTH2; Open the control signal that unit U2 can trigger its output Y1 output high level; And, open the control that unit U2 is opened unit U2 counter of inner minimum service time in the low level control signal of output Y2 output, when gate time finishes at the control signal of its output Y2 output low level (i.e. minimum service time status signal); Can make the control signal of its output Y2 output high level; This open constantly unit U2 can detect from turn-off unit U1 the control signal of output Y2 output (as Vds>during VTH1, in the control signal of the output Y2 output high level that turn-offs unit U1, the electric current that synchronous rectification switch pipe Q1 is flow through in expression is zero passage oppositely; When the control signal of the output Y2 of U1 output low level, the electric current that synchronous rectification switch pipe Q1 is flow through in expression does not have zero passage), this control signal outputs to the input X4 that opens unit U2, when the input signal of X4 is high level, is judged as the underloading pattern.Under the underloading pattern, open unit U2 and can control with U7 and do not export DPWM synchronizing signal SYN, then synchronous rectification switch pipe Q1 does not have driving, but the only body diode afterflow through synchronous rectification switch pipe Q1.If open unit U2 minimum service time in next synchronous rectification cycle status signal rising edge to detect the afterflow status signal that its input X4 receives be low level; Then opening unit U2 recovers from the underloading pattern; Next synchronizing cycle, U2 recovers the control signal output to DPWM.
Fig. 8 is the indicative flowchart of synchronous rectification control method according to another embodiment of the present invention.
810, the drain electrode of synchronous rectification switch pipe and the voltage between the source electrode and at least one level threshold compared obtain at least one comparative result.
820, generate and corresponding at least one pulse train of above-mentioned at least one level threshold according to above-mentioned at least one comparative result respectively.
830, the pulse number to above-mentioned at least one pulse train counts to get at least one count value respectively, and when above-mentioned at least one count value reaches at least one lead-edge-blanking threshold value, generates drive control signal.
840, drive this synchronous rectification switch pipe according to this drive control signal.
In 810, relatively this voltage with turn-off level threshold, and export first comparative result when turn-offing level threshold at this voltage; Relatively this voltage with open level threshold, and export second comparative result when opening level threshold at this voltage.In 820, utilize first to receive the clock sequence that the clock of first comparative result and predeterminated frequency is exported, and export first pulse train with door, the shutoff level threshold is a negative value; Utilize second to receive the clock sequence of the clock output of second comparative result and this predeterminated frequency with door; And export second pulse train; Wherein opening level threshold is negative value; Open level threshold less than turn-offing level threshold, turn-offing level threshold is the level threshold that is used to turn-off the synchronous rectification switch pipe, and to open level threshold be the level threshold that is used to open the synchronous rectification switch pipe.
830, can count to get first count value to the pulse number of first pulse train, and under the situation of first count value greater than the first lead-edge-blanking threshold value, first control signal of output low level; Can count to get second count value to the pulse number of second pulse train, and under the situation of second count value greater than the second lead-edge-blanking threshold value, second control signal of output high level; And utilize the 4th to receive first control signal and second control signal with door; And open or turn-off the synchronous rectification switch pipe according to first control signal and this drive control signal Control Driver of second control signal output; Wherein, Control Driver was opened the synchronous rectification switch pipe when drive control signal was high level, and Control Driver was turn-offed the synchronous rectification switch pipe when drive control signal was low level.
Alternatively; As another embodiment, the method for Fig. 8 also comprises: produce the DPWM synchronizing signal, wherein in 830; Can utilize the 4th to receive first control signal, second control signal and this DPWM synchronizing signal with door; Turn-off this DPWM synchronizing signal during for low level in first control signal, when second control signal and second control signal are high level, export this DPWM synchronizing signal as drive control signal.In 840, when this DPWM synchronizing signal is low level, controls this driver and turn-off this synchronous rectification switch pipe, and when this DPWM synchronizing signal is high level, controls this driver and open this synchronous rectification switch pipe.
Alternatively, as another embodiment, the method for Fig. 8 also comprises: utilize this DPWM synchronizing signal that the circuit of carrying out above-mentioned synchronous rectification control method is resetted in each synchronous rectification cycle.
Alternatively, as another embodiment, the method for Fig. 8 also comprises: relatively this voltage and reset level threshold value are exported the 3rd comparative result; Utilize the 3rd to receive the clock sequence of the clock output of the 3rd comparative result and this predeterminated frequency, and export three-pulse sequence with door; To the pulse number of three-pulse sequence count the 3rd count value, and reach in the 3rd count value in each synchronous rectification cycle under the situation of the 3rd lead-edge-blanking threshold value and reset.
Alternatively, as another embodiment, the method for Fig. 8 also comprises: under the situation of first count value greater than the first lead-edge-blanking threshold value, flip-flop number obtains minimum turn-off time counting value; Minimum service time count value less than minimum service time during threshold value to the 4th with first control signal of door output low level so that the 4th turn-off this synchronous rectification switch pipe with this driver of gate control.
Alternatively, as another embodiment, the method for Fig. 8 also comprises: under the situation of second count value greater than the second lead-edge-blanking threshold value, flip-flop number obtains minimum service time count value; Minimum service time count value less than minimum service time during threshold value to the 4th with first control signal of door output high level.
Alternatively, as another embodiment, the method for Fig. 8 also comprises: under the situation of first count value greater than the first lead-edge-blanking threshold value, generate the zero passage status signal; When minimum service time, counting reached this minimum service time threshold value, detect this zero passage status signal; If this zero passage status signal is a high level, confirm that then load is a underloading, and to the 4th with second control signal of door output low level.
Provide the digital parameters that can be provided with or regulate to realize flexibly synchronous rectification control through microprocessor to control module according to embodiments of the invention.Can accomplish the adaptive dead zone compensation through logic control algorithm according to embodiments of the invention.In addition, because the synchronizing information of synchronous rectification switch is known, make the control of synchronous turn-off time more to optimize.
In other words; Can and cross nought state (Vds is greater than Vth1) according to afterflow and carry out the judgement of underloading pattern based on digital form flexible configuration bias voltage VTH1/VTH2, lead-edge-blanking time, minimum service time and minimum turn-off time according to embodiments of the invention, realize the adaptive optimization in dead band.Because parameter can dispose according to an embodiment of the invention, it is more flexible to make the dead band regulate.In addition, the conducting resistance of different synchronization switching tube there are differences, and therefore, the size of detection signal is just variant, and through regulating the detection that these parameters can obtain best afterflow zero crossing.
Those of ordinary skills can recognize, the unit and the algorithm steps of each example of describing in conjunction with embodiment disclosed herein can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions still are that software mode is carried out with hardware actually, depend on the application-specific and the design constraint of technical scheme.The professional and technical personnel can use distinct methods to realize described function to each certain applications, but this realization should not thought and exceeds scope of the present invention.
The those skilled in the art can be well understood to, for the convenience described with succinct, the concrete course of work of the system of foregoing description, device and unit can repeat no more at this with reference to the corresponding process among the preceding method embodiment.
In several embodiment that the application provided, should be understood that the system that is disclosed, apparatus and method can realize through other mode.For example, device embodiment described above only is schematically, for example; The division of said unit; Only be that a kind of logic function is divided, during actual the realization other dividing mode can be arranged, for example a plurality of unit or assembly can combine or can be integrated into another system; Or some characteristics can ignore, or do not carry out.Another point, the coupling each other that shows or discuss or directly coupling or communication to connect can be through some interfaces, the INDIRECT COUPLING of device or unit or communication connect, and can be electrically, machinery or other form.
Said unit as separating component explanation can or can not be physically to separate also, and the parts that show as the unit can be or can not be physical locations also, promptly can be positioned at a place, perhaps also can be distributed on a plurality of NEs.Can realize the purpose of present embodiment scheme according to the needs selection some or all of unit wherein of reality.
In addition, each functional unit in each embodiment of the present invention can be integrated in the processing unit, also can be that the independent physics in each unit exists, and also can be integrated in the unit two or more unit.
If said function realizes with the form of SFU software functional unit and during as independently production marketing or use, can be stored in the computer read/write memory medium.Based on such understanding; The part that technical scheme of the present invention contributes to prior art in essence in other words or the part of this technical scheme can be come out with the embodied of software product; This computer software product is stored in the storage medium; Comprise some instructions with so that computer equipment (can be personal computer, server, the perhaps network equipment etc.) carry out all or part of step of the said method of each embodiment of the present invention.And aforesaid storage medium comprises: various media that can be program code stored such as USB flash disk, portable hard drive, read-only memory (ROM, Read-Only Memory), random access memory (RAM, RandomAccess Memory), magnetic disc or CD.
The above; Be merely embodiment of the present invention, but protection scope of the present invention is not limited thereto, any technical staff who is familiar with the present technique field is in the technical scope that the present invention discloses; Can expect easily changing or replacement, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.
Claims (20)
1. a synchronous commutating control circuit is characterized in that, comprising:
Detection module; Be used to detect the drain electrode of synchronous rectification switch pipe and the voltage between the source electrode; And said voltage and at least one level threshold compared obtain at least one comparative result, and generate and corresponding at least one pulse train of said at least one level threshold according to said at least one comparative result respectively;
Microprocessor is used for being provided with and providing and corresponding at least one the lead-edge-blanking threshold value of said at least one pulse train;
Control module; Be used to receive said at least one pulse train of said detection module generation and said at least one lead-edge-blanking threshold value that said microprocessor provides; Pulse number to said at least one pulse train counts to get at least one count value respectively; And when said at least one count value reaches said at least one lead-edge-blanking threshold value, generate drive control signal;
Driver is used to receive the said drive control signal that said control module is exported, and drives said synchronous rectification switch pipe according to said drive control signal.
2. synchronous commutating control circuit according to claim 1 is characterized in that,
Said detection module comprises: first comparator, second comparator, first and door, second with the clock of door and predeterminated frequency, said at least one level threshold comprises and turn-offs level threshold and open level threshold,
More said voltage of wherein said first comparator and said shutoff level threshold; And export first comparative result during greater than said shutoff level threshold at said voltage; Said first receives the clock sequence of clock output of said first comparative result and the said predeterminated frequency of said first comparator output with door, and exports first pulse train;
More said voltage of said second comparator and the said level threshold of opening; And at said voltage less than said second comparative result of exporting when opening level threshold; Said second receives the clock sequence of clock output of said second comparative result and the said predeterminated frequency of said second comparator output with door; And export second pulse train; Wherein saidly open level threshold and said shutoff level threshold is a negative value; The said level threshold of opening is less than said shutoff level threshold, and said shutoff level threshold is the level threshold that is used to turn-off said synchronous rectification switch pipe, and the said level threshold of opening is the level threshold that is used to open said synchronous rectification switch pipe.
3. synchronous commutating control circuit according to claim 2 is characterized in that, said microprocessor setting also provides and said first pulse train and the corresponding first lead-edge-blanking threshold value of said second pulse train and the second lead-edge-blanking threshold value,
Wherein said control module comprises:
Turn-off the unit; Be used to receive first pulse train that said first lead-edge-blanking threshold value that said microprocessor provides and said detection module provide; Pulse number to said first pulse train counts to get first count value; And under the situation of said first count value greater than the said first lead-edge-blanking threshold value, first control signal of output low level;
Open the unit; Be used to receive second pulse train that said second lead-edge-blanking threshold value that said microprocessor provides and said detection module provide; Pulse number to said second pulse train counts to get second count value; And under the situation of said second count value greater than the said second lead-edge-blanking threshold value, second control signal of output high level;
The 4th with the door; Be used to receive said first control signal and said said second control signal of opening the output of unit of the output of said shutoff unit; And exporting said drive control signal according to said first control signal and said second control signal controls said driver and opens or turn-off said synchronous rectification switch pipe; Wherein, Said drive control signal is controlled said driver during for high level and is opened said synchronous rectification switch pipe, and said drive control signal is controlled said driver during for low level and turn-offed said synchronous rectification switch pipe.
4. synchronous commutating control circuit according to claim 3 is characterized in that, also comprises:
Digital pulse width modulation engine is used to produce the digital pulse width modulated synchronization signal,
The wherein said the 4th also receives said digital pulse width with door modulates the said digital pulse width modulated synchronization signal that engine is exported; The wherein said the 4th turn-offs said digital pulse width modulated synchronization signal with door during for low level in said first control signal; When said second control signal and said second control signal are high level; Export said digital pulse width modulated synchronization signal, and when said digital pulse width modulated synchronization signal is low level, controls said driver and turn-off said synchronous rectification switch pipe; When said digital pulse width modulated synchronization signal is high level, controls said driver and open said synchronous rectification switch pipe.
5. synchronous commutating control circuit according to claim 4; It is characterized in that; Said unit and the said shutoff unit opened also receives said digital pulse width modulated synchronization signal from said digital pulse width modulation engine, and utilizes said digital pulse width modulated synchronization signal to reset separately in each synchronous rectification cycle.
6. synchronous commutating control circuit according to claim 3 is characterized in that, said microprocessor also provides and is provided with and the 3rd lead-edge-blanking threshold value, and said at least one level threshold also comprises the reset level threshold value,
Said detection module also comprises:
The 3rd comparator and the 3rd with the door; More said voltage of wherein said the 3rd comparator and said reset level threshold value are exported the 3rd comparative result; The said the 3rd receives the clock sequence of clock output of said the 3rd comparative result and the said predeterminated frequency of said the 3rd comparator output with door; And export three-pulse sequence
Wherein said shutoff unit and the said unit of opening also receive said three-pulse sequence from the said the 3rd with door; To the pulse number of said three-pulse sequence count the 3rd count value, and reach in said the 3rd count value in each synchronous rectification cycle under the situation of said the 3rd lead-edge-blanking threshold value and reset separately.
7. according to the described synchronous commutating control circuit of claim 3 to 6; It is characterized in that; Said microprocessor also is said shutoff unit setting and the minimum turn-off time threshold is provided; Said shutoff unit is also under the situation of said first count value greater than the said first lead-edge-blanking threshold value; Flip-flop number obtains minimum turn-off time counting value, and said minimum turn-off time counting value during less than said minimum turn-off time threshold to the said the 4th with said first control signal of door output low level so that the said the 4th turn-off said synchronous rectification switch pipe with the said driver of gate control.
8. according to the described synchronous commutating control circuit of claim 3 to 6; It is characterized in that; Said microprocessor is also opened the unit setting and minimum service time threshold value is provided for said; The said unit of opening is also under the situation of said second count value greater than the said second lead-edge-blanking threshold value; Flip-flop number obtains minimum service time count value, and said minimum service time count value send three control signal to said shutoff unit less than said minimum service time during threshold value, with so that said shutoff unit to the said the 4th with first control signal of door output high level.
9. synchronous commutating control circuit according to claim 8 is characterized in that, said shutoff unit is in said first count value during greater than the said first lead-edge-blanking threshold value, to the said unit output zero passage status signal of opening; The said unit of opening is when minimum service time, counting reached said minimum service time threshold value; Detect said zero passage status signal; If said zero passage status signal is a high level; The load of then confirming the circuit of synchronous rectification at said synchronous rectification switch pipe place is a underloading, and to the said the 4th with said second control signal of door output low level.
10. according to each the described synchronous commutating control circuit in the claim 1 to 6; It is characterized in that; Also comprise: voltage clamping circuit, be connected between the drain electrode or source electrode of said detection module and said synchronous rectification switch pipe, be used for said voltage is carried out clamp control.
11. a converter is characterized in that, comprising:
Transformer;
Resonant circuit;
Circuit of synchronous rectification comprises: the synchronous rectification switch pipe; And
Synchronous commutating control circuit; Comprise: be used to detect the drain electrode of said synchronous rectification switch pipe and the voltage between the source electrode; Said voltage and at least one level threshold compared obtain at least one comparative result, and generate and corresponding at least one pulse train of said at least one level threshold according to said at least one comparative result respectively; Setting also provides and corresponding at least one the lead-edge-blanking threshold value of said at least one pulse train; Pulse number to said at least one pulse train counts to get at least one count value respectively, and when said at least one count value reaches said at least one lead-edge-blanking threshold value, generates drive control signal; Drive said synchronous rectification switch pipe according to said drive control signal.
12. a synchronous rectification control method is characterized in that, comprising:
The drain electrode of synchronous rectification switch pipe and the voltage between the source electrode and at least one level threshold compared obtain at least one comparative result;
Generate and corresponding at least one pulse train of said at least one level threshold according to said at least one comparative result respectively;
Pulse number to said at least one pulse train counts to get at least one count value respectively, and when said at least one count value reaches at least one lead-edge-blanking threshold value, generates drive control signal;
Drive said synchronous rectification switch pipe according to said drive control signal.
13. synchronous rectification control method according to claim 12 is characterized in that, said said voltage and at least one level threshold are compared obtains at least one comparative result, comprising:
More said voltage with turn-off level threshold, and export first comparative result during greater than said shutoff level threshold at said voltage; More said voltage with open level threshold, and at said voltage less than said second comparative result of exporting when opening level threshold;
The wherein said generation with corresponding at least one pulse train of said at least one level threshold according to said at least one comparative result respectively comprises:
Utilize first to receive the clock sequence that the clock of said first comparative result and predeterminated frequency is exported with door; And export first pulse train; And utilize second to receive the clock sequence of the clock output of said second comparative result and said predeterminated frequency, and export second pulse train with door;
Wherein saidly open level threshold and said shutoff level threshold is a negative value; The said level threshold of opening is less than said shutoff level threshold; Said shutoff level threshold is the level threshold that is used to turn-off said synchronous rectification switch pipe, and the said level threshold of opening is the level threshold that is used to open said synchronous rectification switch pipe.
14. synchronous rectification control method according to claim 13; It is characterized in that; Saidly respectively the pulse number of said at least one pulse train is counted to get at least one count value; And when said at least one count value reaches at least one lead-edge-blanking threshold value, generate drive control signal, comprising:
Pulse number to said first pulse train counts to get first count value, and under the situation of said first count value greater than the said first lead-edge-blanking threshold value, first control signal of output low level;
Pulse number to said second pulse train counts to get second count value, and under the situation of said second count value greater than the said second lead-edge-blanking threshold value, second control signal of output high level;
Utilize the 4th to receive said first control signal and said second control signal with door; And export said drive control signal Control Driver according to said first control signal and said second control signal and open or turn-off said synchronous rectification switch pipe; Wherein, Said drive control signal is controlled said driver during for high level and is opened said synchronous rectification switch pipe, and said drive control signal is controlled said driver during for low level and turn-offed said synchronous rectification switch pipe.
15. synchronous rectification control method according to claim 14 is characterized in that, also comprises:
Produce the digital pulse width modulated synchronization signal;
Wherein saidly utilize the 4th to receive said first control signal and said second control signal, and export said drive control signal, comprising according to said first control signal and said second control signal with door:
Utilize the said the 4th to receive said first control signal, said second control signal and a said digital pulse width modulated synchronization signal with door;
Turn-off said digital pulse width modulated synchronization signal during for low level in said first control signal;
When said second control signal and said second control signal are high level, export said digital pulse width modulated synchronization signal as said drive control signal;
Wherein saidly drive said synchronous rectification switch pipe, comprising according to said drive control signal:
When said digital pulse width modulated synchronization signal is low level, controls said driver and turn-off said synchronous rectification switch pipe;
When said digital pulse width modulated synchronization signal is high level, controls said driver and open said synchronous rectification switch pipe.
16. synchronous rectification control method according to claim 15 is characterized in that, also comprises:
Utilize said digital pulse width modulated synchronization signal that the circuit of carrying out said synchronous rectification control method is resetted in each synchronous rectification cycle.
17. synchronous rectification control method according to claim 14 is characterized in that, also comprises:
More said voltage and reset level threshold value are exported the 3rd comparative result;
Utilize the said the 3rd to receive the clock sequence of the clock output of said the 3rd comparative result and said predeterminated frequency, and export three-pulse sequence with door,
To the pulse number of said three-pulse sequence count the 3rd count value, and reach in said the 3rd count value in each synchronous rectification cycle under the situation of said the 3rd lead-edge-blanking threshold value and reset.
18. according to the described synchronous rectification control method of claim 14 to 17, it is characterized in that, also comprise:
Under the situation of said first count value greater than the said first lead-edge-blanking threshold value, flip-flop number obtains minimum turn-off time counting value;
Said minimum service time count value less than said minimum service time during threshold value to the said the 4th with said first control signal of door output low level so that the said the 4th turn-off said synchronous rectification switch pipe with the said driver of gate control.
19. according to the described synchronous rectification control method of claim 14 to 18, it is characterized in that, also comprise:
Under the situation of said second count value greater than the said second lead-edge-blanking threshold value, flip-flop number obtains minimum service time count value;
Said minimum service time count value less than said minimum service time during threshold value to the said the 4th with first control signal of door output high level.
20. synchronous rectification control method according to claim 19 is characterized in that, also comprises:
Under the situation of said first count value, generate the zero passage status signal greater than the said first lead-edge-blanking threshold value;
When minimum service time, counting reached said minimum service time threshold value, detect said zero passage status signal;
If said zero passage status signal is a high level, confirm that then the load of the circuit of synchronous rectification at said synchronous rectification switch pipe place is a underloading, and to the said the 4th with said second control signal of door output low level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210265345.0A CN102790542B (en) | 2012-07-30 | 2012-07-30 | Synchronous rectification control circuit, converter and synchronous rectification control method |
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| CN104410300A (en) * | 2014-11-24 | 2015-03-11 | 深圳创维－Rgb电子有限公司 | Synchronous rectification drive circuit and television set |
| CN105471286A (en) * | 2015-12-10 | 2016-04-06 | 无锡华润矽科微电子有限公司 | Synchronous rectification circuit, wireless charging system and synchronous rectification method |
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| CN104410300B (en) * | 2014-11-24 | 2016-09-21 | 深圳创维－Rgb电子有限公司 | Synchronous rectification driving circuit and television set |
| CN104410300A (en) * | 2014-11-24 | 2015-03-11 | 深圳创维－Rgb电子有限公司 | Synchronous rectification drive circuit and television set |
| CN105634270A (en) * | 2014-11-26 | 2016-06-01 | 罗伯特·博世有限公司 | Device and method used for controlling electronic switch element of resonant direct current converter |
| CN105471286A (en) * | 2015-12-10 | 2016-04-06 | 无锡华润矽科微电子有限公司 | Synchronous rectification circuit, wireless charging system and synchronous rectification method |
| CN106130378A (en) * | 2016-08-31 | 2016-11-16 | 广州金升阳科技有限公司 | Synchronous commutating control circuit and method |
| CN106130378B (en) * | 2016-08-31 | 2019-05-21 | 广州金升阳科技有限公司 | Synchronous commutating control circuit and method |
| CN108347182A (en) * | 2017-01-23 | 2018-07-31 | 戴洛格半导体公司 | Synchronous rectifier control with the adaptive minimum turn-off time |
| CN108347182B (en) * | 2017-01-23 | 2020-04-17 | 戴洛格半导体公司 | Synchronous rectifier control with adaptive minimum off time |
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| TWI752216B (en) * | 2017-04-13 | 2022-01-11 | 美商半導體組件工業公司 | Controller circuits for controlling synchronous rectifier turn-off threshold |
| CN107342691A (en) * | 2017-07-11 | 2017-11-10 | 成都芯源***有限公司 | Control device and method for synchronous rectifier tube |
| CN107342691B (en) * | 2017-07-11 | 2019-07-19 | 成都芯源***有限公司 | Control device and method for synchronous rectifier tube |
| CN107592108A (en) * | 2017-09-29 | 2018-01-16 | 深圳南云微电子有限公司 | A kind of controller IC |
| CN107592108B (en) * | 2017-09-29 | 2024-05-14 | 深圳南云微电子有限公司 | Controller IC |
| CN108258923A (en) * | 2017-12-12 | 2018-07-06 | 深圳市芯茂微电子有限公司 | A kind of synchronous rectification driving circuit of voltage decrease speed judgement |
| CN110545044B (en) * | 2018-05-29 | 2021-11-23 | 达尔科技股份有限公司 | Two-terminal rectifier and power converter |
| CN110545044A (en) * | 2018-05-29 | 2019-12-06 | 达尔科技股份有限公司 | two-terminal rectifier and power converter |
| CN110581692A (en) * | 2018-06-07 | 2019-12-17 | 德州仪器公司 | Pulse blanking in amplifiers |
| CN112996706A (en) * | 2018-11-15 | 2021-06-18 | 西门子交通奥地利有限责任公司 | Method for preventing the deactivation of an unallowable number of homogeneous components of a rail vehicle |
| CN111953211B (en) * | 2019-05-16 | 2022-03-11 | 东南大学 | Synchronous rectification control system and method of quasi-resonant flyback converter |
| CN111953211A (en) * | 2019-05-16 | 2020-11-17 | 东南大学 | Synchronous rectification control system and method of quasi-resonant flyback converter |
| CN111181406B (en) * | 2020-01-16 | 2021-06-08 | 矽力杰半导体技术(杭州)有限公司 | Synchronous rectification circuit and control method thereof |
| CN111181406A (en) * | 2020-01-16 | 2020-05-19 | 矽力杰半导体技术(杭州)有限公司 | Synchronous rectification circuit and control method thereof |
| CN113098286A (en) * | 2021-04-23 | 2021-07-09 | 北京机械设备研究所 | Synchronous rectification method for LCLCLCL resonant converter |
| CN113098286B (en) * | 2021-04-23 | 2022-04-01 | 北京机械设备研究所 | Synchronous rectification method for LCLCLCL resonant converter |
| CN113193771A (en) * | 2021-06-30 | 2021-07-30 | 深圳英集芯科技股份有限公司 | Minimum opening time self-adaptive circuit and method of full-bridge synchronous rectification circuit |
| CN113193771B (en) * | 2021-06-30 | 2021-09-10 | 深圳英集芯科技股份有限公司 | Minimum opening time self-adaptive circuit and method of full-bridge synchronous rectification circuit |
| CN114710029A (en) * | 2022-04-12 | 2022-07-05 | 电子科技大学 | Minimum on-time generating circuit based on synchronous rectification for vehicle |
| CN114710029B (en) * | 2022-04-12 | 2023-05-05 | 电子科技大学 | Minimum on-time generating circuit based on synchronous rectification for vehicle |
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