CN102760686B - Semiconductor device and forming method of interconnection structure - Google Patents
Semiconductor device and forming method of interconnection structure Download PDFInfo
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Abstract
The invention provides a semiconductor device and a forming method of an interconnection structure. The forming method of the interconnection structure comprises the following steps: forming a sacrificial layer on a first substrate; rubbing the sacrificial layer by utilizing a stamping mould, forming a beam which is provided with a top surface and two lateral walls on the sacrificial layer; forming a carbon monoatomic layer among preset positions of the top surface and lateral walls of the bead and adjacent beads to serve as an interconnection structure; forming an adhesive layer to cover the carbon monoatomic layer; removing the sacrificial layer; transferring the adhesive layer and the carbon monoatomic layer to a second substrate which is a semiconductor substrate with a device structure, and electrically connecting the carbon monoatomic layer and the device structure. By utilizing the high conductivity of the carbon monoatomic layer, the interconnection structure consisting of the carbon monoatomic layer is formed, the RC (resistor-capacitor) delaye can be reduced, and the performance of the semiconductor device can be improved.
Description
Technical field
The present invention relates to technical field of semiconductors, relate in particular to the method for semiconductor device, formation interconnection structure.
Background technology
In semiconductor device, reduce RC (resistance capacitance delay) and postpone, can improve the performance of semiconductor device.Along with the development of semiconductor technology, semiconductor technology strides forward towards less process node constantly under the driving of Moore's Law, and process node enters into 65 nanometers, 45 nanometers, 32 even lower nanometers.Along with the continuous progress of semiconductor technology, the function of device is gradually become strong, and the integrated level of device is more and more higher, the characteristic size of device (critical dimension, CD) more and more less, need to further reduce accordingly RC and postpone, so just can improve the performance of semiconductor device.
In prior art, the material of the middle use of the interconnection structure of semiconductor device is generally aluminium, copper, tungsten.Interconnection structure comprises interconnection line and embolism, and the material of embolism is used copper or tungsten conventionally, and the material of interconnection line is used copper or aluminium conventionally.At first, use tungsten as the material of embolism, use aluminium as the material of interconnection line, yet along with the development of semiconductor technology, in order to reduce RC, postpone, adopt copper to replace gradually tungsten plug, aluminum interconnecting as embolism, the interconnection line of material.
Yet, development along with semiconductor technology, the RC of copper embolism, copper interconnecting line postpones to become a large obstacle that improves performance of semiconductor device, expectation can find a kind of alternative material as the material of interconnection structure, with this material, form interconnection structure, reduce RC and postpone, improve the performance of semiconductor device.
In prior art, have many patents about semiconductor device interconnected structure, for example, application number is the Chinese patent application of " 200910052969.2 ", yet, all do not solve above-described technical problem.
Summary of the invention
The problem that the present invention solves is to provide a kind of method of new formation interconnection structure, reduces RC and postpones.
For addressing the above problem, the invention provides a kind of method that forms interconnection structure, comprising:
The first substrate is provided, on described the first substrate, forms sacrifice layer;
Utilize sacrifice layer described in impressing mould inscription rubbing, on described sacrifice layer, form fin, described fin has end face and two side;
Between the precalculated position of described fin end face, sidewall and adjacent fin, form carbon monoatomic layer, as interconnection structure;
Form adhesion layer, cover described carbon monoatomic layer;
Remove described sacrifice layer;
Described adhesion layer, carbon monoatomic layer are transferred on the second substrate, and described the second substrate is Semiconductor substrate, is wherein formed with device architecture, and described carbon monoatomic layer is electrically connected to described device architecture.
Optionally, utilize sacrifice layer described in impressing mould inscription rubbing, on described sacrifice layer, form fin and comprise: described sacrifice layer is softened; Sacrifice layer after using described impressing mould to described softening carries out punching press; Sacrifice layer after described punching press is freezed, form fin; Remove described impressing mould.
Optionally, the material of described sacrifice layer is nickel.
Optionally, between the end face of described fin, the precalculated position of sidewall and adjacent lugs, forming carbon monoatomic layer comprises:
In formation intermediate layer, the two side of described fin;
Remove the intermediate layer in sidewall precalculated position;
Methane decomposition forms carbon monoatomic layer between the end face of described fin, the precalculated position of sidewall and adjacent lugs.
Optionally, in formation intermediate layer, the two side of described fin, comprise:
Form intermediate layer, cover end face and the two side of described fin;
The intermediate layer that photoetching, etching are removed end face.
Optionally, the material in described intermediate layer is silicon nitride, and its formation method is chemical vapour deposition (CVD).
Optionally, when removing sacrifice layer, also comprise and remove remaining intermediate layer.
Optionally, utilize hydrochloric acid or phosphoric acid wet etching to remove described sacrifice layer, remove remaining intermediate layer.
Optionally, after being transferred on the second substrate, described adhesion layer, carbon monoatomic layer also comprise: remove adhesion layer.
Optionally, the material of described adhesion layer is polymethyl methacrylate.
Optionally, the method for described formation adhesion layer is spin-coating method.
Optionally, utilize acetone wet etching to remove adhesion layer.
Optionally, the step that also comprises annealing after removal adhesion layer.
Optionally, after removing adhesion layer, also comprise and form ultralow k dielectric layer, cover described the second substrate and carbon monoatomic layer.
Optionally, ultralow k dielectric layer is gluey, and its material is SiLK, polyimides, norbornene polymer, benzocyclobutene or polytetrafluoroethylene.
Optionally, the material of described the first substrate is silicon or silicon dioxide.
The present invention also provides a kind of semiconductor device, comprising:
Substrate, is formed with device architecture in described substrate;
Be formed on the interconnection structure on described substrate, be electrically connected to described device architecture;
Described interconnection structure is formed by carbon monoatomic layer.
Compared with prior art, the present invention has the following advantages:
Utilize the high conductivity of carbon monoatomic layer, the present invention has formed the interconnection structure being comprised of carbon monoatomic layer, can reduce RC and postpone, and improves the performance of semiconductor device.
Accompanying drawing explanation
Fig. 1 is the flow chart of method of the formation interconnection structure of the specific embodiment of the invention;
Fig. 2～Figure 15 is cross-section structure and the schematic top plan view of method of the formation interconnection structure of the specific embodiment of the invention.
Embodiment
In prior art, development along with semiconductor technology, the RC of copper interconnection structure postpones to become a large obstacle that improves performance of semiconductor device, expectation can find a kind of alternative material as the material of interconnection structure, with this material, form interconnection structure, reduce RC and postpone, improve the performance of semiconductor device.
The present inventor is in order to solve above problem, consulted a large amount of data, carried out long-term studying intensively, find that carbon monoatomic layer has high conductivity, can be used as electrode uses, therefore inventor utilizes carbon monoatomic layer to have the characteristic of high conductivity, has proposed to form the method for interconnection structure.The characteristic about carbon monoatomic layer with high conductivity can refer to " July 2009 for Graphene-on-insulator transistors made using C on Ni chemical-vapor Deposition; IEEE electron device letters; Vol.30, No.7 ".
Utilize the high conductivity of carbon monoatomic layer, the present invention has formed the interconnection structure being comprised of carbon monoatomic layer, can reduce RC and postpone, and improves the performance of semiconductor device.
For those skilled in the art be can better understand the present invention, below in conjunction with accompanying drawing, describe the specific embodiment of the present invention in detail.
Fig. 1 is the flow chart of method of the formation interconnection structure of the specific embodiment of the present invention, ginseng Fig. 1, and the method for the formation interconnection structure of the specific embodiment of the invention comprises:
Step S11, provides the first substrate, on described the first substrate, forms sacrifice layer;
Step S12, utilizes sacrifice layer described in impressing mould inscription rubbing, on described sacrifice layer, forms fin, and described fin has end face and two side;
Step S13 forms carbon monoatomic layer, as interconnection structure between the precalculated position of described fin end face, sidewall and adjacent fin;
Step S14, forms adhesion layer, covers described carbon monoatomic layer;
Step S15, removes described sacrifice layer;
Step S16, is transferred to described adhesion layer, carbon monoatomic layer on the second substrate, and described the second substrate is Semiconductor substrate, is wherein formed with device architecture, and described carbon monoatomic layer is electrically connected to described device architecture.
Fig. 2～Figure 15 is cross-section structure, the schematic top plan view of method of the formation interconnection structure of the specific embodiment of the invention, in order to make those skilled in the art can better understand the present invention the method for the formation embolism of embodiment, below in conjunction with specific embodiment combination, with reference to figure 1 and Fig. 2～Figure 15, describe the method for the formation interconnection structure of the specific embodiment of the invention in detail.
In conjunction with reference to figure 1 and Fig. 2, perform step S11, the first substrate 20 is provided, on described the first substrate, form sacrifice layer 21.In the specific embodiment of the invention, the material of described the first substrate 20 is silicon or silicon dioxide.Because the first substrate 20 in the present invention plays the effect of intermediary, in technique afterwards, interconnection structure formed thereon can be transferred on the second substrate, therefore in the present invention, the material of the first substrate 20 is not limited to silicon or silicon dioxide, can be the substrate of other materials.
In conjunction with reference to figure 1 and Fig. 3, execution step S12, utilizes sacrifice layer 21 described in impressing mould 30 inscription rubbings, on described sacrifice layer 21, forms fin 211, and described fin 211 has end face and two side.In the specific embodiment of the invention, the material of described sacrifice layer 21 is nickel.Utilize sacrifice layer 21 described in impressing mould 30 inscription rubbings, on sacrifice layer 21, form fin 211, form after fin 211, on the first substrate 20, also has skim sacrifice layer, the carbon monoatomic layer and the first substrate 20 that after guaranteeing, in technique, in the precalculated position of fin 211, form are cut apart mutually, like this after removing sacrifice layer 21, just can carbon monoatomic layer is separated with the first substrate 20.The figure of the interconnection line that the figure of fin 211 forms is as required determined.The concrete grammar of inscription rubbing comprises: described sacrifice layer 21 is softened; Use the sacrifice layer 21 after 30 pairs of described softening of described impressing mould to carry out punching press; Sacrifice layer 21 after described punching press is freezed, form fin 211; Afterwards, remove described impressing mould 30.Owing to utilizing nanometer inscription rubbing (nano-imprint) technology to form fin in the present invention on sacrifice layer 21, so the material of sacrifice layer 21 is not limited to nickel, as long as meet, can utilize nanometer inscription rubbing technology to form fin.
In conjunction with reference to figure 1 and Fig. 9, Figure 10 (schematic top plan view that Figure 10 is Fig. 9, Fig. 9 is that Figure 10 is along the cross-sectional view of a-a direction), execution step S13, at the end face of described fin 211, form carbon monoatomic layer between the precalculated position of sidewall, adjacent lugs 211, as interconnection structure.
In the specific embodiment of the invention, between the precalculated position of described fin 211 end faces, sidewall, adjacent lugs 211, forming carbon monoatomic layer comprises: with reference to figure 4, form intermediate layer 22, cover described fin 211 and sacrifice layer 21, the method that wherein forms intermediate layer 22 is chemical vapour deposition (CVD).With reference to figure 5, Fig. 6 (schematic top plan view that Fig. 6 is Fig. 5, Fig. 5 is that Fig. 6 is along the cross-sectional view of a-a direction), photoetching, etching are removed the intermediate layer of end face, the intermediate layer between adjacent lugs 21, only remain the intermediate layer of fin 211 two sides.With reference to figure 7, Fig. 8 (schematic top plan view that Fig. 8 is Fig. 7, Fig. 7 is that Fig. 8 is along the cross-sectional view of a-a direction), remove the intermediate layer in fin 211 sidewall precalculated positions, this precalculated position is for forming the position of embolism; The method of removing the intermediate layer in lugs side precalculated position is photoetching, etching.With reference to figure 9, Figure 10, pyrolysis methane forms carbon monoatomic layer 23 between the precalculated position of fin 211 end faces, sidewall, adjacent lugs 211.In the specific embodiment of the invention, form the method for carbon monoatomic layer 23 for pass into methane (CH in reaction chamber
4) and hydrogen (H
2), pyrolysis methane, methane at high temperature decomposes Formed atom and hydrogen, and carbon atom is deposited on the surface formation carbon monoatomic layer 23 that fin 21 is not covered by intermediate layer.Wherein, the methane (CH passing into
4) and hydrogen (H
2) flow-rate ratio be 90: 1～100: 1, the flow of methane is 760torr～860torr.Be preferably methane (CH
4) and hydrogen (H
2) flow-rate ratio be 99: 1, the flow of methane is 760torr; The temperature of methane decomposition is 1000 ℃, and sedimentation time is about 5min.
The conduct of the position of definition carbon monoatomic layer is played in intermediate layer 22, in the specific embodiment of the invention, the material in intermediate layer 22 is silicon nitride, in other embodiments, the other materials that also can be known to the skilled person, as long as can remove intermediate layer in the technique after meeting.
In conjunction with reference to figure 1 and Figure 11, perform step S14, form adhesion layer 24, cover described carbon monoatomic layer 23.In the specific embodiment of the invention, adhesion layer 24 has good adhesiveness with carbon monoatomic layer 23, after remove after sacrifice layer 21, adhesion layer 24 adheres to each other with carbon monoatomic layer 23, adhesion layer 24 plays the object that keeps carbon monoatomic layer 23 shapes, in technique afterwards, adhesion layer 24 is transferred on the second substrate together with carbon monoatomic layer 23.The material of described adhesion layer 24 is polymethyl methacrylate (PMMA), and the method that forms polymethyl methacrylate adhesion layer 24 is spin-coating method.
In conjunction with reference to figure 1 and Figure 12, perform step S15, remove described sacrifice layer 21.In the specific embodiment of the invention, utilize wet etching to remove sacrifice layer 21.Due in the specific embodiment of the invention, the material of sacrifice layer 21 is nickel, utilizes hydrochloric acid or phosphoric acid wet etching to remove sacrifice layer 21.When removing sacrifice layer 21, also removed the silicon nitride in residue intermediate layer 22.Remove after sacrifice layer 21, the first substrate 20 and carbon monoatomic layer 23, adhesion layer 24 are separated.
In conjunction with reference to figure 1 and Figure 13, perform step S16, described carbon monoatomic layer 23, adhesion layer 24 are transferred on the second substrate 40, described the second substrate 40 is Semiconductor substrate, is wherein formed with device architecture, carbon monoatomic layer 23 is electrically connected to described device architecture.In the specific embodiment of the invention, can utilize tool holding adhesion layer 24, adhesion layer 24 is transferred on the second substrate 40 together with carbon monoatomic layer 23.Be positioned at the carbon monoatomic layer 23 of fin end face as the interconnection line being connected with superstructure, the carbon monoatomic layer 23 between adjacent lugs is as the interconnection line being connected with understructure, and the carbon monoatomic layer in lugs side precalculated position is as embolism.The material of the second substrate 40 can be silicon or the SiGe of monocrystalline or non crystalline structure; Also can be silicon-on-insulator (SOI); Or the material that can also comprise other, such as III-V compounds of group such as GaAs.In described the second substrate 40, be formed with device architecture (not shown), isolation trench structure for example, source region, drain region etc.
In the specific embodiment of the invention, after carbon monoatomic layer 23, adhesion layer 24 are transferred on the second substrate 40, with reference to Figure 14, remove described adhesion layer 24.In the specific embodiment of the invention, the material of adhesion layer 24 is polymethyl methacrylate, utilizes acetone wet etching to remove the adhesion layer 24 that material is polymethyl methacrylate.In the specific embodiment of the invention, after removal adhesion layer 24, also comprise the step of annealing, to improve the adhesiveness between carbon monoatomic layer 23 and the second substrate 40.
Afterwards, with reference to Figure 15, form ultralow k dielectric layer 25, cover described carbon monoatomic layer 23 and described the second substrate 40.In the specific embodiment of the invention, the material of ultralow k dielectric layer 25 is gluey super low-k materials.The material of ultralow k dielectric layer 25 is SiLK, polyimides, norbornene polymer, benzocyclobutene or polytetrafluoroethylene.The method that forms ultralow k dielectric layer 25 is spin-coating method, can guarantee that so ultralow k dielectric layer 25 is also formed on the space between carbon monoatomic layer 23 and the second substrate 40.
With reference to figure 2k, the present invention also provides a kind of semiconductor device, comprising: substrate 40, is formed with device architecture in described substrate 40; Ultralow k dielectric layer 25, is formed on described substrate 40; Interconnection structure 23, is arranged in described ultralow k dielectric layer, is electrically connected to described device architecture; Wherein, interconnection structure 23 is formed by carbon monoatomic layer.
Technical solution of the present invention is utilized the high conductivity of carbon monoatomic layer, has formed the interconnection structure being comprised of carbon monoatomic layer, can reduce RC and postpone, and improves the performance of semiconductor device.
Although the present invention with preferred embodiment openly as above; but it is not for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can utilize method and the technology contents of above-mentioned announcement to make possible change and modification to technical solution of the present invention; therefore; every content that does not depart from technical solution of the present invention; any simple modification, equivalent variations and the modification above embodiment done according to technical spirit of the present invention, all belong to the protection range of technical solution of the present invention.
Claims (17)
1. a method that forms interconnection structure, is characterized in that, comprising:
The first substrate is provided, on described the first substrate, forms sacrifice layer;
Utilize sacrifice layer described in impressing mould inscription rubbing, on described sacrifice layer, form fin, described fin has end face and two side;
Between the precalculated position of described fin end face, sidewall and adjacent fin, form carbon monoatomic layer, as interconnection structure; Wherein, be positioned at the carbon monoatomic layer of fin end face as the interconnection line being connected with superstructure, the carbon monoatomic layer between adjacent lugs is as the interconnection line being connected with understructure, and the carbon monoatomic layer in lugs side precalculated position is as embolism;
Form adhesion layer, cover described carbon monoatomic layer;
Remove described sacrifice layer;
Described adhesion layer, carbon monoatomic layer are transferred on the second substrate, and described the second substrate is Semiconductor substrate, is wherein formed with device architecture, and described carbon monoatomic layer is electrically connected to described device architecture.
2. the method for described formation interconnection structure as claimed in claim 1, is characterized in that, utilizes sacrifice layer described in impressing mould inscription rubbing, forms fin and comprises: described sacrifice layer is softened on described sacrifice layer; Sacrifice layer after using described impressing mould to described softening carries out punching press; Sacrifice layer after described punching press is freezed, form fin; Remove described impressing mould.
3. the method for formation interconnection structure as claimed in claim 2, is characterized in that, the material of described sacrifice layer is nickel.
4. the method for formation interconnection structure as claimed in claim 1, is characterized in that, forms carbon monoatomic layer and comprise between the end face of described fin and the precalculated position of sidewall and adjacent lugs:
In formation intermediate layer, the two side of described fin;
Remove the intermediate layer in sidewall precalculated position;
Methane decomposition forms carbon monoatomic layer between the end face of described fin, the precalculated position of sidewall and adjacent lugs.
5. the method for formation interconnection structure as claimed in claim 4, is characterized in that, in formation intermediate layer, the two side of described fin, comprises:
Form intermediate layer, cover end face and the two side of described fin;
The intermediate layer that photoetching, etching are removed end face.
6. the method for formation interconnection structure as claimed in claim 5, is characterized in that, the material in described intermediate layer is silicon nitride, and its formation method is chemical vapour deposition (CVD).
7. the method for formation interconnection structure as claimed in claim 4, is characterized in that, when removing sacrifice layer, also comprises and removes remaining intermediate layer.
8. the method for formation interconnection structure as claimed in claim 7, is characterized in that, utilizes hydrochloric acid or phosphoric acid wet etching to remove described sacrifice layer, removes remaining intermediate layer.
9. the method for formation interconnection structure as claimed in claim 1, is characterized in that, after described adhesion layer, carbon monoatomic layer are transferred on the second substrate, also comprises: remove adhesion layer.
10. the method for formation interconnection structure as claimed in claim 9, is characterized in that, the material of described adhesion layer is polymethyl methacrylate.
The method of 11. formation interconnection structures as claimed in claim 10, is characterized in that, the method for described formation adhesion layer is spin-coating method.
The method of 12. formation interconnection structures as claimed in claim 11, is characterized in that, utilizes acetone wet etching to remove adhesion layer.
The method of 13. formation interconnection structures as claimed in claim 12, is characterized in that, also comprises the step of annealing after removal adhesion layer.
The method of 14. described formation interconnection structures as claimed in claim 9, is characterized in that, after removing adhesion layer, also comprises and forms ultralow k dielectric layer, covers described the second substrate and carbon monoatomic layer.
The method of 15. formation interconnection structures as described in claim 14, is characterized in that, described ultralow k dielectric layer is gluey, and its material is SiLK, polyimides, norbornene polymer, benzocyclobutene or polytetrafluoroethylene.
The method of 16. formation interconnection structures as claimed in claim 1, is characterized in that, the material of described the first substrate is silicon or silicon dioxide.
17. 1 kinds of semiconductor device, is characterized in that, comprising:
Substrate, is formed with device architecture in described substrate;
Be formed on the interconnection structure on described substrate, be electrically connected to described device architecture; It is characterized in that,
Described interconnection structure is formed by carbon monoatomic layer, described interconnection structure comprises connector, the interconnection line being electrically connected to described connector top, the interconnection line being connected with described connector bottom electrical, and the interconnection line being connected with connector top, the interconnection line being connected with connector bottom lay respectively at the both sides of described connector.
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| CN1860605A (en) * | 2003-09-29 | 2006-11-08 | 国际商业机器公司 | Fabrication method |
| CN101024480A (en) * | 2001-02-12 | 2007-08-29 | 佛姆法克特股份有限公司 | Method for forming microelectronic spring structures on a substrate |
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| CN101024480A (en) * | 2001-02-12 | 2007-08-29 | 佛姆法克特股份有限公司 | Method for forming microelectronic spring structures on a substrate |
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