CN102749570A - Wafer test device and wafer test method for probe station - Google Patents
Wafer test device and wafer test method for probe station Download PDFInfo
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- CN102749570A CN102749570A CN2012102618885A CN201210261888A CN102749570A CN 102749570 A CN102749570 A CN 102749570A CN 2012102618885 A CN2012102618885 A CN 2012102618885A CN 201210261888 A CN201210261888 A CN 201210261888A CN 102749570 A CN102749570 A CN 102749570A
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Abstract
The invention provides a wafer test device and a wafer test method for a probe station. According to the invention, the wafer test device for the probe station comprises a tester, a probe station, a locator and a microscope, wherein the tester is used for judging the characteristics of a chip on the wafer; the probe station is used for touching with a pad on the chip in the wafer through a probe so as to connect the pad to the tester; the locator is used for locating the probe of the probe station to the pad on the chip in the wafer; and the microscope of the probe station is placed above the probe station and used for capturing an image of the alignment condition of the pad and the probe. The wafer test device for the probe station further comprises a display which is used for displaying the image of the alignment condition of the pad and the probe. According to the wafer test device and the wafer test method, the chip bonding pad in micro micron level or nanometer level can be detected automatically.
Description
Technical field
The present invention relates to semiconductor manufacturing and field tests, more particularly, the present invention relates to a kind of probe station wafer sort equipment and crystal round test approach.
Background technology
Probe station (Prober) is to be used in that semiconductor applications carries out characteristic or fault analysis to the device on the wafer and the accurate board that uses.Specifically, wafer sort equipment comprises test machine and probe station (probe), and wafer sort equipment realizes that through probe station each pad (PAD) is connected with the stable of test machine on the chip in the wafer; And judge the characteristic of chip on the wafer by test machine.
Wherein, probe station can be divided into manual probe station, semi-automatic probe station and full-automatic probe station.Reasonable probe station mainly by base station (precision optical machinery) partly, optical system, accessory (for example, probe base, shockproof table, light shield) and other auxiliary enhanced system (for example, laser cutting machine, temperature-controlling module) form.
Nowadays, probe station is mainly used in the test of semicon industry and photoelectricity industry at present.Probe station is widely used in the research and development of the Precise Electric Measurement of complicacy, high speed device, is intended to guarantee quality and reliability, and the cost of reduction research and development time and device fabrication.
Along with development of semiconductor; The integrated level of chip is increasingly high; Therefore the size of each pad is also more and more littler on the chip; Even arrived the degree of skin (Pico, part per trillion) rice and nanometer scale, give on the chip in the wafer each pad thus and stable connection of test machine brought challenge.
Thus, be desirable to provide a kind of wafer sort equipment and the crystal round test approach that can realize that micromicron level or nano level chip bonding pad are surveyed automatically.
Summary of the invention
Technical matters to be solved by this invention is to have above-mentioned defective in the prior art, and a kind of probe station wafer sort equipment and the crystal round test approach that can realize that micromicron level or nano level chip bonding pad are surveyed automatically is provided.
According to a first aspect of the invention, a kind of probe station wafer sort equipment is provided, it comprises: test machine is used to judge the characteristic of the chip on the said wafer; Probe station is used for through the contacting of pad on the chip of probe and wafer said pad being connected to test machine; Steady arm is used for said probe station probe is positioned to the pad on the chip of wafer; And the probe station microscope, it is positioned at said probe station top, and is used to catch the image of said pad and the situation of aliging of said probe.
Preferably, above-mentioned probe station wafer sort equipment also comprises display, is used to show the image of said pad and the situation of aliging of said probe.
Preferably, in above-mentioned probe station wafer sort equipment, said probe station is the automatic prober platform.
Preferably, in above-mentioned probe station wafer sort equipment, said steady arm is a micropositioner.
Preferably, in above-mentioned probe station wafer sort equipment, said steady arm is connected to said probe station through vacuum coupling.
According to a second aspect of the invention, a kind of crystal round test approach is provided, it comprises: utilize steady arm that said probe station probe is positioned to the pad on the chip in the wafer; Contacting of pad on the chip in probe through probe station and the wafer is connected to test machine with said pad; Utilize the probe station microscope to catch the image of said pad and the situation of aliging of said probe; And utilize test machine to judge the characteristic of the chip on the said wafer.
Preferably, preferably crystal round test approach also comprises the image that utilizes display to show said pad and the situation of aliging of said probe.
Preferably, in above-mentioned crystal round test approach, said probe station is the automatic prober platform.
Preferably, in above-mentioned crystal round test approach, said steady arm is a micropositioner.
Preferably, in above-mentioned crystal round test approach, said steady arm is connected to said probe station through vacuum coupling.
Can realize that according to probe station wafer sort equipment of the present invention and crystal round test approach micromicron level or nano level chip bonding pad survey automatically.
Description of drawings
In conjunction with accompanying drawing, and, will more easily more complete understanding be arranged and more easily understand its attendant advantages and characteristic the present invention through with reference to following detailed, wherein:
Fig. 1 schematically shows the block diagram according to the probe station wafer sort equipment of the embodiment of the invention.
Fig. 2 schematically shows the process flow diagram according to the crystal round test approach of the embodiment of the invention.
Need to prove that accompanying drawing is used to explain the present invention, and unrestricted the present invention.Notice that the accompanying drawing of expression structure possibly not be to draw in proportion.And in the accompanying drawing, identical or similar elements indicates identical or similar label.
Embodiment
In order to make content of the present invention clear more and understandable, content of the present invention is described in detail below in conjunction with specific embodiment and accompanying drawing.
< first embodiment >
In semi-conductor industry, be manufactured in the various individual devices on the wafer, finally all use pad to draw each electricity end points.When testing these individual devices, the probe of tester table is pricked pad, connects with the electricity that realizes device, thereby could accomplish various electrical functions tests.
Fig. 1 schematically shows the block diagram according to the probe station wafer sort equipment of first embodiment of the invention.
As shown in Figure 1, probe station wafer sort equipment 100 comprises:
Test machine 10 is used to judge the characteristic of the chip on the said wafer;
Probe station 20 is used for through the contacting of pad on the chip of probe and wafer said pad being connected to test machine;
Steady arm 30 is used for said probe station probe is positioned to the pad on the chip of wafer; And
Probe station microscope 40, it is positioned at said probe station top, and is used to catch the image of said pad and the situation of aliging of said probe.
Preferably, probe station wafer sort equipment also comprises display 50, is used to show the image of said pad and the situation of aliging of said probe.Thus, can monitoring also in real time, feedback probe contacts situation with aliging of pad.
For example, said probe station is the automatic prober platform, and can adopt the automatic prober platform of any appropriate.
For example, said steady arm is a micropositioner.
Preferably, said steady arm is connected to said probe station through vacuum coupling 60.
Can realize that according to the probe station wafer sort equipment of first embodiment of the invention micromicron level or nano level chip bonding pad survey automatically.
< second embodiment >
Fig. 2 schematically shows the process flow diagram according to the crystal round test approach of second embodiment of the invention.
As shown in Figure 2, comprise according to the crystal round test approach of second embodiment of the invention:
Utilize steady arm that said probe station probe is positioned to the pad (S1) on the chip in the wafer;
Contacting of pad on the chip in probe through probe station and the wafer is connected to test machine (S2) with said pad;
Utilize the probe station microscope to catch the image (S3) of said pad and the situation of aliging of said probe;
Utilize test machine to judge the characteristic of the chip on the said wafer (S4).
Preferably, crystal round test approach also comprises the image (S5) that utilizes display to show said pad and the situation of aliging of said probe.Thus, can monitoring also in real time, feedback probe contacts situation with aliging of pad.
Need to prove that the present invention does not limit the execution sequence of above-mentioned steps.
For instance, for judge on the wafer chip unusually whether, can on this chip, carry out use probe system test to confirm the electrical characteristics of this chip.Wherein, probe in the probe station and the pad on the chip come in contact.After this then can apply measuring current to pad through probe.Subsequently, for example, test machine will be compared with the data in this probe system to judge that normally whether this chip with the corresponding electrical characteristics of the output current of contact pad.
Can realize that according to the crystal round test approach of second embodiment of the invention micromicron level or nano level chip bonding pad survey automatically.
It is understandable that though the present invention with the preferred embodiment disclosure as above, yet the foregoing description is not in order to limit the present invention.For any those of ordinary skill in the art; Do not breaking away under the technical scheme scope situation of the present invention; All the technology contents of above-mentioned announcement capable of using is made many possible changes and modification to technical scheme of the present invention, or is revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical scheme of the present invention, all still belongs in the scope of technical scheme protection of the present invention any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.
Claims (10)
1. probe station wafer sort equipment is characterized in that comprising:
Test machine is used to judge the characteristic of the chip on the said wafer;
Probe station is used for through the contacting of pad on the chip of probe and wafer said pad being connected to test machine;
Steady arm is used for said probe station probe is positioned to the pad on the chip of wafer; And
The probe station microscope, it is positioned at said probe station top, and is used to catch the image of said pad and the situation of aliging of said probe.
2. probe station wafer sort equipment according to claim 1 is characterized in that also comprising display, is used to show the image of said pad and the situation of aliging of said probe.
3. probe station wafer sort equipment according to claim 1 and 2 is characterized in that said probe station is the automatic prober platform.
4. probe station wafer sort equipment according to claim 1 and 2 is characterized in that said steady arm is a micropositioner.
5. probe station wafer sort equipment according to claim 1 and 2 is characterized in that said steady arm is connected to said probe station through vacuum coupling.
6. crystal round test approach is characterized in that comprising:
Utilize steady arm that said probe station probe is positioned to the pad on the chip in the wafer;
Contacting of pad on the chip in probe through probe station and the wafer is connected to test machine with said pad;
Utilize the probe station microscope to catch the image of said pad and the situation of aliging of said probe; And
Utilize test machine to judge the characteristic of the chip on the said wafer.
7. crystal round test approach according to claim 6 is characterized in that also comprising the image that utilizes display to show said pad and the situation of aliging of said probe.
8. according to claim 6 or 7 described crystal round test approach, it is characterized in that said probe station is the automatic prober platform.
9. according to claim 6 or 7 described crystal round test approach, it is characterized in that said steady arm is a micropositioner.
10. according to claim 6 or 7 described crystal round test approach, it is characterized in that said steady arm is connected to said probe station through vacuum coupling.
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| CN2012102618885A CN102749570A (en) | 2012-07-26 | 2012-07-26 | Wafer test device and wafer test method for probe station |
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| CN2012102618885A CN102749570A (en) | 2012-07-26 | 2012-07-26 | Wafer test device and wafer test method for probe station |
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Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103969104A (en) * | 2014-05-21 | 2014-08-06 | 上海华力微电子有限公司 | Vibration reduction device and method for focusing ion beam machine probe |
| CN104316856A (en) * | 2014-10-29 | 2015-01-28 | 上海华力微电子有限公司 | Back face detection type photon radiation microscope device and testing method thereof |
| CN105988019A (en) * | 2015-01-30 | 2016-10-05 | 北京大学 | Wafer level test method for structure parameters of silicon micro accelerometer |
| CN106483443A (en) * | 2015-08-28 | 2017-03-08 | 北京确安科技股份有限公司 | A kind of method preventing wafer Map figure displacement |
| CN108122795A (en) * | 2016-11-28 | 2018-06-05 | 深圳市微凡半导体有限公司 | Single of CMOS camera wafer is electrically and function detection device and method |
| CN110133470A (en) * | 2019-06-06 | 2019-08-16 | 德淮半导体有限公司 | Wafer acceptance processing method and processing device |
| CN110470975A (en) * | 2019-08-29 | 2019-11-19 | 上海华虹宏力半导体制造有限公司 | Silicon wafer characteristic test system and method |
| CN110907799A (en) * | 2019-11-05 | 2020-03-24 | 长江存储科技有限责任公司 | Probe card, wafer testing device and wafer testing method |
| CN111736052A (en) * | 2019-03-21 | 2020-10-02 | 创意电子股份有限公司 | Probe card, wafer detection equipment with probe card and bare chip test process using probe card |
| CN111896856A (en) * | 2020-08-12 | 2020-11-06 | 江西乾照光电有限公司 | System and method for testing electrical performance of chip |
| CN112444727A (en) * | 2019-08-28 | 2021-03-05 | 飞锃半导体（上海）有限公司 | Wafer testing system and method |
| CN113267657A (en) * | 2021-07-21 | 2021-08-17 | 深圳市志金电子有限公司 | IC test probe structure and manufacturing method thereof |
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Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103969104A (en) * | 2014-05-21 | 2014-08-06 | 上海华力微电子有限公司 | Vibration reduction device and method for focusing ion beam machine probe |
| CN104316856B (en) * | 2014-10-29 | 2017-06-23 | 上海华力微电子有限公司 | Back side detection type photon radiation microscopie unit and method of testing |
| CN104316856A (en) * | 2014-10-29 | 2015-01-28 | 上海华力微电子有限公司 | Back face detection type photon radiation microscope device and testing method thereof |
| CN105988019A (en) * | 2015-01-30 | 2016-10-05 | 北京大学 | Wafer level test method for structure parameters of silicon micro accelerometer |
| CN106483443B (en) * | 2015-08-28 | 2019-12-24 | 北京确安科技股份有限公司 | Method for preventing Map shift of wafer |
| CN106483443A (en) * | 2015-08-28 | 2017-03-08 | 北京确安科技股份有限公司 | A kind of method preventing wafer Map figure displacement |
| CN108122795A (en) * | 2016-11-28 | 2018-06-05 | 深圳市微凡半导体有限公司 | Single of CMOS camera wafer is electrically and function detection device and method |
| CN111736052A (en) * | 2019-03-21 | 2020-10-02 | 创意电子股份有限公司 | Probe card, wafer detection equipment with probe card and bare chip test process using probe card |
| CN111736052B (en) * | 2019-03-21 | 2022-10-04 | 创意电子股份有限公司 | Probe card, wafer detection equipment with probe card and bare chip test process using probe card |
| CN110133470A (en) * | 2019-06-06 | 2019-08-16 | 德淮半导体有限公司 | Wafer acceptance processing method and processing device |
| CN112444727A (en) * | 2019-08-28 | 2021-03-05 | 飞锃半导体（上海）有限公司 | Wafer testing system and method |
| CN110470975A (en) * | 2019-08-29 | 2019-11-19 | 上海华虹宏力半导体制造有限公司 | Silicon wafer characteristic test system and method |
| CN110907799A (en) * | 2019-11-05 | 2020-03-24 | 长江存储科技有限责任公司 | Probe card, wafer testing device and wafer testing method |
| CN110907799B (en) * | 2019-11-05 | 2022-02-01 | 长江存储科技有限责任公司 | Probe card, wafer testing device and wafer testing method |
| CN111896856A (en) * | 2020-08-12 | 2020-11-06 | 江西乾照光电有限公司 | System and method for testing electrical performance of chip |
| CN113267657A (en) * | 2021-07-21 | 2021-08-17 | 深圳市志金电子有限公司 | IC test probe structure and manufacturing method thereof |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20140506 |
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Effective date of registration: 20140506 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201203 Shanghai Guo Shou Jing Road, Pudong New Area Zhangjiang hi tech Park No. 818 Applicant before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai |
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Application publication date: 20121024 |