Background technology
The SOC(system on a chip) (SoC, system on chip) of two-forty has two kinds of bigger developing direction at present; A kind of is software definition radio frequency (SDR; Software Defined Radio), it makes equipment can be used in multiple standards, a plurality of frequency band through its reprogramming and reconfigurable ability; Realize multiple function, SDR has increased the dirigibility of software; And another kind of direction increases dedicated hardware accelerators exactly; In conjunction with microprocessor (MCU; Microprogrammed Control Unit) or digital signal processor (DSP, DigitalSignal Processor) do simple computation and control, can better consider low power dissipation design.
In the SoC based on hardware accelerator, in general, direct memory inserts (DMA; DirectMemory Access) be necessary; DMA can accomplish MCU/DSP to accelerator, accelerator to the data-moving between the accelerator, wherein participate in without primary controller, the speed of system can increase greatly.The interruption that reduces DMA to a certain extent can reduce the processing time of MCU/DSP, increases the processing speed of system greatly, and can further reduce system power dissipation.
The existing operating process of calling based on a single module of hardware accelerator is as follows:
Step 1, primary controller configuration DMA input data;
Whether the DMA after step 2, the input of interruption processing module judgment data are accomplished interrupts accomplishing, and carry out step 3 if completion then sends to primary controller, does not then continue this interruption of wait if accomplish;
The correlation parameter of the hardware accelerator module that step 3, primary controller configuration will be called;
Whether step 4, the operation of interruption processing module judge module finish interrupts accomplishing, if then carry out step 5, then continues to wait for this interruption if not;
Step 5, primary controller configuration DMA output data;
Whether the DMA that step 6, the output of interruption processing module judgment data are accomplished interrupts accomplishing, and then carry out step 7 if accomplish, and does not then continue to wait for this interruption if accomplish;
Step 7, this single module call end.
From above description, can find whenever to call a single module primary controller and all will handle twice DMA startup interruption, and repeatedly DMA and hardware accelerator are configured, not only increase the time of system handles, also increase the complexity of system software; If need carry out a multimode when calling, then whenever call a module and all can handle at least twice DMA and interrupt, the accumulation processor that gets up can progressively increase shared operation time so, and the complexity of primary controller operating process can constantly increase with burden.
Summary of the invention
The invention provides a kind of module invokes method and apparatus, reduce system handles time and the problem that reduces software operation flow process complexity to reach to solve.
A kind of module invokes method provided by the invention, this method comprises:
Primary controller configuration DMA interface module and hardware accelerator module, and the startup of hardware accelerator module employing DMA Starting mode is set;
The hardware accelerator module operation finishes, and sends to interrupt giving interruption processing module;
Interruption processing module receives operation that hardware processing module sends interruptions that finish, and sends response and gives primary controller, and primary controller disposes DMA interface module output data;
After DMA interface module output data finishes, send and interrupt giving interruption processing module, interruption processing module receives said interruption, then calls end.
Further, said method also has following characteristics:
Said interruption processing module receives in hardware accelerator module or the transmission of DMA interface module and has no progeny, and also comprises and judges interrupt type and the interruption times that receives.
Further, said method also has following characteristics:
Said interrupt type comprises that output data that the DMA interface module is sent finishes and interrupts operation with the hardware accelerator module transmission interruption that finishes;
Said interruption times refers to operation that hardware accelerator module that interruption processing module receives sends the finish number of times of interruption of the output data of interrupting sending with the DMA interface module that finishes.
Further, said method also has following characteristics:
After said primary controller is provided with the startup of hardware accelerator module employing DMA Starting mode, also comprise after operation is moved in the input of DMA interface module completion data, send DMA IE hardware accelerator module and move.
Further, said method also has following characteristics:
When hardware accelerator module number during greater than, interruption processing module receives the operation that hardware accelerator module sends and finishes when interrupting, and also comprises judging that whether said interruption send for last hardware accelerator.Give primary controller if then send response,, interrupt giving primary controller, dispose next hardware accelerator by primary controller otherwise send by the output of primary controller configuration DMA interface module data.
Further, said method also has following characteristics:
When hardware accelerator module call number during greater than one time; The output data that interruption processing module receives the transmission of DMA interface module finishes when interrupting; Also comprise judging whether said interruption times reaches call number, give primary controller if then send response, said hardware accelerator module is called end; Interrupt giving primary controller otherwise send, dispose said hardware accelerator once more by primary controller.
In order to solve the problems of the technologies described above, the present invention also provides a kind of module invokes device, comprises primary controller module, interruption processing module, DMA interface module, at least 1 hardware accelerator module,
The interrupt operation that said primary controller module is used for sending according to interruption processing module realizes input and output and the configuration DMA interface module and the hardware accelerator module of data;
Said interruption processing module is used to receive each look-at-me of DMA interface module and hardware accelerator module transmission, and gives the primary controller module with its interrupt response that receives;
Said DMA interface module comprises interface that the data transmission interface that links to each other with each hardware accelerator module, interrupt response module link to each other and the control interface that links to each other with primary controller, is used to accomplish each hardware accelerator module data-moving and handles and send or respond corresponding interruption to interruption processing module.
Said hardware accelerator module comprises that interface module, computing module and the DMA of hardware accelerator start module, is used to realize that the processing of data and DMA start, and sends look-at-me and give interruption processing module.
Further, said apparatus can also have following characteristics:
Said interruption processing module also comprises judge module, is used for judging the interrupt type and the interruption times that receive receiving having no progeny of hardware accelerator module or DMA interface module transmission.
Further, said apparatus can also have following characteristics:
Said interrupt type comprises that output data that the DMA interface module is sent finishes and interrupts operation with the hardware accelerator module transmission interruption that finishes;
Said interruption times refers to operation that hardware accelerator module that interruption processing module receives sends the finish number of times of interruption of the output data of interrupting sending with the DMA interface module that finishes.
Further, said apparatus can also have following characteristics:
Said DMA interface module also comprises the interruption sending module, is used to send DMA and interrupts to hardware accelerator module, starts the hardware accelerator module operation.
Further, said apparatus can also have following characteristics:
Said DMA starts module and comprises that DMA starts interface and DMA interrupts receiving interface, and said DMA starts interface and is connected with primary controller, by primary controller configuration Starting mode; Said DMA interrupts receiving interface and is connected with the DMA interrupt module, is used for the DMA IE hardware accelerator operation of sending according to the DMA interface module.
Adopt module invokes method and apparatus of the present invention, go for all realizations based on the hardware accelerator of SoC.No matter be that single module calls or multimode is called, the inventive method is all only handled a DMA with device and is interrupted when data are exported, significantly reduced the DMA interruption times that primary controller receives, and has simplified operating process, has reduced the time of primary controller deal with data; All modules all can directly start operation through DMA simultaneously, do not start through primary controller, thereby have reduced the complexity of the operating process of primary controller.
Embodiment
In order to make the object of the invention, technical scheme and advantage clearer,, method among the present invention and device are done further detailed description below in conjunction with accompanying drawing and embodiment.
Method embodiment:
The concrete operations flow process of single module single call is as shown in Figure 1, specifically comprises following steps:
102, primary controller configuration DMA interface module and hardware accelerator module, and hardware accelerator module employing DMA Starting mode is set;
In this step, in primary controller configuration DMA interface module and hardware accelerator module, after hardware accelerator module adopted the DMA Starting mode to start, the DMA interface module was carried out data-moving, started hardware accelerator module after accomplishing, the hardware accelerator module operation.
104, the hardware accelerator module operation finishes, and sends operation and finishes interruption to interruption processing module;
106, interruption processing module receives operation that hardware processing module sends interruptions that finish, and sends response and gives primary controller, and primary controller disposes DMA interface module output data;
108, after DMA interface module output data finishes, receive the interruption that finishes of output data that the DMA interface module sends send to interrupt for interruption processing module, interruption processing module, then this calls end.
Wherein, interruption processing module will judge that this interruption is that hardware accelerator module is sent or the DMA interface module is sent when receiving interruption, gives primary controller so that send different responses.
The concrete operations flow process of multimode single call is as shown in Figure 2, is example to call N hardware accelerator module in the present embodiment, specifically may further comprise the steps:
202, the hardware accelerator module X of primary controller configuration DMA interface module and object run (1≤X≤N), object run module X is set simultaneously adopts the DMA Starting mode;
In this step, with the single module invocation step, after hardware accelerator module is set adopts the DMA Starting mode, the DMA interface module is carried out data-moving, accomplishes the back and starts hardware accelerator module, and hardware accelerator module is moved;
204, interruption processing module is had no progeny in the operation that receives hardware accelerator module X transmission finishes; Judge that whether said interruption send for hardware accelerator module N; Interrupt informing that primary controller carry out step 206 if then send, interrupt informing that the primary controller circulation carry out step 202 otherwise send; ,
In this step, interruption processing module is had no progeny in the operation that receives hardware processing module X transmission finishes, judge whether to receive said interruption for hardware accelerator module N sends, and whether be the interruption that last hardware accelerator module is sent promptly.Can whether equal the number realization of hardware accelerator module by the interruption times counting that receives, or successively decrease, judge whether to be zero realization by whenever receiving an interrupt data.
206, primary controller configuration DMA interface module output data;
208, interruption processing module receives the interruption that finishes of output data that the DMA interface module sends, and then this calls end.
The concrete operations flow process that multimode is repeatedly called is as shown in Figure 3, supposes total in this embodiment N hardware accelerator module, is respectively hardware accelerator module 1-N, and the device synoptic diagram is as shown in Figure 5.Need call one by one these hardware accelerator module in the present embodiment; Wherein call hardware accelerator module 1 once, call hardware accelerator module 2-module M-1 circulation m time, call hardware accelerator M n time altogether; Call hardware accelerator M+1-hardware accelerator N circulation 1 time, m and n are greater than 1.Its concrete operations flow process is following:
Step 301, primary controller configure hardware accelerator module 1 are provided with hardware accelerator module 1 simultaneously and adopt the DMA Starting mode to start; The DMA interface module is carried out data-moving, starts hardware accelerator module 1 after accomplishing, hardware accelerator module 1 operation;
Step 302, interruption processing module receive operation that hardware accelerator 1 sends interruptions that finish, and send response and give primary controller, and primary controller disposes DMA interface module output data;
Step 303, interruption processing module receive output data that the DMA interface module sends and finish and interrupt then carry out step 304, then continue to wait for this interruption if not;
(2≤X≤M-1), configure hardware accelerator module X adopts the DMA Starting mode to start simultaneously for step 304, primary controller configure hardware accelerator module X.The DMA interface module is carried out data-moving, starts hardware accelerator module X after accomplishing, hardware accelerator module X operation;
Step 305, interruption processing module receive operation that hardware accelerator X the sends interruption that finishes; Judge whether said interruption is that hardware accelerator module M-1 sends; Interrupt informing that primary controller carry out step 306 if then send, interrupt informing and carry out the operation of step 304 by primary controller otherwise send;
Step 306, primary controller configuration DMA interface module output data;
Step 307, interruption processing module receive the interruption that finishes of output data that the DMA interface module sends; Judge whether said interruption is that the m time DMA data exported the interruption that finishes; Inform that primary controller carry out step 308 if then send interrupt response, inform that the primary controller circulation carries out step 305 to step 307 otherwise send interrupt response;
Step 308, primary controller configure hardware accelerator module M, configure hardware accelerator module M adopts the DMA Starting mode to start simultaneously; The DMA interface module is carried out data-moving, starts hardware accelerator module M after accomplishing, hardware accelerator module M operation;
Step 309, interruption processing module receive operation that hardware accelerator M sends interruptions that finish, and then send interruption and inform that primary controller carry out step 310;
Step 310, primary controller configuration DMA interface module output data;
Step 311, interruption processing module receive the interruption that finishes of output data that the DMA interface module sends; Judge that whether said interruption is the interruption that finishes of the n time DMA output data; Inform that primary controller carry out step 312 if then send interrupt response, interrupt informing that the primary controller circulation carries out step 308 to step 311 otherwise send;
(M+1≤Y≤N), configure hardware accelerator module Y adopts the DMA Starting mode to start simultaneously for step 312, primary controller configure hardware accelerator module Y;
Step 313, interruption processing module receive operation that hardware accelerator Y the sends interruption that finishes; Interruption processing module judges whether to send for hardware accelerator N simultaneously; Interrupt informing that primary controller carry out step 314 if then send, interrupt informing primary controller circulation the carrying out operation of step 312 otherwise send;
Step 314, primary controller configuration DMA interface module output data;
Step 315, interruption processing module receive the interruption that finishes of output data that the DMA interface module sends.This time multimode is repeatedly called end.
Called hardware accelerator m+n+2 time altogether in the present embodiment, reduced the DNA that is sent to primary controller and interrupted m+n+2 time.If present embodiment is a situation of handling a sub-frame when PDSCH (Physical Downlink Share Channel Physical Downlink Shared Channel) single antenna receives among the LTE (Long-Term Evolution Long Term Evolution project); The subframe that is used for downlink transfer when supposing the reception of two antennas has 7; When handling a frame (10ms) data so, should handle so DMA to interrupt being that 14 (m+n+2) are inferior.Will reduce the DMA interruption once and whenever carry out a module invokes in the present invention; Can handle frame data according to above step so can reduce DMA to interrupt 7 (m+n+2) inferior; This shows according to the inventive method and can reduce the interruption times that DMA gives primary controller, simplified greatly on the software, reduced complexity on the software the call operation of system module.
Device embodiment
Device embodiment of the present invention is as shown in Figure 4; This device comprises primary controller module, interruption processing module, DMA interface module, at least 1 hardware accelerator module; Wherein, the primary controller module is used to dispose DMA interface module and hardware accelerator module and realizes the input and output of data according to the interrupt response control that interruption processing module is sent.Primary controller can be microprocessor MCU or digital signal processor DSP.
Interruption processing module is used to receive each look-at-me of DMA interface module and hardware accelerator module transmission, and gives the primary controller module with its interrupt response that receives;
DMA interface module: comprise the data transmission interface that links to each other with each hardware accelerator module, the interface that links to each other with the interrupt response module and the control interface that links to each other with primary controller, mainly accomplish data-moving between each hardware accelerator module and handle and in time send or respond corresponding interruption and give interruption processing module.
Hardware accelerator module: comprise that the interface module, computing module of hardware accelerator and DMA start module, be used to realize the processing operation of data and start, and send look-at-me and give interruption processing module according to the DMA Starting mode.
Further, the device of above-mentioned module invokes interruption processing module wherein also comprises judge module, is used for the said interruption that receives is judged.When receiving an interruption, need carry out the judgement of interrupt type and the judgement of interruption times, interrupt type comprises the interruption of DMA interface module transmission and the interruption that hardware accelerator module is sent; Interruption times refers to operation that hardware accelerator that interruption processing module receives sends and finishes and interrupt output data with the transmission of the DMA interface module interruption times that finishes.
Further, the DMA interface module also comprises the interruption sending module, is used to send DMA and interrupts to hardware accelerator module, starts hardware accelerator module and moves according to the DMA Starting mode.
Further; DMA in the hardware accelerator starts module and comprises that DMA starts interface and DMA interrupts receiving interface; Said DMA starts interface and is connected with primary controller, by primary controller selection of configuration Starting mode, promptly can select primary controller to start or the DMA startup; Select DMA to start in embodiments of the present invention, but also can compatible common primary controller Starting mode.DMA interrupts receiving interface and links to each other with the DMA interface module, is used for the DMA IE hardware accelerator that sends according to the DMA interface module.
In the present embodiment, all hardware accelerator module all can directly start operation through the DMA interrupt mode, does not start through primary controller, thereby has reduced the complexity of the operating process of primary controller.
The obviously clear and understanding of those of ordinary skill in the art, the above embodiment that the method and apparatus of data transmission of the present invention is lifted only is used to explain the method and apparatus of data transmission of the present invention, and is not limited to the method and apparatus of data transmission of the present invention.Though effectively described the method and apparatus of data transmission of the present invention through embodiment, those of ordinary skills know that there are many variations in the method and apparatus of data transmission of the present invention and do not break away from spirit of the present invention.Under the situation of the spirit of the method and apparatus that does not deviate from data transmission of the present invention and essence thereof; Those skilled in the art work as can make various corresponding changes or distortion with device according to the method for the invention, but these corresponding claim protection domains that change or be out of shape the method and apparatus that all belongs to data transmission of the present invention.