CN102694600A - Realization method for gain correction and digital ALC of GSM digital fiber-optic repeater - Google Patents

Realization method for gain correction and digital ALC of GSM digital fiber-optic repeater Download PDF

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CN102694600A
CN102694600A CN2012101773864A CN201210177386A CN102694600A CN 102694600 A CN102694600 A CN 102694600A CN 2012101773864 A CN2012101773864 A CN 2012101773864A CN 201210177386 A CN201210177386 A CN 201210177386A CN 102694600 A CN102694600 A CN 102694600A
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digital
gain
power
alc
module
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CN102694600B (en
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杜方
胡颖
胡志永
张启东
李康峰
陈令山
张笑傲
陶林
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Allwin Telecommunication Co Ltd
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Allwin Telecommunication Co Ltd
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Abstract

The invention provides a realization method for gain correction and digital ALC (Automatic Level Control) of a GSM (Global System for Mobile Communications) digital fiber-optic repeater, which belongs to the field of telecommunication, has the advantages of high response speed and accuracy in control and flexibility and solves the problems in the prior art. In order to realize the purposes, the technical scheme adopted by the method is that a mid-frequency front-end gain correction module, a power statistics module, a threshold judgment and attenuation control module and a mid-frequency rear-end gain correction module are added in a digital mid-frequency processing unit.

Description

The implementation method of GSM digital optical fiber direct station gain correction and digital ALC
Technical field
the invention belongs to technical field of telecommunications, relate in particular to the implementation method of a kind of GSM digital optical fiber direct station gain correction and digital ALC.
Background technology
repeater belongs to the repeater in the communication system, accomplishes the transmission that signal between the base station (up) is arrived to travelling carriage (descending) and travelling carriage in the base station, covers the blind area and the weak district of signal, and accomplishes the purpose of amplifying uplink and downlink signals.The gain of repeater and peak power output all have certain limit; After gain is confirmed; For the excessive modulus switching device that causes of the power that prevents input signal saturated; Need a kind of reliable mechanism, make to arrive modulus switching device signal amplitude before in certain scope, guarantee that modulus switching device does not overflow.After the front end amplitude is effectively controlled; Need a kind of gain balance mechanism in FPGA (field programmable gate array) inside; Gain and the power output of guaranteeing each frequency of frequency selecting repeater all satisfy system index, and can play the purpose of regulating repeater gain and power output size.
(Global System for Mobile Communications---global system for mobile communications) is frequency division duplex system, with different frequency separation uplink and downlink signals; It is 8 time slots that the basic frame of GSM is divided into, and distinguishes the user with different time slots, and the power of each time slot has nothing in common with each other, so need each input power constantly of geo-statistic quick and precisely.The power statistic module is sent the power maximum that counts on into threshold judgement and decay control module in real time, and compares with threshold value, decides the pad value that increases or reduce the decay chip, reaches the purpose of restriction digital high-frequency amplification station input signal amplitude.
have general employing of repeater ALC (automatic electric-level control) now and simulate ALC, and simulation ALC hardware cost is higher, and response speed is slow, control is accurate inadequately, has satisfied not the needs of communications industry fast development.
Summary of the invention
the present invention is exactly to the problems referred to above, provides a kind of response speed fast, and control accurately, GSM digital optical fiber direct station gain is flexibly revised and the implementation method of digital ALC.
For realizing above-mentioned purpose, the present invention adopts following technical scheme, and the present invention adds intermediate frequency front-end gain correcting module, power statistic module, threshold judgement and decay control module and intermediate frequency rear end gain correcting module in the Digital IF Processing unit;
said intermediate frequency front-end gain correcting module is accomplished the IQ data after the FIR frequency-selecting is carried out multiplying; The multiplier factor of the performance number configuration front end multiplier of each working channel that shows through host computer decides the increase of IQ data or reduces, and revised IQ data obtain gaining.
said power statistic module is carried out quadratic sum to the revised IQ data that gain and is handled; The input power of each working channel of real-time statistics; The numerical value of input power of each working channel after the statistics is delivered to MCU (single-chip microcomputer) administrative unit, and the MCU administrative unit is mapped to performance number with the numerical value of collecting through wattmeter and is delivered to said host computer and shows and obtain the host computer show value; And the maximum of the input power after will adding up is delivered to threshold judgement and decay control module.
The maximum of said threshold judgement and the input power of decay control module after with said statistics compares with the high threshold ones of MCU configuration: if the maximum of the input power after the statistics is greater than wealthy family's limit value of MCU configuration, and the attenuation amplitude of increase attenuator; If the maximum of the input power after the statistics less than the threshold ones of MCU configuration, reduces the attenuation amplitude of attenuator.
Gain correcting module in said intermediate frequency rear end carries out multiplying to the revised IQ data of said gain through the Back end data of CIC interpolation, Digital Up Convert, and the multiplier factor through host computer configuration multiplier decides the amplification of Back end data or reduces.
as a kind of preferred version, and if the according to the invention maximum of the input power after the statistics is greater than wealthy family's limit value of MCU configuration, and the high threshold counter begins counting, if several times high-power occur continuously, increases the attenuation amplitude of attenuator; If the maximum of the input power after the statistics is less than the threshold ones of MCU configuration, the low threshold counter begins counting, if the small-power of continuous several times occurs, reduces the attenuation amplitude of attenuator.
as another kind of preferred version, and are according to the invention if occur continuous 6 times high-powerly, increase the attenuation amplitude of attenuator; If continuous 4500 times small-power occurs, reduce the attenuation amplitude of attenuator.
as another kind of preferred version, the step-length that reduces the attenuation amplitude of attenuator according to the invention is set to open the control degree of depth and after 4, adds 1 again.
when threshold judgement according to the invention and decay control module detect the thresholding indication set of AD (modulus) conversion, increase the attenuation amplitude of attenuator as another kind of preferred version.
As another kind of preferred version, the threshold settings of AD conversion according to the invention is P Single + 10lgN, P Single The peak power output of expression single carrier, N representes the carrier number of repeater real work.
as another kind of preferred version, power statistic module according to the invention is accomplished descending BCCH (broadcasting control) power statistic of channel and the statistics of descending input gross power, and statistic is shown through host computer.
are as another kind of preferred version; Threshold judgement according to the invention and decay control module receive after ATT (stepping decay) is provided with; Said high threshold counter and low threshold counter are carried out clear operation, give attenuator with the synthetic pad value of ATT and ALC again and decay.
secondly, attenuator according to the invention adopts PE4309 decay chip.
in addition, intermediate frequency front-end gain correcting module according to the invention, power statistic module, threshold judgement and decay control module and intermediate frequency rear end gain correcting module are provided with and operate through FPGA.
beneficial effect of the present invention: the present invention adds intermediate frequency front-end gain correcting module, power statistic module, threshold judgement and decay control module and intermediate frequency rear end gain correcting module in the Digital IF Processing unit; The digital ALC function of digital optical fiber direct station be can accomplish reliably, and the gain and the power index of repeater guaranteed.
and, compare simulation ALC, response speed of the present invention is faster, control more accurately, the economize on hardware cost.
secondly, the present invention disposes the power output thresholding of complete machine through host computer, ALC is more flexible than simulation.
in addition, the present invention has realized that through intermediate frequency front-end gain correcting module and the intermediate frequency rear end correcting module that gains the gain of each frequency and power output are adjustable.
Description of drawings
further specify the present invention below in conjunction with accompanying drawing and embodiment.Protection range of the present invention not only is confined to the statement of following content.
Fig. 1 adopts remote termination up link sketch map of the present invention.
Fig. 2 adopts near-end machine up link sketch map of the present invention.
Fig. 3 is a power statistic module principle block diagram of the present invention.
Fig. 4 is threshold judgement of the present invention and decay control module theory diagram.
Embodiment
are as shown in the figure; With regard to the direct end uplink link for example; The upward signal that digital fiber remote termination donor antenna receiving mobile sends; Arrive the near-end machine through using the CPRI agreement after cavity duplexer, LNA, frequency converter unit, the digital intermediate frequency cell processing through Optical Fiber Transmission, pass through Digital IF Processing unit, frequency converter unit and dielectric duplexer again, arrive the base station through antenna transmission.The present invention adds four functional modules in the Digital IF Processing unit: intermediate frequency front-end gain correcting module, power statistic module, threshold judgement and decay control module and intermediate frequency rear end gain correcting module.
as shown in the figure 1,2; Comprise radio frequency attenuator, frequency converter (down-conversion), modulus switching device (A/D), FPGA, digital-to-analogue conversion device (D/A) and frequency converter (up-conversion), and comprise inner residing position of each functional module of FPGA and interaction relationship among the present invention.The inner processing of digital signal and the transparent transmission of baseband signal accomplished of FPGA.
Radio frequency attenuator can adopt the PE4309 attenuator that walks abreast among the present invention, and the attenuation steps of this device is 0.5dB, and the switching speed response time is 1us.Modulus switching device can be used the AD80206 of ADI company, and it has the thresholding deixis.
are done further elaboration below in conjunction with accompanying drawing with the realization details of each module among the present invention.
1, front-end gain correcting module.
radiofrequency signal is after inverter converts is intermediate-freuqncy signal;, AD gets into FPGA after converting digital signal into; Convert baseband signal into through Digital Down Convert (DDC) again; Through CIC extraction, FIR filtering data transfer rate is reduced to 0.96Msps, get into the front-end gain amending unit then.The multiplier clock that the front-end gain amending unit is used is 122.88MHz, considers sequence problem and resource problem, and the IQ two paths of data is used a multiplier respectively, realizes multichannel gain correction through multiplier is multiplexing.The power information that this module needs to be passed to each passage of host computer by the power statistic module is confirmed correction value.This module is positioned at ALC and opens before the control, thus to its increase or the setting that decays only influential to the gain of repeater, do not influence the power output of repeater.The benefit that adds the gain correcting module herein is: handle if behind the ALC processing unit, carry out gain balance; And when the gain compensation value saltus step is very big; The inconsistent problem of up peak power output can occur, adding the gain correcting module here can address this problem.
2, power statistic module.
The power statistic module is asked quadratic sum I to the revised IQ data that gain 2 + Q 2 Computing, and all choose the maximum power value in a plurality of passages after each computing, it is delivered to the threshold judgement module.Because this moment, FPGA internal data rate was 0.96Msps, so the cycle of power maximum output is approximately 1.04us.This module also needs the numerical value of the input power of each frequency is delivered to the MCU administrative unit, and the MCU administrative unit is mapped to performance number with the numerical value of collecting through wattmeter and is delivered to host computer and shows, disposes the gain correction value of intermediate frequency front end through show value.In down link, this module also need be accomplished the power statistic of descending BCCH channel and the statistics of descending input gross power.Multichannel performance number is carried out summation operation, can characterize the gross power of descending input signal.This numerical value is shown through host computer, can help the field adjustable personnel to grasp field conditions, instruct net suspension mode.
3, threshold judgement and decay control module.
threshold judgement and decay control module are mainly accomplished maximum that the power statistic module is passed over and are compared with the high threshold ones that MCU disposes.If the power statistic value is greater than wealthy family's limit value of MCU configuration, the high threshold counter begins counting, if several times high-power occur continuously, then increases the attenuation amplitude of attenuator; If the power statistic value is less than the threshold ones of MCU configuration, the low threshold counter begins counting, if the small-power of continuous several times occurs, then reduces the attenuation amplitude of attenuator.The port number of being opened in the high low threshold of MCU configuration and the actual use is corresponding one by one, and corresponding relation is P Many =P Single – 10lgN.P wherein Many The peak power output of every carrier wave when multicarrier is opened in the expression repeater, P Single The peak power output of expression single carrier, N representes the carrier number of repeater real work.
are if there is high-power signal in unselected frequency in the repeater; Then can't accomplish power statistic to large-signal; So threshold judgement and decay control module also need a kind of reliable mechanism to guarantee that modulus switching device does not overflow, and use the thresholding deixis of AD and can accomplish this function.When detecting the high threshold indication set of AD, then need increase the attenuation amplitude of attenuator; When detecting the low threshold indication set of AD, then need reduce the attenuation amplitude of attenuator.Because the detection mode of AD is the voltage detection, so use this kind mode, need be P with the threshold settings of AD Single + 10lgN, promptly the single carrier maximum power threshold value than the MCU configuration exceeds more than the 10lgNdB, guarantees that AD indication control and power threshold control can not take place simultaneously.
The stability and the reliability of control opened in in order to ensure ALC; It is very crucial that rational time decision is set; Through program debugging and a large amount of checking, the counts of ALC high threshold counter is set to 6 times among the present invention, promptly whenever detects continuous 6 signals greater than wealthy family's limit value; Just increase the pad value of PE4309, the time that is scaled is the cycle to adjudicate the pad value that whether increases attenuator with 6.24us approximately promptly.Normal demodulation in order to ensure each time slot signal of GSM; Need guarantee the action that in the basic frame of GSM, signal strength signal intensity repeatedly do not increased and decays; And need guarantee to open the speed of control; So the counts of the low threshold counter of ALC is set to 4500 times, the time of being converted into is 4.68ms, and promptly continuous detecting is approximately after time of a basic frame of GSM the pad value whether decision again reduces the decay chip.Because it is slower to reduce the time of pad value, fast quick-recovery normal signal when opening under the control thresholding in order to return in performance number should be confirmed according to opening the control degree of depth so reduce the step-length of pad value.The step-length that reduces pad value among the present invention is set to open the control degree of depth and after 4, adds 1 again; For example, opening the control degree of depth when opening control is 16dB, and when reducing pad value, primary step-length is 16/4+1=5, and secondary step-length is (16-5)/4+1=3, and step-length for the third time is (16-5-3)/4+1=3, and the rest may be inferred.
decay chip PE4309 is except the function of accomplishing digital ALC; Also need accomplish the function of ATT; In order after opening control, can also ATT to be set to the repeater; Need to above-mentioned height threshold counter carry out clear operation when then ATT being set at every turn, give the decay chip with the synthetic pad value of ATT and ALC again and decay.
4, rear end gain correcting module.
With regard to the direct end uplink link, remote termination is packed the IQ data after the digital ALC, utilizes the digital light module to be sent to the near-end machine through the CPRI agreement .The signal processing flow of near-end machine mainly comprises CIC interpolation, Digital Up Convert (DUC), closes road and semi-band filter, then data is sent into digital-to-analogue conversion (D/A) unit.Add rear end gain correcting module in number after the frequency conversion, the inner data transfer rate of FPGA this moment becomes 30.72Msps, utilize clock rate for the multiplier of 122.88MHz can realize four times multiplexing.Multiplier factor through host computer configuration multiplier decides the amplification of IQ data or reduces.This module is positioned at ALC and opens after the control, so the gain that it increases or the setting that decays had both influenced the repeater also influenced the power output of repeater.Read the power information of each working frequency points of repeater through spectrum analyzer, this module can be accomplished the power back-off to each working frequency points of repeater, guarantees the consistency of each frequency power output.
it is understandable that; More than about specific descriptions of the present invention; Only be used to the present invention is described and be not to be subject to the described technical scheme of the embodiment of the invention; Those of ordinary skill in the art should be appreciated that still and can make amendment or be equal to replacement the present invention, to reach identical technique effect; As long as satisfy the use needs, all within protection scope of the present invention.

Claims (10)

1.GSM the digital optical fiber direct station gain is revised and the implementation method of digital ALC, it is characterized in that adding intermediate frequency front-end gain correcting module, power statistic module, threshold judgement and decay control module and intermediate frequency rear end gain correcting module in the Digital IF Processing unit;
Said intermediate frequency front-end gain correcting module is accomplished the IQ data after the FIR frequency-selecting is carried out multiplying; The multiplier factor of the performance number configuration front end multiplier of each working channel that shows through host computer decides the increase of IQ data or reduces, and revised IQ data obtain gaining;
Said power statistic module is carried out quadratic sum to the revised IQ data that gain and is handled; The input power of each working channel of real-time statistics; The numerical value of input power of each working channel after the statistics is delivered to the MCU administrative unit, and the MCU administrative unit is mapped to performance number with the numerical value of collecting through wattmeter and is delivered to said host computer and shows and obtain the host computer show value; And the maximum of the input power after will adding up is delivered to threshold judgement and decay control module;
The maximum of said threshold judgement and the input power of decay control module after with said statistics compares with the high threshold ones that MCU disposes:
If the maximum of the input power after the statistics greater than wealthy family's limit value of MCU configuration, increases the attenuation amplitude of attenuator;
If the maximum of the input power after the statistics less than the threshold ones of MCU configuration, reduces the attenuation amplitude of attenuator;
Gain correcting module in said intermediate frequency rear end carries out multiplying to the revised IQ data of said gain through the Back end data of CIC interpolation, Digital Up Convert, and the multiplier factor through host computer configuration multiplier decides the amplification of Back end data or reduces.
2. gain is revised and the implementation method of digital ALC according to the said GSM digital optical fiber direct station of claim 1; It is characterized in that said if wealthy family's limit value that the maximum of the input power after the statistics disposes greater than MCU; The high threshold counter begins counting; If several times high-power occur continuously, increase the attenuation amplitude of attenuator;
If the maximum of the input power after the statistics is less than the threshold ones of MCU configuration, the low threshold counter begins counting, if the small-power of continuous several times occurs, reduces the attenuation amplitude of attenuator.
3. gain is revised and the implementation method of digital ALC according to the said GSM digital optical fiber direct station of claim 2, it is characterized in that said if occur continuous 6 times high-powerly, increases the attenuation amplitude of attenuator; If continuous 4500 times small-power occurs, reduce the attenuation amplitude of attenuator.
4. according to the implementation method of claim 1 said GSM digital optical fiber direct station gain correction and digital ALC, it is characterized in that the said step-length that reduces the attenuation amplitude of attenuator is set to open the control degree of depth and after 4, adds 1 again.
5. according to the implementation method of claim 1 said GSM digital optical fiber direct station gain correction and digital ALC, when it is characterized in that said threshold judgement and decay control module detect the thresholding indication set of AD conversion, increase the attenuation amplitude of attenuator.
6. according to the implementation method of claim 5 said GSM digital optical fiber direct station gain correction and digital ALC, it is characterized in that the threshold settings of said AD conversion is P Single+ 10lgN, P SingleThe peak power output of expression single carrier, N representes the carrier number of repeater real work.
7. gain is revised and the implementation method of digital ALC according to the said GSM digital optical fiber direct station of claim 1; It is characterized in that said power statistic module accomplishes the power statistic of descending BCCH channel and the statistics of descending input gross power, and statistic is shown through host computer.
8. gain is revised and the implementation method of digital ALC according to the said GSM digital optical fiber direct station of claim 1; After it is characterized in that said threshold judgement and decay control module receive the ATT signalization; Said high threshold counter and low threshold counter are carried out clear operation, give attenuator with the synthetic pad value of ATT and ALC again and decay.
9. according to the implementation method of claim 1 said GSM digital optical fiber direct station gain correction and digital ALC, it is characterized in that said attenuator adopts PE4309 decay chip.
10. according to the implementation method of claim 1 said GSM digital optical fiber direct station gain correction and digital ALC, it is characterized in that said intermediate frequency front-end gain correcting module, power statistic module, threshold judgement and decay control module and intermediate frequency rear end gain correcting module are provided with and operate through FPGA.
CN201210177386.4A 2012-06-01 2012-06-01 GSM digital optical fiber direct station gain-boosted op amp and the implementation method of numeral ALC Expired - Fee Related CN102694600B (en)

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