CN102694075A - Method of preparing inclined silicon nanowire array in electric field - Google Patents

Method of preparing inclined silicon nanowire array in electric field Download PDF

Info

Publication number
CN102694075A
CN102694075A CN2012101914754A CN201210191475A CN102694075A CN 102694075 A CN102694075 A CN 102694075A CN 2012101914754 A CN2012101914754 A CN 2012101914754A CN 201210191475 A CN201210191475 A CN 201210191475A CN 102694075 A CN102694075 A CN 102694075A
Authority
CN
China
Prior art keywords
electric field
nanowire array
silicon
silicon nanowire
minutes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2012101914754A
Other languages
Chinese (zh)
Inventor
胡俊青
李文尧
李高
刘倩
彭彦玲
薛雅芳
蒋林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Donghua University
Original Assignee
Donghua University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Donghua University filed Critical Donghua University
Priority to CN2012101914754A priority Critical patent/CN102694075A/en
Publication of CN102694075A publication Critical patent/CN102694075A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Silicon Compounds (AREA)
  • Weting (AREA)

Abstract

The invention relates to a method for preparing an inclined silicon nanowire array in an electric field. The method comprises the steps of: 1) sequentially using deionized water, alcohol and acetone to ultrasonically wash a silicon wafer for 5-20 minutes, placing the silicon wafer in oxidant solution for soaking for 5-30 minutes after the silicon wafer is washed with deionized water, and then transferring the silicon wafer into hydrofluoric acid solution for soaking for 1-10 minutes to obtain the washed silicon wafer; and 2) placing the washed silicon wafer in etching liquid, adding an external uniform electric field, heating to 40-90DEG C under normal pressure and keeping the temperature to be constant for 30-90 minutes; and finally using concentrated nitric acid solution to remove silver nanoparticles and conducting vacuum drying to obtain the inclined silicon nanowire array. The preparation method provided by the invention has the advantages that the cost is low, the operation is simple, the light trapping effect and the photoelectric conversion efficiency of the obtained inclined silicon nanowire array are higher than the light trapping effect and the photoelectric conversion efficiency of the vertical silicon nanowire array, and the application scope of silicon semiconductors in photoelectric nano devices is widened.

Description

The have a down dip preparation method of silicon nanowire array of a kind of electric field
Technical field
The invention belongs to the preparation field of nano material, the have a down dip preparation method of silicon nanowire array of particularly a kind of electric field.
Background technology
At present, for efficient single crystalline Si solar cell, improve the efficient of battery, for example improve carrier lifetime, the optimization of substrate doping and diffusion layer doping content etc. (as carrying on the back the electric field battery) from the physical essence of PN junction; Or the optical property of improvement and raising battery, comprising the transmission of light, absorption and the reflection and the spectral response (as preparing various antireflective coatings or making silicon face texturing etc.) of light, these two kinds of methods all can improve efficiency of solar cell.Its surface reflectivity is one of key factor that influences the solar cell photoelectric conversion efficiency.Improve the reflection that the silicon face structure can reduce light and effectively utilize solar energy.The texturing of solar cell surface can effectively reduce the surface reflectivity of solar cell, and the method that can adopt mainly contains physical etchings and chemical corrosion making herbs into wool face etc.Traditional physics or chemical etching method etching are come out silicon nanowire array perpendicular to substrate.
Summary of the invention
Technical problem to be solved by this invention provides the have a down dip preparation method of silicon nanowire array of a kind of electric field, this method, and preparation method of the present invention is simple to operate, does not need complex device, and is with low cost; The inclination silicon nanowire array that obtains has better sunken luminous effect and higher electricity conversion.
The have a down dip preparation method of silicon nanowire array of a kind of electric field of the present invention comprises:
(1) silicon chip was used deionized water, alcohol, acetone ultrasonic cleaning 5 ~ 20 minutes successively; To remove the organic substance of silicon chip surface; With placing oxidizing agent solution to soak after the washed with de-ionized water again 5 ~ 30 minutes; Then transfer to and soak 1 ~ 10 minute in the hydrofluoric acid solution, to remove the silicon dioxide on top layer, the silicon chip after obtaining cleaning;
(2) silicon chip after the above-mentioned cleaning is placed etching liquid, add uniform electric field then, be heated to 40 ~ 90 ℃ under the normal pressure, and be incubated 30 ~ 90 minutes; After removing Nano silver grain with concentrated nitric acid solution at last, carry out vacuumize, promptly get silicon nanowire array.
The mass fraction 5%~15% of the hydrofluoric acid solution described in the step (1).
Silicon chip described in the step (1) is the p type single crystal silicon sheet, and its resistivity is 1 ~ 10 Ω cm;
Oxidizing agent solution described in the step (1) is H 2SO 4With H 2O 2Mixed liquor, H wherein 2SO 4With H 2O 2Volume ratio be 2:1 ~ 4:1.
Etching liquid described in the step (2) is one or more the aqueous solution in hydrofluoric acid, salt and the hydrogen peroxide solution.
Described salt is one or more in silver salt, molysite, the golden salt.
Described silver salt is a silver nitrate, and its concentration is 0.01 ~ 0.05mol/L.
The concentration of said hydrofluoric acid is 3 ~ 6mol/L, and the concentration of hydrogen peroxide solution is 0.1 ~ 1.0mol/L.
The intensity that adds uniform electric field described in the step (2) is 100 ~ 600V/m.
The present invention is on the basis of electroless metal deposition chemical etching technology and highly doped silicon nano wire; With the p type single crystal silicon sheet is raw material; Experiment parameters such as reactant concentration, time, temperature and electric field strength through the regulation and control chemical etching; Prepare the inclination silicon nanowires, obtain the silicon nanowire array that large tracts of land is evenly distributed.
The novel nano linear array of the present invention's preparation tilts, and nano wire and substrate have certain angle of inclination, and tilt adjustable, has with respect to traditional silicon nanowire array and better falls into luminous effect.Inclination silicon nanowire array of the present invention can be widened the application of monocrystalline silicon in area of solar cell greatly.
Beneficial effect:
(1) preparation method of the present invention is simple to operate, does not need complex device, and is with low cost;
(2) the silicon nanowire array area that obtains of the present invention big, be evenly distributed;
(3) the porous silicon nano-wire array that obtains of the present invention is compared the vertical silicon nanowire array and is had and better fall into luminous effect, has higher electricity conversion, has expanded the application of Si semiconductor at the nano photoelectric device.
Description of drawings
Fig. 1 is the inclination silicon nanowire array ESEM picture of embodiment 1;
Fig. 2 is the transmission electron microscope picture of the single Si nano wire of embodiment 2.
Embodiment
Below in conjunction with specific embodiment, further set forth the present invention.Should be understood that these embodiment only to be used to the present invention is described and be not used in the restriction scope of the present invention.Should be understood that in addition those skilled in the art can do various changes or modification to the present invention after the content of having read the present invention's instruction, these equivalent form of values fall within the application's appended claims institute restricted portion equally.
The present invention adopts chemical etching technology, after the processing of p type single crystal silicon sheet silicon chip is ultrasonic through a series of surface and oxidizing agent solution, under near the condition of room temperature in chemical etching liquid insulation reaction a period of time, preparation inclination silicon nanowire array.
Embodiment 1
Silicon chip is passed through successively ultrasonic cleaning such as deionized water, alcohol, acetone 5 minutes, immerse oxidizing agent solution (H 2SO 4: H 2O 2After (volume ratio)=2:1) 10 minutes, use the deionized water cleaning silicon chip, using mass fraction is 7% hydrofluoric acid solution corrosion of silicon 3 minutes; Insert then in the etching liquid of hydrofluoric acid (4.6M) and silver nitrate (0.04M); Be heated to 60 ℃ under the normal pressure, add the uniform electric field of 600V/m and be incubated 50 minutes, remove Nano silver grain with concentrated nitric acid solution at last; Vacuumize can make a kind of inclination silicon nanowires.
Embodiment 2
Silicon chip is passed through successively ultrasonic cleaning such as deionized water, alcohol, acetone 10 minutes, immerse oxidizing agent solution (H 2SO 4: H 2O 2After (volume ratio)=2:1) 7 minutes, use the deionized water cleaning silicon chip, using mass fraction is 5% hydrofluoric acid solution corrosion of silicon 5 minutes; Insert then in the etching liquid of hydrofluoric acid (4.8M), silver nitrate (0.02M) and hydrogen peroxide solution (0.2M); Be heated to 60 ℃ under the normal pressure, add the uniform electric field of 300V/m and be incubated 60 minutes, remove Nano silver grain with concentrated nitric acid solution at last; Vacuumize can make a kind of inclination silicon nanowires.
Embodiment 3
Silicon chip is passed through successively ultrasonic cleaning such as deionized water, alcohol, acetone 15 minutes, immerse oxidizing agent solution (H 2SO 4: H 2O 2After (volume ratio)=2:1) 10 minutes, use the deionized water cleaning silicon chip, using mass fraction is 10% hydrofluoric acid solution corrosion of silicon 5 minutes; Insert then in the etching liquid of hydrofluoric acid (5M) and silver nitrate (0.03M); Be heated to 70 ℃ under the normal pressure, add the uniform electric field of 100V/m and be incubated 40 minutes, remove Nano silver grain with concentrated nitric acid solution at last; Vacuumize can make a kind of inclination silicon nanowires.
Embodiment 4
Silicon chip is passed through successively ultrasonic cleaning such as deionized water, alcohol, acetone 20 minutes, immerse oxidizing agent solution (H 2SO 4: H 2O 2After (volume ratio)=2:1) 10 minutes, use the deionized water cleaning silicon chip, using mass fraction is 6% hydrofluoric acid solution corrosion of silicon 1 minute; Insert then in the etching liquid of hydrofluoric acid (4.6M), silver nitrate (0.03M) and hydrogen peroxide solution (0.2M); Add under the uniform electric field normal pressure of 300V/m and be heated to 70 ℃, and be incubated 60 minutes, remove Nano silver grain with concentrated nitric acid solution at last; Vacuumize can make a kind of inclination silicon nanowires.

Claims (9)

1. the electric field preparation method of silicon nanowire array that has a down dip comprises:
(1) silicon chip was used deionized water, alcohol, acetone ultrasonic cleaning 5 ~ 20 minutes successively, with placing oxidizing agent solution to soak after the washed with de-ionized water again 5 ~ 30 minutes, then transfer to and soak 1 ~ 10 minute in the hydrofluoric acid solution, the silicon chip after obtaining cleaning;
(2) silicon chip after the above-mentioned cleaning is placed etching liquid, add uniform electric field then, be heated to 40 ~ 90 ℃ under the normal pressure, and be incubated 30 ~ 90 minutes; It is dry to remove the Nano silver grain final vacuum with concentrated nitric acid solution at last, promptly gets.
2. the have a down dip preparation method of silicon nanowire array of a kind of electric field according to claim 1 is characterized in that: the mass fraction 5% ~ 15% of the hydrofluoric acid solution described in the step (1).
3. the have a down dip preparation method of silicon nanowire array of a kind of electric field according to claim 1, it is characterized in that: the resistivity of the silicon chip described in the step (1) is 1 ~ 10 Ω cm.
4. the have a down dip preparation method of silicon nanowire array of a kind of electric field according to claim 1, it is characterized in that: the oxidizing agent solution described in the step (1) is H 2SO 4With H 2O 2Mixed liquor, H wherein 2SO 4With H 2O 2Volume ratio be 2:1 ~ 4:1.
5. the have a down dip preparation method of silicon nanowire array of a kind of electric field according to claim 1 is characterized in that: the etching liquid described in the step (2) is one or more the aqueous solution in hydrofluoric acid, salt and the hydrogen peroxide solution.
6. the have a down dip preparation method of silicon nanowire array of a kind of electric field according to claim 5, it is characterized in that: described salt is one or more in silver salt, molysite, the golden salt.
7. the have a down dip preparation method of silicon nanowire array of a kind of electric field according to claim 6, it is characterized in that: described silver salt is a silver nitrate, its concentration in etching liquid is 0.01 ~ 0.05mol/L.
8. the have a down dip preparation method of silicon nanowire array of a kind of electric field according to claim 5, it is characterized in that: the concentration of described hydrofluoric acid is 3 ~ 6mol/L, the concentration of hydrogen peroxide solution is 0.1 ~ 1.0mol/L.
9. the have a down dip preparation method of silicon nanowire array of a kind of electric field according to claim 1, it is characterized in that: the intensity that adds uniform electric field described in the step (2) is 100 ~ 600V/m.
CN2012101914754A 2012-06-12 2012-06-12 Method of preparing inclined silicon nanowire array in electric field Pending CN102694075A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2012101914754A CN102694075A (en) 2012-06-12 2012-06-12 Method of preparing inclined silicon nanowire array in electric field

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2012101914754A CN102694075A (en) 2012-06-12 2012-06-12 Method of preparing inclined silicon nanowire array in electric field

Publications (1)

Publication Number Publication Date
CN102694075A true CN102694075A (en) 2012-09-26

Family

ID=46859421

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2012101914754A Pending CN102694075A (en) 2012-06-12 2012-06-12 Method of preparing inclined silicon nanowire array in electric field

Country Status (1)

Country Link
CN (1) CN102694075A (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102956548A (en) * 2012-11-09 2013-03-06 华中科技大学 Electric field aided silicon through hole etching process
CN103050378A (en) * 2012-11-19 2013-04-17 华北电力大学 Preparation method of silicon nanowire arrays easy in realizing large-area separation
CN103332649A (en) * 2013-06-20 2013-10-02 西安理工大学 Preparation method of polyvinylidene fluoride with one-dimensional nanowire array structure
CN103903977A (en) * 2014-03-20 2014-07-02 武汉新芯集成电路制造有限公司 Etching method
CN103894620A (en) * 2014-03-03 2014-07-02 上海富信新能源科技有限公司 Method for manufacturing nano silver wire
CN104818532A (en) * 2015-04-14 2015-08-05 杭州电子科技大学 Method for preparing silicon nanostructured material based on external electric field
CN105671491A (en) * 2016-04-15 2016-06-15 天津科技大学 Method for controllable preparation of multi-level Bi-Sb-Te inclined column array by adoption of evaporation coating
CN105845785A (en) * 2016-06-21 2016-08-10 商丘师范学院 Method for preparing crystal silicon nanometer structure antireflection layer
CN106927421A (en) * 2017-01-22 2017-07-07 杭州电子科技大学 The method for manufacturing the silicon nanowires of controllable trend
CN107118774A (en) * 2017-04-11 2017-09-01 枣庄学院 A kind of method for preparing constant tilt angle silicon nanowire structure
CN107193068A (en) * 2017-06-27 2017-09-22 常州瑞丰特科技有限公司 The method that hole distribution manufactures balzed grating, is manipulated using electric field
CN107634005A (en) * 2017-09-13 2018-01-26 云南大学 A kind of method that silicon nanowire array is prepared based on metal Assisted Chemical Etching Process technology
CN109324090A (en) * 2017-07-31 2019-02-12 天津大学 One-dimensional silicon based array micro-structure and preparation method thereof and the application in gas sensor
CN110306243A (en) * 2018-03-20 2019-10-08 苏州大学 A kind of preparation method of silicon nano-pillar

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011028054A2 (en) * 2009-09-03 2011-03-10 한국표준과학연구원 Production method for a silicon nanowire array using a porous metal thin film
CN102040192A (en) * 2009-10-20 2011-05-04 中国科学院理化技术研究所 Method for preparing sequentially arranged bent silicon nano-wire array
CN102079506A (en) * 2009-11-30 2011-06-01 中国科学院理化技术研究所 Preparation method of bent silicon nanowire array with changeable direction

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011028054A2 (en) * 2009-09-03 2011-03-10 한국표준과학연구원 Production method for a silicon nanowire array using a porous metal thin film
CN102040192A (en) * 2009-10-20 2011-05-04 中国科学院理化技术研究所 Method for preparing sequentially arranged bent silicon nano-wire array
CN102079506A (en) * 2009-11-30 2011-06-01 中国科学院理化技术研究所 Preparation method of bent silicon nanowire array with changeable direction

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
CHEN H. ET AL: ""Wafer-Scale Synthesis of Single-Crystal Zigzag Silicon Nanowire Arrays with Controlled Turning Angles"", 《NANO LETTERS》 *
ZHANG M.L. ET AL: ""Preparation of large-area uniform silicon nanowires arrays through metal-assisted chemical etching"", 《JOURNAL OF PHYSICAL CHEMISTRY C》 *
陈辉辉: ""低掺杂硅纳米线的制备及性能研究"", 《东华大学硕士学位论文》 *

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102956548A (en) * 2012-11-09 2013-03-06 华中科技大学 Electric field aided silicon through hole etching process
CN103050378A (en) * 2012-11-19 2013-04-17 华北电力大学 Preparation method of silicon nanowire arrays easy in realizing large-area separation
CN103050378B (en) * 2012-11-19 2016-01-06 华北电力大学 A kind of preparation method being easy to the silicon nanowire array that large area is separated
CN103332649A (en) * 2013-06-20 2013-10-02 西安理工大学 Preparation method of polyvinylidene fluoride with one-dimensional nanowire array structure
CN103332649B (en) * 2013-06-20 2015-08-26 西安理工大学 A kind of preparation method of polyvinylidene fluoride with one-dimensional nanowire array structure
CN103894620A (en) * 2014-03-03 2014-07-02 上海富信新能源科技有限公司 Method for manufacturing nano silver wire
CN103903977A (en) * 2014-03-20 2014-07-02 武汉新芯集成电路制造有限公司 Etching method
CN104818532B (en) * 2015-04-14 2018-07-27 杭州电子科技大学 A method of silicon nanostructure material is prepared based on extra electric field
CN104818532A (en) * 2015-04-14 2015-08-05 杭州电子科技大学 Method for preparing silicon nanostructured material based on external electric field
CN105671491A (en) * 2016-04-15 2016-06-15 天津科技大学 Method for controllable preparation of multi-level Bi-Sb-Te inclined column array by adoption of evaporation coating
CN105845785A (en) * 2016-06-21 2016-08-10 商丘师范学院 Method for preparing crystal silicon nanometer structure antireflection layer
CN106927421A (en) * 2017-01-22 2017-07-07 杭州电子科技大学 The method for manufacturing the silicon nanowires of controllable trend
CN106927421B (en) * 2017-01-22 2019-04-23 杭州电子科技大学 The method for manufacturing the silicon nanowires controllably moved towards
CN107118774A (en) * 2017-04-11 2017-09-01 枣庄学院 A kind of method for preparing constant tilt angle silicon nanowire structure
CN107193068A (en) * 2017-06-27 2017-09-22 常州瑞丰特科技有限公司 The method that hole distribution manufactures balzed grating, is manipulated using electric field
CN107193068B (en) * 2017-06-27 2020-04-10 常州瑞丰特科技有限公司 Method for manufacturing blazed grating by utilizing electric field to control hole distribution
CN109324090A (en) * 2017-07-31 2019-02-12 天津大学 One-dimensional silicon based array micro-structure and preparation method thereof and the application in gas sensor
CN107634005A (en) * 2017-09-13 2018-01-26 云南大学 A kind of method that silicon nanowire array is prepared based on metal Assisted Chemical Etching Process technology
CN110306243A (en) * 2018-03-20 2019-10-08 苏州大学 A kind of preparation method of silicon nano-pillar

Similar Documents

Publication Publication Date Title
CN102694075A (en) Method of preparing inclined silicon nanowire array in electric field
CN104195645A (en) Acidic texturing solution for etching solar cell silicon wafer, texturing method, solar cell silicon wafer and manufacturing method of solar cell silicon wafer
CN102227002B (en) Polysilicon nanowire solar cell and preparation method thereof
Lee et al. Solar cell implemented with silicon nanowires on pyramid-texture silicon surface
CN104701392A (en) Preparation method of solar battery with low-reflectivity black silicon
CN105568313B (en) Branched semiconductor nano heterojunction photovoltaic pole materials of 3D and preparation method thereof
CN102315113A (en) Solar-battery monocrystalline-silicon floss-making fluid with low volatility and application thereof
CN107611226B (en) A kind of crystalline silicon method for manufacturing textured surface, solar battery and preparation method thereof
CN110767777B (en) Preparation method of laminated solar cell capable of reducing cost and improving conversion efficiency
CN106876595B (en) A kind of silicon heterogenous solar battery of N-type and preparation method thereof
CN204311157U (en) For the silicon chip of solar cell
CN103296141A (en) Method for producing dendritic heterojunction nanowire array structural materials
CN107706248A (en) A kind of silicon nanostructure heterojunction solar battery and preparation method thereof
CN104716209A (en) Solar cell based on silicon substrate nanowire and preparing method thereof
CN106328736B (en) A kind of anti-LID black silicon solars high-efficiency battery and its production method
CN103618025B (en) A kind of crystalline silicon back junction solar battery preparation method
CN204741023U (en) Novel flexible solar panel
CN109768111A (en) A kind of GaAs nano-pillar-graphene schottky junction solar battery and preparation method thereof
US20140360584A1 (en) Manufacturing method of solar cell
CN102593245A (en) Method for preparing high efficient low cost crystalline silicon solar cell
Cheng et al. Investigation of Low‐Cost Surface Processing Techniques for Large‐Size Multicrystalline Silicon Solar Cells
CN105023960A (en) Method of manufacturing antireflection texture of solar cell
Sankarasubramanian et al. Impact of surface texturization on overall performance of mono-crystalline silicon solar cells
CN105428432A (en) Preparation method for porous light-trapping structure on surface of silicon solar cell
CN104835860B (en) Solar cell with double layer passivation layer and preparation method thereof

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C12 Rejection of a patent application after its publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20120926