CN102662605A - Storage device, storage system and storage method based on solid-state storage medium - Google Patents
Storage device, storage system and storage method based on solid-state storage medium Download PDFInfo
- Publication number
- CN102662605A CN102662605A CN2012100581782A CN201210058178A CN102662605A CN 102662605 A CN102662605 A CN 102662605A CN 2012100581782 A CN2012100581782 A CN 2012100581782A CN 201210058178 A CN201210058178 A CN 201210058178A CN 102662605 A CN102662605 A CN 102662605A
- Authority
- CN
- China
- Prior art keywords
- chip array
- array string
- string
- memory device
- storage medium
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 6
- 239000007787 solid Substances 0.000 claims description 17
- 238000003491 array Methods 0.000 claims description 2
- 230000003760 hair shine Effects 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000007726 management method Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
Images
Landscapes
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The invention discloses a storage device, a storage system and a storage method based on a solid-state storage medium, wherein the storage device comprises multiple flash memory chips and a plurality of the flash memory chips are connected in series to form a chip array (string). Each string is connected to a string controller, wherein the string controller comprises a processor unit, a controller unit, an interface unit, and a buffer unit. The interface unit is connected to a host port interface, wherein the interface unit has different types, including a SATA interface, a SAS interface, and a PCIe interface which are used for connecting a host. The strings are connected to the host and configured as logical volumes which can be identified by a host file system, wherein the logical volume maps one string or a plurality of strings. The storage device, the storage system and the storage method provided by the invention have the advantages of configurability, manifesting as a plurality of independent storage devices for the host, capability of configuration as a RAID, and performance of the entire device improving.
Description
Technical field
The present invention relates to a kind of memory device, storage system and storage means based on solid storage medium.
Background technology
Along with the progressively raising of flash memory application technology, the user is also increasingly high to the requirement of equipment read-write speed.The interface bandwidth of single or single pass flash memory device can not satisfy user's demand far away.Therefore, the factory commercial city of nearly all flash memory device and flash controller is in the multichannel flash chip operator scheme of research and development.This its advantage of multichannel flash memory device is and can carries out flash disk operation simultaneously by hyperchannel, can significantly improve the interface bandwidth and the I/O ability of flash memory device.This multichannel flash memory device configuration a plurality of flash controllers; A but simultaneously shared SATA or the PCIe interface with main frame of these a plurality of flash controllers; Therefore at main frame, this multichannel flash memory device still shows as the flash memory device of a single face.This has limited the capacity of flash memory device and the further raising of the bandwidth of handling up to a certain extent.
Application number is that 201010184698.9 Chinese invention patent discloses a kind of multi-interface solid state disk (SSD) and disposal route and system; This invention comprises a plurality of interface control units, command scheduling unit, flash control module and flash chip, realizes the communication scheduling of a plurality of interface control units to flash control module and flash chip through said command scheduling unit.But this system lacks the configuration flexibility to the flash chip.
Summary of the invention
Technical matters to be solved by this invention provides a kind of memory device based on solid storage medium, storage system and storage means, overcomes the interface of existing high capacity, two-forty solid state medium storage system and the not high defective of dirigibility of configuration management.
For solving the problems of the technologies described above; The present invention at first provides a kind of memory device based on solid storage medium, comprises a plurality of flash chips, it is characterized in that; Some said flash chips are composed in series a chip array string; Each said chip array string is connection-core chip arrays string controller respectively, and said chip array string controller comprises processor unit, controller unit, interface unit and buffer unit, and said interface unit connects host bus interface.
Flash chip among the said chip array string is the storage medium of MLC or SLC type.The said chip array string that the flash chip of same MLC or SLC type is formed is called MLC type chip array string or SLC type chip array string respectively.
Said interface unit has dissimilar, comprises the SATA, SAS and the PCIe interface that connect main frame.
Said chip array string is configured to the discernible logical volume of host file system, comprises one or more said chip array string in the said logical volume,
Said chip array string in each said logical volume is single MLC type chip array string or SLC type chip array string.The shared same host bus interface of each said logical volume.
A plurality of said chip array string connect according to the RAID algorithm or with the JBOD mode.
The present invention has proposed a kind of storage system according to described memory device based on solid storage medium simultaneously; It is characterized in that; Said chip array string is connected with main frame; Be configured to the discernible logical volume of host file system, said logical volume shines upon one or more said chip array string
Said chip array string in each said logical volume is single MLC type chip array string or SLC type chip array string.
The shared same host bus interface of each said logical volume.
A plurality of said chip array string connect according to the RAID algorithm or with the JBOD mode.
The invention allows for a kind of storage means of the storage system according to described memory device based on solid storage medium, it is characterized in that, may further comprise the steps:
Use is disposed a plurality of different logical volumes with chip array string according to demand based on the main process equipment drive software of the memory device of chip array string, and each logical volume comprises 1 or a plurality of chip array string;
The device driver software of main frame is issued chip array string controller with configuration information; String is configured to chip array; A plurality of flash chips that single chip array string is comprised are configured to an independently read-write equipment, perhaps a plurality of chip array string are configured to a read-write equipment;
Main frame is configured to the RAID mode with said a plurality of read-write equipments;
When read-write equipment was operated, chip array string controller was resolved instruction, and through control bus controller unit is issued in instruction according to the firmware and the device configuration information of configuration among the ROM or upper strata instruction; Controller unit is resolved to instruction on the control module of corresponding different chip array string; Said control module hangs on the control bus; Accept the instruction manipulation of main frame, and be handed down to different chip array string, accomplish read-write operation for different chip array string.
Difference with general multi-passage flash memory apparatus is; Multi-path-apparatus is that a plurality of passages are operated, and main frame is shown as an independently flash memory device, and the flash memory device of multiple chips array string can be supported a plurality of equipment interfaces; Can show as a plurality of independently flash memory devices to main frame; Many differences with general multi-passage flash memory apparatus are that multi-path-apparatus is that a plurality of passages are operated, and main frame is shown as an independently flash memory device; And the flash memory device of multiple chips array string can be supported a plurality of equipment interfaces; Can show as a plurality of independently flash memory devices to main frame, when a plurality of chip array string were set to same flash memory device, a plurality of chip array string in this equipment can be as the flash memory device of a plurality of passages; The independent parallel operation makes the reading and writing data speed of individual equipment significantly improve.Main frame can be done simply independently to operate for the operation between a plurality of equipment as a plurality of memory devices of general operation, also can a plurality of equipment be arranged to RAID through being provided with, to satisfy user's demand.Like this, make the data security that the performance of memory device has had good lifting and improved equipment.
Description of drawings
Below in conjunction with accompanying drawing and embodiment technical scheme of the present invention is further specified.
Fig. 1 becomes the structural representation of chip array string of the present invention for flash memory chip set.
Fig. 2 forms the structural representation of logical volume and file system logic volume manager for chip array string of the present invention.
Fig. 3 is chip array string and the synoptic diagram that is connected of chip array string controller.
Fig. 4 is chip array string, chip array string controller and the synoptic diagram that is connected of main frame.
Embodiment
As shown in Figure 1; A chip array string is composed in series by some MLC of the same type or SLC Flash chip, and the said chip array string that the flash chip of same MLC or SLC type is formed is called MLC type chip array string or SLC type chip array string respectively.Therefore, there is dissimilar chip array string in the system simultaneously; The quantity of the chip array string of system's support reaches thousands of, the separate system that becomes between a plurality of logical volumes.
As shown in Figure 2, the LVM of host file system can be configured to the discernible logical volume of host file system with chip array string, comprises one or more chip array string in each logical volume.Logical volume 0 comprises chip array string0, chip array string1, chip array string2, is the SLC type.Logical volume x comprises chip array stringM, chip array stringM+1, is the MLC type.In addition, also comprise Redundant chip array string redundancy chip array string, can dynamic replacement when certain chip array string makes mistakes.The storage medium of SLC type is quick and long service life owing to it, and logical volume 0 is connected on the internal bus Intenal Bus0, as system and frequently-used data storage medium.MLC is because its suitable price, and logical volume x is connected on the internal bus Intenal Bus1, as the operation medium of the backup of mass data and the data of seldom wiping.A plurality of chip array string connect according to the RAID algorithm or with the JBOD mode.
Like Fig. 3; And combine shown in Figure 4; Chip array string controller comprises processor unit, controller unit, interface unit and buffer unit; Chip array string0, chip array string1, chip array string2 ..., chip array stringN connects controller unit respectively, interface unit connects host bus interface.Interface unit has dissimilar; Comprise the SATA, SAS and the PCIe interface that connect main frame; Through host bus interface, and under the management of host driven and software systems, memory device be mapped as respectively the manageable equipment of file system 0, equipment 1 ...., equipment N.
Briefly introduce the implementation method of native system below.
The user uses the device driver software based on the memory device of chip array string that equipment is disposed a plurality of different logical volumes according to demand; Each logical volume comprises 1 or a plurality of chip array string.
Device driver software is issued chip array string controller with configuration information, and equipment firmware is configured; A plurality of flash chips that single chip array string is comprised are configured to a separate equipment, perhaps a plurality of chip array string are configured to an equipment; Simultaneously, can a plurality of autonomous devices be configured to RAID through main frame.
As user during to operation of equipment, chip array string controller is resolved instruction, and through control bus controller unit is issued in instruction according to the firmware and the device configuration information of configuration among the ROM or upper strata instruction; Controller unit can comprise the control module of the different chip array string of a plurality of correspondences, and these control modules hang on the control bus, accepts the instruction manipulation of main frame for different chip array string, and is handed down to different chip array string;
In addition, controller also can be accepted the operational order to different chip array string that main frame is sent through the mode of parallel work-flow, parallel instruction is sent to different chip array string.
Advantage of the present invention comprises: 1. configurability; 2. can show as a plurality of independent memory device to main frame; 3. can be configured to RAID, improve the performance of entire equipment.
It should be noted last that; Above embodiment is only unrestricted in order to technical scheme of the present invention to be described; Although with reference to preferred embodiment the present invention is specified, those of ordinary skill in the art should be appreciated that and can make amendment or be equal to replacement technical scheme of the present invention; And not breaking away from the spirit and the scope of technical scheme of the present invention, it all should be encompassed in the middle of the claim scope of the present invention.
Claims (9)
1. memory device based on solid storage medium; Comprise a plurality of flash chips; It is characterized in that some said flash chips are composed in series a chip array string, each said chip array string is connection-core chip arrays string controller respectively; Said chip array string controller comprises processor unit, controller unit, interface unit and buffer unit, and said interface unit connects host bus interface.
2. the memory device based on solid storage medium according to claim 1 is characterized in that said interface unit has dissimilar, comprises the SATA, SAS and the PCIe interface that connect main frame.
3. the memory device based on solid storage medium according to claim 1 and 2 is characterized in that said controller unit comprises the control module of the different chip array string of a plurality of correspondences, and said control module hangs on the host computer control bus.
4. the memory device based on solid storage medium according to claim 3 is characterized in that, the flash chip among the said chip array string is the storage medium of MLC or SLC type.
5. the storage system of the memory device based on solid storage medium according to claim 4; It is characterized in that; Said chip array string is connected with main frame; Be configured to the discernible logical volume of host file system, said logical volume shines upon one or more said chip array string.
6. the storage system of the memory device based on solid storage medium according to claim 5 is characterized in that the said chip array string in each said logical volume is single MLC type chip array string or SLC type chip array string.
7. the storage system of the memory device based on solid storage medium according to claim 6 is characterized in that the shared same host bus interface of each said logical volume.
8. the storage system of the memory device based on solid storage medium according to claim 7 is characterized in that a plurality of said chip array string connect according to the RAID algorithm or with the JBOD mode.
9. the storage means of the storage system of the memory device based on solid storage medium according to claim 8 is characterized in that, may further comprise the steps:
Use is disposed a plurality of different logical volumes with chip array string according to demand based on the main process equipment drive software of the memory device of chip array string, and each logical volume comprises 1 or a plurality of chip array string;
The device driver software of main frame is issued chip array string controller with configuration information; String is configured to chip array; A plurality of flash chips that single chip array string is comprised are configured to an independently read-write equipment, perhaps a plurality of chip array string are configured to a read-write equipment;
Main frame is configured to the RAID mode with said a plurality of read-write equipments;
When read-write equipment was operated, chip array string controller was resolved instruction, and through control bus controller unit is issued in instruction according to the firmware and the device configuration information of configuration among the ROM or upper strata instruction; Controller unit is resolved to instruction on the control module of corresponding different chip array string; Said control module hangs on the control bus; Accept the instruction manipulation of main frame, and be handed down to different chip array string, accomplish read-write operation for different chip array string.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210058178.2A CN102662605B (en) | 2012-03-07 | 2012-03-07 | Storage device, storage system and storage method based on solid-state storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210058178.2A CN102662605B (en) | 2012-03-07 | 2012-03-07 | Storage device, storage system and storage method based on solid-state storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102662605A true CN102662605A (en) | 2012-09-12 |
| CN102662605B CN102662605B (en) | 2015-06-24 |
Family
ID=46772107
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210058178.2A Active CN102662605B (en) | 2012-03-07 | 2012-03-07 | Storage device, storage system and storage method based on solid-state storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102662605B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107291397A (en) * | 2017-06-28 | 2017-10-24 | 山东超越数控电子有限公司 | A kind of implementation method of the disk array based on blending agent |
| CN109478151A (en) * | 2016-06-29 | 2019-03-15 | 亚马逊技术有限公司 | Network accessible data volume modification |
| CN116955241A (en) * | 2023-09-21 | 2023-10-27 | 杭州智灵瞳人工智能有限公司 | Memory chip compatible with multiple types of memory media |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101553032A (en) * | 2008-04-03 | 2009-10-07 | 华为技术有限公司 | Channel allocating method, device and base station sub-system |
| CN201725323U (en) * | 2010-06-07 | 2011-01-26 | 宇达电脑（上海）有限公司 | Independent redundant disk array |
-
2012
- 2012-03-07 CN CN201210058178.2A patent/CN102662605B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101553032A (en) * | 2008-04-03 | 2009-10-07 | 华为技术有限公司 | Channel allocating method, device and base station sub-system |
| CN201725323U (en) * | 2010-06-07 | 2011-01-26 | 宇达电脑（上海）有限公司 | Independent redundant disk array |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109478151A (en) * | 2016-06-29 | 2019-03-15 | 亚马逊技术有限公司 | Network accessible data volume modification |
| CN109478151B (en) * | 2016-06-29 | 2022-03-29 | 亚马逊技术有限公司 | Network accessible data volume modification |
| CN107291397A (en) * | 2017-06-28 | 2017-10-24 | 山东超越数控电子有限公司 | A kind of implementation method of the disk array based on blending agent |
| CN116955241A (en) * | 2023-09-21 | 2023-10-27 | 杭州智灵瞳人工智能有限公司 | Memory chip compatible with multiple types of memory media |
| CN116955241B (en) * | 2023-09-21 | 2024-01-05 | 杭州智灵瞳人工智能有限公司 | Memory chip compatible with multiple types of memory media |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102662605B (en) | 2015-06-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9335929B2 (en) | Nonvolatile semiconductor storage system | |
| USRE49117E1 (en) | Switch module and storage system | |
| US20100125695A1 (en) | Non-volatile memory storage system | |
| US8650360B2 (en) | Storage system | |
| US8156277B2 (en) | Flash memory module and storage system | |
| US8473703B2 (en) | Storage system and management method of the storage system | |
| CN102122235B (en) | RAID4 (redundant array of independent disks) system and data reading and writing method thereof | |
| US9891989B2 (en) | Storage apparatus, storage system, and storage apparatus control method for updating stored data stored in nonvolatile memory | |
| US8738866B2 (en) | Storage system and control method therefor | |
| US20160062698A1 (en) | Storage device controller architecture | |
| US9600185B2 (en) | Computer realizing high-speed access and data protection of storage device, computer system, and I/O request processing method | |
| CN102662605B (en) | Storage device, storage system and storage method based on solid-state storage medium | |
| EP2876542A1 (en) | Storage control device, program, and control method | |
| US8255646B2 (en) | Storage apparatus and logical volume migration method | |
| KR20100120539A (en) | Apparatus for managing pci-e bus terminal storage devices with raid and system using the same | |
| KR101824671B1 (en) | Apparatus and method for routing information in a non-volatile memory-based storage device | |
| CN103942007A (en) | RAID controller and command processing method thereof | |
| JP5782556B2 (en) | Nonvolatile semiconductor memory system | |
| CN102253812A (en) | Method for improving soft RAID (redundant array of independent disk) performance based on Loongson processor | |
| US20180046404A1 (en) | Computer system and storage control method | |
| US10628042B2 (en) | Control device for connecting a host to a storage device | |
| JP5968508B2 (en) | Nonvolatile semiconductor memory system | |
| CN112286446B (en) | Storage device and control method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C53 | Correction of patent of invention or patent application | ||
| CB02 | Change of applicant information |
Address after: 430070 Hubei city of Wuhan province Wuhan East Lake New Technology Development Zone Road No. two high Guan Nan Industrial Park No. 2 building 2-3 floor West Applicant after: MEMORIGHT (WUHAN) Co.,Ltd. Address before: 430070 Hubei city of Wuhan province Kuanshan road Optics Valley Software Park building C3 on the third floor 301-303 room Applicant before: MEMORIGHT (WUHAN) Co.,Ltd. |
|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 430070 Hubei city of Wuhan province Wuhan East Lake New Technology Development Zone Road No. two high Guan Nan Industrial Park No. 2 building 2-3 floor West Patentee after: EXASCEND TECHNOLOGY (WUHAN) CO.,LTD. Address before: 430070 Hubei city of Wuhan province Wuhan East Lake New Technology Development Zone Road No. two high Guan Nan Industrial Park No. 2 building 2-3 floor West Patentee before: MEMORIGHT (WUHAN) Co.,Ltd. |
|
| PE01 | Entry into force of the registration of the contract for pledge of patent right | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of invention: Storage device, storage system and storage method based on solid state storage medium Effective date of registration: 20211021 Granted publication date: 20150624 Pledgee: Bank of Hankou Limited by Share Ltd. Financial Services Center Pledgor: EXASCEND TECHNOLOGY (WUHAN) Co.,Ltd. Registration number: Y2021420000115 |
|
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: 430000 west of 2-3 / F, No.2 factory building, Guannan Industrial Park, No.1 Gaoxin 2nd Road, Wuhan Donghu New Technology Development Zone, Wuhan City, Hubei Province Patentee after: Zhiyu Technology Co.,Ltd. Address before: 430070 Wuhan, Hubei Wuhan East Lake New Technology Development Zone, high-tech two Road No. 1 South Guan Industrial Park 2 factory 2-3 floor West. Patentee before: EXASCEND TECHNOLOGY (WUHAN) CO.,LTD. |