CN102651550B - Sub-synchronous oscillation suppression method based on controllable series compensation additional impedance deviation control - Google Patents
Sub-synchronous oscillation suppression method based on controllable series compensation additional impedance deviation control Download PDFInfo
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- CN102651550B CN102651550B CN201210107850.2A CN201210107850A CN102651550B CN 102651550 B CN102651550 B CN 102651550B CN 201210107850 A CN201210107850 A CN 201210107850A CN 102651550 B CN102651550 B CN 102651550B
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Abstract
The invention provides a sub-synchronous oscillation suppression method based on controllable series compensation additional impedance deviation control, which belongs to the field of power grid application research. The suppression method comprises the following steps of: constructing a controllable series compensation control system model; selecting an input signal of a controller; analyzing a rotating speed deviation and an impedance deviation; and controlling the impedance deviation. The method is simple and intuitional, has high reliability, and is easy to implement; power grid application is facilitated, and the method has a better application prospect; and in various running ways of a system, the controllable series compensation additional impedance deviation control has a better suppression effect on sub-synchronous oscillation.
Description
Technical field
The invention belongs to power grid application research field, specifically relate to a kind of sub-synchronous oscillation suppression method based on controlled series compensation additional impedance Deviation Control.
Background technology
Controlled series compensation can carry out large-scale continuous control to line power.From the viewpoint of system, the principle of variable series compensation is just improved the fundamental frequency voltage on fixed capacitor in series compensation circuit by suitably changing Trigger Angle α, and the voltage that this has improved has changed the effective value of series connection condensance.As shown in Figure 1, controlled series compensation main circuit comprises capacitor C, shunt reactor LS, bidirectional thyristor and resistance-capacitance absorption branch road.
Sub-synchronous oscillation is a kind of phenomenon that is different from other power system oscillations being caused by electric power system mechanical electric coupling, due to this phenomenon may directly cause large steam turbine-generator set rotor axle system heavy damage, jeopardize the safe operation of electric power system, therefore the research of this phenomenon is the focus of electric power system always.
In the past, experts and scholars have the research that suppresses subsynchronous resonance containing series compensation system both at home and abroad, and have no report in the sub-synchronous oscillation phenomenon electric power system news at home and abroad causing for controlled series compensation, publication, be necessary the inhibition method of this phenomenon to do to study.
Summary of the invention
In order to overcome above-mentioned the deficiencies in the prior art, the invention provides a kind of sub-synchronous oscillation suppression method based on controlled series compensation additional impedance Deviation Control, the method simple, intuitive, reliability is high, is easy to carry out; Be conducive to power grid application, there is good application prospect; Under the various operational modes of system, controlled series compensation additional impedance Deviation Control can obtain good inhibition to sub-synchronous oscillation.
In order to realize foregoing invention object, the present invention takes following technical scheme:
Based on the sub-synchronous oscillation suppression method of controlled series compensation additional impedance Deviation Control, described inhibition method comprises the following steps:
The input signal of step 2. selection control;
In described step 1, controlled series compensation control system comprises measuring unit, controller regulation and control unit, trigger element and controlled series compensation main circuit unit; The signal of collection is transferred to described controller regulation and control unit by described measuring unit, is transferred to through the triggering signal of described controller regulation and control cell processing the described trigger element being connected with controlled series compensation main circuit unit.
The I side bus voltage U that gathers controlled series compensation for described measuring unit
1, J side bus voltage U
2, A phase current i
a, B phase current i
bwith C phase current i
cmeasure impedance.
In controlled series compensation open loop control, described controller regulation and control unit triggers according to fixing Trigger Angle.
In controlled series compensation closed-loop control, the impedance deviation that described controller regulation and control unit obtains Ordering impedance and measurement impedance comparison obtains input impedance with described Ordering impedance stack after proportional plus integral control, obtains Trigger Angle and trigger after tabling look-up.
Described controlled series compensation main circuit unit comprises A phase main circuit unit, B phase main circuit unit and C phase main circuit unit.Described A phase main circuit unit, B phase main circuit unit and C phase main circuit unit include capacitor, shunt reactor, bidirectional thyristor and resistance-capacitance absorption branch road, after connecting with described shunt reactor after described bidirectional thyristor and resistance-capacitance absorption branch circuit parallel connection, then with described Parallel-connected Capacitor.
In described step 2, the input signal that State selective measurements impedance deviation signal is controller.
In described step 3, described rotating speed deviation and impedance deviation are carried out to Prony Algorithm Analysis.
The parameter of described Prony method analysis comprises model frequency, amplitude, phase angle and damping.
In described step 4, comparison command impedance obtains described impedance deviation with measurement impedance, impedance deviation signal after filtering, after phase shift, amplification and amplitude limiting processing, obtain input impedance with the stack of described Ordering impedance and the impedance deviation after proportional plus integral control, obtain output impedance after looking into impedance meter.
Compared with prior art, beneficial effect of the present invention is:
1. the method simple, intuitive, reliability is high, is easy to carry out;
2. be conducive to power grid application, there is good application prospect;
3. can adapt to the various operational modes of electrical network.
Accompanying drawing explanation
Fig. 1 is prior art controlled series compensation main circuit schematic diagram;
Fig. 2 is controlled series compensation control system structural representation in the embodiment of the present invention;
Fig. 3 is controlled series compensation control system model schematic diagram in the embodiment of the present invention;
Fig. 4 is controlled series compensation main circuit unit schematic diagram in the embodiment of the present invention;
Fig. 5 is embodiment of the present invention middle controller regulation and control unit regulating flow chart;
Fig. 6 is control group deviation block diagram in the embodiment of the present invention;
Fig. 7 is control group deviation flow chart in the embodiment of the present invention;
Fig. 8 is control group Deviation Control link Parameter Map in the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in further detail.
As Fig. 2, based on the sub-synchronous oscillation suppression method of controlled series compensation additional impedance Deviation Control, described inhibition method comprises the following steps:
The input signal of step 2. selection control;
In described step 1, controlled series compensation control system comprises measuring unit, controller regulation and control unit, trigger element and controlled series compensation main circuit unit; The signal of collection is transferred to described controller regulation and control unit by described measuring unit, is transferred to through the triggering signal of described controller regulation and control cell processing the described trigger element being connected with controlled series compensation main circuit unit.
The I side bus voltage U that gathers controlled series compensation for described measuring unit
1, J side bus voltage U
2, A phase current i
a, B phase current i
bwith C phase current i
cmeasure impedance.
In controlled series compensation open loop control, described controller regulation and control unit triggers according to fixing Trigger Angle.
As Fig. 4, described controlled series compensation main circuit unit comprises A phase main circuit unit, B phase main circuit unit and C phase main circuit unit.Described A phase main circuit unit, B phase main circuit unit and C phase main circuit unit include capacitor, shunt reactor, bidirectional thyristor and resistance-capacitance absorption branch road, after connecting with described shunt reactor after described bidirectional thyristor and resistance-capacitance absorption branch circuit parallel connection, then with described Parallel-connected Capacitor.
As Fig. 5, in controlled series compensation closed-loop control, the impedance deviation that described controller regulation and control unit obtains Ordering impedance and measurement impedance comparison obtains input impedance with described Ordering impedance stack after proportional plus integral control, obtains Trigger Angle and trigger after tabling look-up.
In described step 2, the input signal that State selective measurements impedance deviation signal is controller.In described step 3, described impedance deviation signal is carried out to Prony Algorithm Analysis.Explain above-mentioned analytic process by an example below.Certain has the system of sub-synchronous oscillation phenomenon, and the analysis result of controlled series compensation being measured to impedance is as shown in table 1:
Table 1
The parameter of described Prony Algorithm Analysis comprises model frequency, amplitude, phase angle and damping.
As can be seen from Table 1, the sub-synchronous oscillation frequency that forms speed error signal and impedance deviation signal is mainly 20.777Hz and 12.474Hz, wherein, 20.777Hz component damping is for negative, its amplitude is also maximum, the performance of vibrating in real system is the most serious, and in simulation process, the phase preserving of rotating speed deviation and the each frequency component of impedance deviation is constant.
As the impedance of Fig. 6 comparison command with measure impedance obtain as described in impedance deviation, impedance deviation signal after filtering, after phase shift, amplification and amplitude limiting processing, obtain input impedance with the stack of described Ordering impedance and the impedance deviation after proportional plus integral control, obtain output impedance after looking into impedance meter.
As Fig. 7-8, the target of additional impedance Deviation Control is that elimination frequency is the signal of 20.777Hz and 12.474Hz, and the f that frequency is is extracted in block diagram [1]～[5]
1after=20.777Hz signal, phase shift is amplified, and it is f that frequency is extracted in block diagram [6]～[10]
2after the signal of=12.474Hz, phase shift is amplified, and both form additional impedance control after superposeing together with amplitude limit link below (get ± 0.03).The present invention, by the scanning in phase shifting angle and gain certain limit, tries out the combination of the most effective phase shift and gain according to generator torque or rotating speed.
Finally should be noted that: above embodiment is only in order to illustrate that technical scheme of the present invention is not intended to limit, although the present invention is had been described in detail with reference to above-described embodiment, those of ordinary skill in the field are to be understood that: still can modify or be equal to replacement the specific embodiment of the present invention, and do not depart from any modification of spirit and scope of the invention or be equal to replacement, it all should be encompassed in the middle of claim scope of the present invention.
Claims (1)
1. the sub-synchronous oscillation suppression method based on controlled series compensation additional impedance Deviation Control, is characterized in that: described inhibition method comprises the following steps:
Step 1. is built controlled series compensation control system model;
In described step 1, controlled series compensation control system comprises measuring unit, controller regulation and control unit, trigger element and controlled series compensation main circuit unit; The signal of collection is transferred to described controller regulation and control unit by described measuring unit, is transferred to through the triggering signal of described controller regulation and control cell processing the described trigger element being connected with controlled series compensation main circuit unit;
The I side bus voltage U that gathers controlled series compensation for described measuring unit
1, J side bus voltage U
2, A phase current i
a, B phase current i
bwith C phase current i
cmeasure impedance;
In controlled series compensation open loop control, described controller regulation and control unit triggers according to fixing Trigger Angle;
In controlled series compensation closed-loop control, the impedance deviation that described controller regulation and control unit obtains Ordering impedance and measurement impedance comparison obtains input impedance with described Ordering impedance stack after proportional plus integral control, obtains Trigger Angle and trigger after tabling look-up;
Described controlled series compensation main circuit unit comprises A phase main circuit unit, B phase main circuit unit and C phase main circuit unit; Described A phase main circuit unit, B phase main circuit unit and C phase main circuit unit include capacitor, shunt reactor, bidirectional thyristor and resistance-capacitance absorption branch road, after connecting with described shunt reactor after described bidirectional thyristor and resistance-capacitance absorption branch circuit parallel connection, then with described Parallel-connected Capacitor;
The input signal of step 2. selection control;
In described step 2, the input signal that State selective measurements impedance deviation signal is controller;
Step 3. is analyzed rotating speed deviation and impedance deviation;
In described step 3, described rotating speed deviation and impedance deviation are carried out to Prony Algorithm Analysis;
The parameter of described Prony method analysis comprises model frequency, amplitude, phase angle and damping;
Step 4. is controlled described impedance deviation;
In described step 4, comparison command impedance obtains described impedance deviation with measurement impedance, impedance deviation signal after filtering, after phase shift, amplification and amplitude limiting processing, obtain input impedance with the stack of described Ordering impedance and the impedance deviation after proportional plus integral control, obtain output impedance after looking into impedance meter.
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| CN106130038B (en) * | 2016-06-24 | 2024-02-02 | 全球能源互联网研究院 | Power grid side subsynchronous oscillation suppression device for new energy base fed through series compensation |
| CN108398600B (en) * | 2018-01-24 | 2020-03-31 | 青岛海洋科学与技术国家实验室发展中心 | Impedance spectrum measuring method and tester based on Prony state space algorithm |
| CN109038619B (en) * | 2018-08-16 | 2021-06-01 | 东北大学 | Subsynchronous oscillation suppression device and method based on bypass current compensation |
| CN109713685B (en) * | 2018-11-07 | 2021-01-29 | 华北电力大学 | Online positioning method suitable for VSC access-induced subsynchronous oscillation |
| CN111523231B (en) * | 2020-04-22 | 2022-04-19 | 中国华能集团清洁能源技术研究院有限公司 | Subsynchronous oscillation analysis method based on EEMD and Prony method |
| CN117498284B (en) * | 2023-10-26 | 2024-04-05 | 武汉大学 | Series compensation capacitor device based on short-circuit fault current intelligent self-driving |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101447675A (en) * | 2008-12-12 | 2009-06-03 | 中国电力科学研究院 | Method for mitigating sub-synchronous resonance |
| CN101834446A (en) * | 2010-03-23 | 2010-09-15 | 浙江大学 | Sub-synchronous oscillation suppression method based on controlled series compensation |
| CN101969208A (en) * | 2010-09-29 | 2011-02-09 | 东南大学 | Method for inhibiting subsynchronous resonance of wind power system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101447675A (en) * | 2008-12-12 | 2009-06-03 | 中国电力科学研究院 | Method for mitigating sub-synchronous resonance |
| CN101834446A (en) * | 2010-03-23 | 2010-09-15 | 浙江大学 | Sub-synchronous oscillation suppression method based on controlled series compensation |
| CN101969208A (en) * | 2010-09-29 | 2011-02-09 | 东南大学 | Method for inhibiting subsynchronous resonance of wind power system |
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